Abstract: A crystal oscillator emulator having a plurality of predetermined operating configurations. The crystal oscillator emulator includes a measurement circuit configured to measure a value of an impedance connected to a select pin of the crystal oscillator emulator, wherein the impedance is external to the crystal oscillator emulator, and generate an output having a value corresponding to the value of the impedance. The storage circuit is configured to store a plurality of values corresponding to the plurality of predetermined operating configurations and select one of the plurality of values based on the output of the measurement circuit. A controller is configured to set an output frequency of the crystal oscillator emulator based on the selected one of the plurality of values.

Abstract: An oscillator includes a nominal frequency output unit, a frequency adjustment amount output unit, a gain output unit, a multiplier, and an adder. The nominal frequency output unit is configured to output a first digital value corresponding to the nominal frequency. The frequency adjustment amount output unit is configured to output a second digital value corresponding to a rate of frequency in order to set a frequency adjustment amount with respect to the nominal frequency using the rate of frequency. The gain output unit is configured to output a third digital value corresponding to a gain to be multiplied by the second digital value. The multiplier is configured to multiply the second digital value by the third digital value, thus outputting a fourth digital value. The adder adds the first digital value and the fourth digital value to output the added result as a setting signal of frequency.

Abstract: A method for compensating NCO jitter by changing a step value used to increment an accumulator in the NCO to make up for inaccuracies, or jitters. In one approach, a remainder in the accumulator may be monitored and a compensated clock close to the current edge of an ideal clock may be generated. In another approach, a compensated clock close to the next edge of the ideal clock may be generated after the current edge of the ideal clock is missed. The step value may be stored in a memory, which may be a register. A jitter compensator may include a comparator for monitoring the remainder in the accumulator or a detector for detecting whether an ideal clock has been missed. The jitter compensator may also change the step value to a step value for a faster clock to compensate jitter.

Abstract: A voltage-controlled oscillator circuit includes a first transistor, a second transistor, a first resonator circuit, a second resonator circuit, a first current path and a second current path. A drain of the first transistor is coupled to a gate of the second transistor and to a first end of the first resonator circuit. A source of the first transistor is coupled to the first current path and to a first end of the second resonator circuit. A drain of the second transistor is coupled to a gate of the first transistor and to a second end of the first resonator circuit. A source of the second transistor is coupled to the second current path and a second end of the second resonator circuit.

Abstract: The present invention relates to a voltage change compensation type oscillator and a method of compensating an error of an oscillator, which includes a voltage level detecting unit; a current level adjusting unit; and an oscillating core unit for generating and outputting a clock signal by receiving a power supply voltage and an output current of the current level adjusting unit, wherein the current level adjusting unit adjusts the output current in proportion to an increase of the voltage level detected by the voltage level detecting unit, thus remarkably reducing a frequency error of the clock signal in spite of changes in voltage.

Abstract: An oscillator circuit includes a signal generator having a compensation frequency output node that provides a compensation frequency signal at the compensation frequency output node. A pulse generator having a pulsed signal output node and a pulse generator input node is coupled to the compensation frequency output node and converts the compensation frequency signal into a series of compensation binary pulses having a constant pulse duration regardless of variations in the duty cycle of the compensation binary pulses. An oscillator module having at least two capacitors, an oscillator output node and a pulsed signal input node is coupled to the pulsed signal output node, and provides an output signal that is at a frequency dependent on charging rates of the capacitors. Drift variations in the capacitors are offset by variations in a duty cycle of the compensation binary pulses supplied in order to maintain constant charging rates of the capacitors.

Abstract: A driver circuit includes a comparator (drive signal generation section) that generates a drive signal based on a signal obtained by converting an oscillation current of a vibrator that has been input via a first signal line into a voltage using an I/V conversion circuit (current/voltage conversion section), and supplies the drive signal to the vibrator via a second signal line, an oscillation detection circuit (oscillation detection section) that detects whether or not the oscillation current has reached a predetermined value after the vibrator has started to oscillate, a startup oscillation circuit (startup oscillation section) that assists an oscillation operation of the vibrator until the oscillation current reaches the predetermined value, and a switch that separates a capacitor from the second signal line until the oscillation current reaches the predetermined value, and connects the capacitor to the second signal line when the oscillation current has reached the predetermined value.

Abstract: A crystal oscillator is provided, which varies a frequency drift compensation according to a power consumption and compensates a frequency drift characteristic caused by heat. An adder is used to add a temperature compensation control voltage from a temperature compensation circuit, an oscillating frequency control voltage from an AFC circuit, and a frequency drift compensation voltage corresponding to the power consumption from a frequency drift compensation circuit. A voltage added by the adder is outputted to voltage-variable capacitor elements and, which respectively are connected to an input side and an output side of an inverter IC that is connected in parallel to a crystal oscillating unit.

Abstract: A synthesizer includes a synthesizer unit for generating a local oscillation signal based on a reference oscillation signal output from a reference oscillation unit including a MEMS resonator, a frequency fluctuation detector for detecting a frequency fluctuation of the MEMS resonator, and a frequency adjuster for adjusting a frequency of the local oscillation signal based on the frequency fluctuation detected by the frequency fluctuation detector. This synthesizer can output a signal with a stable frequency, even when an MEMS resonator demonstrating a large fluctuation in an oscillation frequency to temperatures is used.

Abstract: A circuit block which comprises a non-linear capacitor with two different values of capacitance dependent on a value of a voltage of a resonant signal on the capacitor; a plurality of second capacitors each coupled to a respective switch to enable a said second capacitor to be switched in or out of parallel connection with the nonlinear capacitor; and a tuning control, coupled to the second capacitor switches, and sensing an amplitude of the resonant signal. The tuning control circuit is configured to control the second capacitor switches to successively switch the second capacitors in/out of parallel connection with the non-linear capacitor dependent on the amplitude of the resonant signal until the non-linear capacitor has substantially a single one of two different values, such that in a resonant circuit the circuit block then behaves as a fixed value capacitor.

Abstract: Microelectromechanical resonators include a resonator body with a built-in piezoelectric-based varactor diode. This built-in varactor diode supports passive frequency tuning by enabling low-power manipulation of the stiffness of a piezoelectric layer, in response to controlling charge build-up therein at resonance. A resonator may include a composite stack of a bottom electrode, a piezoelectric layer on the bottom electrode and at least one top electrode on the piezoelectric layer. The piezoelectric layer includes a built-in varactor diode, which is defined by at least two regions having different concentrations of electrically active dopants therein.

Abstract: A MEMS oscillator having a feedback-type oscillation circuit including a MEMS resonator and an amplifier, a voltage control unit operable to control a bias voltage applied to an oscillating member of the MEMS resonator, and an auto gain control unit which receives an output from the amplifier and, based on a level of the output, to output an amplitude control signal for controlling a gain of the amplifier to the amplifier such that the level of the output from the amplifier comes to be a predetermined level, wherein the voltage control unit controls the bias voltage applied to the oscillating member based on an operating temperature of the MEMS resonator such that a peak gain of the MEMS resonator comes to have a predetermined value regardless of the operating temperature, and the voltage control unit derives the operating temperature of the MEMS resonator by monitoring the amplitude control signal.

Abstract: An apparatus for providing clock and a method thereof are provided. The provided apparatus includes a frequency generation unit and a control unit. The frequency generation unit decides amplitude of a clock signal to be a first amplitude or a second amplitude in response to a mode signal. The frequency generation unit converts an external oscillation signal into the clock signal. The control unit receives the clock signal, and outputs the mode signal in response to a system status signal. The control unit outputs the clock signal to external when determining that the clock signal has a stable oscillation. When the system status signal is a power on signal, the first amplitude is used as the amplitude of the clock signal, and when the system status signal is a power off signal, the second amplitude smaller than the first amplitude is used as the amplitude of the clock signal.

Abstract: In one exemplary implementation, an electronic apparatus includes: a reference clock source, for generating a reference clock; a global navigation satellite system (GNSS) receiver for receiving satellites signals and the reference clock, comprising: a monitoring circuit, for monitoring a status of the GNSS receiver to generate a monitoring result; and a compensating circuit, coupled to the reference clock source and the monitoring circuit, for compensating the reference clock according to the monitoring result.

Abstract: A Phase-Locked Loop (PLL) includes a Phase-to-Digital Converter (PDC), a programmable digital loop filter, a Digitally-Controlled Oscillator (DCO), and a loop divider. Within the PDC, phase information is converted into a stream of digital values by a charge pump and an Analog-to-Digital Converter (ADC). The stream of digital values is supplied to the digital loop filter which in turn supplies digital tuning words to the DCO. A number of types of ADCs can be used for the ADC including a continuous-time delta-sigma oversampling Digital ADC and a Successive Approximation ADC. The voltage signal on the charge pump output is a small amplitude midrange voltage signal. The small voltage amplitude of the signal leads to numerous advantages including improved charge pump linearity, reduced charge pump noise, and lower supply voltage operation of the overall PLL.

Abstract: A MEMS oscillator including: an oscillator unit being capable of outputting an output from an amplifier as an original oscillator signal that includes a feedback type oscillator circuit including a MEMS resonator and an amplifier, and an automatic gain controller receiving the output from the amplifier and controlling a gain of the amplifier based on a level of the output to maintain a level of the output from the amplifier constant; and a corrector unit that receives the original oscillator signal, that generates from the original oscillator signal a signal of a predetermined set frequency, and that outputs the generated signal of the predetermined set frequency as an output signal.

Abstract: Reducing a gain of a VCO, which may be used in a serdes system, includes using an oscillator replicating the VCO. The oscillator frequency varies according to PVT conditions of circuit elements of the oscillator, which affect a speed of the circuit elements. A first circuit receives an output of the oscillator to produce a current that varies inversely proportionally to the oscillator frequency. A second circuit injects the current into a power supply line of the VCO. Thus, high VCO frequencies can be attained. By reducing the gain of the VCO, thermal noise contribution of the loop resistor and the loop capacitor required for desired loop bandwidth are reduced. During fast corner conditions, minimal current is injected into the VCO. During slow corner conditions, high current is injected into the VCO. These help keep VCTRL of the PLL loop close to a mid-rail operating region.

Abstract: A VCO circuit includes: a control portion to which a first voltage is inputted and from which a second voltage corresponding to the first voltage is outputted; a current source portion to which the second voltage is inputted and from which a current corresponding to the second voltage is outputted; and an oscillator circuit to which the current is inputted and from which a signal with a frequency in accordance with the current is outputted. The control portion includes an adjusting circuit which changes the second voltage in conjunction with fluctuation of a power supply voltage. Accordingly, fluctuation of the frequency Fo of an output signal of the VCO circuit can be suppressed even when the power supply voltage of the VCO circuit fluctuates.

Abstract: Methods and apparatus for a resonant transmit/receive switch with transformer gate/source coupling. The resonant transmit/receive (T/R) switch includes a switchable inductor having a first inductance value for use in receive (Rx) mode and a second inductance value for use in transmit (Tx) mode. The first inductance value is used for input matching to a low noise amplifier in Rx mode. The second inductance value is selected to resonant with parasitic capacitance of the antenna port to produce a high impedance in Tx mode. In one implementation, the switchable inductor is gate sourced coupled to at least one of first and second inductors of a low noise amplifier (LNA), thereby allowing use of smaller inductors due to the resulting coupling factor.

Abstract: Embodiments of the invention relate to resonant circuits; particularly but not exclusively the embodiments relate to resonant circuits in RPID (radio frequency identification) responsive to a wide frequency range. A controllable electric resonator comprising an inductor coupled to a first capacitor to form a resonant circuit, the resonator further comprising a controllable element, a second capacitor controllable coupled across said first capacitor by said controllable element, and a control device to control said controllable element such that a total effective capacitance of said first and second capacitor varies over a duty cycle of an oscillatory signal on said resonator.

Abstract: A failsafe oscillator monitor and alarm circuit receives clock pulses from an external oscillator that if a failure thereto occurs, the failsafe oscillator monitor and alarm circuit will notify a digital processor of the external oscillator failure. The failsafe oscillator monitor and alarm circuit is a very low current usage circuit that charges a storage capacitor with clock pulses from the external oscillator when functioning normally and discharges the storage capacitor with a constant current sink if the external oscillator stops functioning. When the voltage charge on the storage capacitor becomes less than a reference voltage an alarm signal is sent to the digital processor for exception or error handling of the failed external oscillator.

Abstract: A Susceptance-Mode Inductor with infinite order resonance cavity which includes an inductor section is formed by a physical inductor coil wound about a permanent magnetic materials, with both ends of the coil connecting to a electric damper and a capacitor of the infinite order resonance cavity; thereby that power is coupled into the incoming end of the infinite order resonance cavity through a radio frequency (RF) radiation electric field and the outgoing end thereof is electrically connected to a set of resonance power storage section, or alternatively the incoming end is connected to electric charge and the outgoing end is connected to the load; accordingly, the resonance of the infinite order resonance cavity, thus allowing to convert the current or electron flow at the magnetic field end into charge output by means of Lorenz force.

Abstract: The present application discloses a voltage-controlled oscillator device and a method of correcting the voltage-controlled oscillator. The voltage-controlled oscillator device comprises predistortion module, configured to predistort an input voltage to obtain a predistorted voltage; and a voltage-controlled oscillator, configured to generate an output signal with a corresponding oscillation frequency according to the predistorted voltage, wherein the predistortion module corrects a non-linear characteristic of the voltage-controlled oscillator, so that there is a linear relationship between the input voltage and the oscillation frequency of the output signal. The voltage-controlled oscillator device may be applied to a phase-locked circuit in a communication system.

Abstract: A complex resonant circuit includes: a first current path performing a first gain control to an AC power signal being supplied; at least one second current path performing a second gain control different from the first gain control to the AC power signal; at least two resonant circuits provided on the respective first and second current paths, having mutually different resonance or antiresonance points for the AC power signals passing through the respective first and second current paths and capturing the respective AC power signals; at least one compensation current path performing a compensation phase shift to the AC power signal; a compensation circuit, provided on the compensation current path, for removing an unnecessary component of the resonant circuit; and an analog operational circuit performing analog addition or subtraction on the AC power signal having passed through the first and second current paths, and the compensation current path.

Abstract: The present invention provides an oscillator and a communication system using the oscillator, in particular, an LC oscillator adapted to lessen phase noise deterioration due to harmonic distortions and increase the amplitude of oscillation, thereby having a favorable low phase noise characteristic. The oscillator comprises at least one voltage to current converter consisting of a transistor and a resonator comprising two LC tanks consisting of a pair of conductive elements and inductive elements. A feedback loop is formed such that an output terminal of the voltage to current converter is connected to the resonator and a current input to the resonator is converted to a voltage which is in turn fed back to an input terminal of the voltage to current converter. Inductive elements constituting the two LC tanks constituting the resonator are mutually inductively couple and a coefficient of the mutual induction is about ?0.6.

Abstract: A compensating DFLL (CDFLL) is disclosed that utilizes temperature readings at regular intervals in combination with production characterization data of a reference oscillator to compensate for frequency drift and nominal frequency error. In some implementations, the CDFLL selects a calibration value that is not optimal for frequency accuracy to minimize accumulated frequency error over time. More particularly, during a calibration run, mismatch between an ideal frequency and an actual frequency is measured, and the measurement is used as a starting point for a next calibration run, such that the accumulated frequency error is averaged almost to zero over time.

Abstract: A temperature compensation method for a piezoelectric oscillator including a piezoelectric vibrator having a frequency temperature characteristic with a hysteresis characteristic, and an oscillation circuit which oscillates the piezoelectric vibrator and outputs an oscillation signal, wherein, to a temperature compensation circuit which can calculate a quantity of temperature compensation using frequency temperature information indicating a temperature characteristic of an oscillation frequency of the piezoelectric vibrator and temperature information of the piezoelectric vibrator at the time of oscillation of the oscillation signal, the oscillation signal and the frequency temperature information are outputted, includes: calculating, as the frequency temperature information, an intermediate value between elevated-temperature frequency temperature information of the piezoelectric vibrator that is generated in the case where ambient temperature of the piezoelectric vibrator is elevated, and lowered-temperature

Abstract: A method for compensating NCO jitter by changing a step value used to increment an accumulator in the NCO to make up for inaccuracies, or jitters. In one approach, a remainder in the accumulator may be monitored and a compensated clock close to the current edge of an ideal clock may be generated. In another approach, a compensated clock close to the next edge of the ideal clock may be generated after the current edge of the ideal clock is missed. The step value may be stored in a memory, which may be a register. A jitter compensator may include a comparator for monitoring the remainder in the accumulator or a detector for detecting whether an ideal clock has been missed. The jitter compensator may also change the step value to a step value for a faster clock to compensate jitter.

Abstract: Systems, methods, and apparatus are described that provide for low phase-noise, spectrally-pure, and low-jitter signals from electrical oscillators. An aspect of the present disclosure includes utilization of an open-loop feed-forward phase-noise cancellation scheme to cancel phase noise, or jitter, of an electrical oscillator. Phase noise can be measured and then subtracted, with the phase noise measurement and subtraction being performed at a speed faster than phase noise variations of the oscillator. Another aspect of the present disclosure includes use of a feedback scheme for phase noise reduction. A feedback scheme can be used alone or in conjunction with a feed-forward scheme. Related phase-noise cancellation and/or reduction methods are described. Notch filter and RF amplifier circuits are also described.

Abstract: A rapidly adjustable local oscillation (LO) module for use in a radio transmitter or a radio receiver includes an oscillation generating module and a high frequency switching module. The oscillation generating module is operably coupled to generate a plurality of local oscillations. The high frequency switching module is operably coupled to, for a first one of a plurality of transmission paths, provide one of the plurality of local oscillations when a first transmission path selection indication is in a first state and provide another one of the plurality of local oscillations when the first transmission path selection indication is in a second state and, for a second one of the plurality of transmission paths, provide the one of the plurality of local oscillations when a second transmission path selection indication is in a first state and provide the another one of the plurality of local oscillations when the second transmission path selection indication is in a second state.

Abstract: The present invention discloses a continuous voltage controlled oscillator (VCO) frequency temperature compensation apparatus for a phase locked loop (PLL) and a continuous VCO frequency temperature compensation method for a PLL. The system utilizes a VCO with one digital coarse tuning input, a first analog fine tuning input, and a second analog fine tuning input. The system uses the second analog fine tuning inputs to compensate the VCO for frequency shifts due to temperature fluctuation. When the PLL transitions to the fine lock (FL) mode, the system starts driving the second fine tuning input with a differential amplifier. The differential amplifier compares the first fine tuning input with a reference voltage, and drives the second fine tuning input to compensate the first fine tuning input.

Abstract: An oscillator includes oscillator circuitry (8) including a transconductance stage (2) and a resonator (3). A comparator (10) produces first (CLK) and second (/CLK) clock signals which indicate the timing of positive and negative phases of a differential output signal (VIN+-VIN?) produced by the transconductance circuit in response to the resonator. A synchronous rectifier (14) converts the differential output signal to a current (IRECT) in response to the first and second clock signals. A switched capacitor notch filter (15) filters the current in response to the first and second clock signals. A control current (ICONTROL) which controls the transconductance of the transconductance circuit is generated in response to the notch filter. The resonator may be a MEMS resonator.

Abstract: A circuit may comprise an amplifier powered by a first supply voltage, with a first input of the amplifier coupled to a stable reference voltage, and the output voltage of the amplifier provided as a designated supply voltage to an oscillator configured to produce a periodic signal having a specified frequency. The circuit may further include a control circuit coupled to a second input of the amplifier, to the output of the amplifier, and to ground, and configured to control the rate of change of the output voltage of the amplifier with respect to temperature. This rate of change may be specified according to a characterization of the oscillator over supply voltage and temperature, and may result in stabilizing the specified frequency across temperature. The periodic signal may therefore be unaffected by variations in the first supply voltage, and the amplitude of the periodic signal may be proportional to the stable reference voltage.

Abstract: A high speed linear differential amplifier (HSLDA) having automatic gain adjustment to maximize linearity regardless of manufacturing process, changes in temperature, or swing width change of the input signal. The HSLDA comprises a differential amplifier, and a control signal generator including a replica differential amplifier, a reference voltage generator, and a comparator. The comparator outputs a control signal that automatically adjusts the gain of the high speed linear differential amplifier and of the replica differential amplifier. The replica differential amplifier receives predetermined complementary voltages as input signals and outputs a replica output signal to the comparator. The reference voltage generator outputs a voltage to the comparator at which linearity of the output signal of the differential amplifier is maximized. The control signal equalizes the voltage level of the replica output signal and the reference voltage, and controls the gain of the differential amplifier.

Abstract: The application relates to a calibration apparatus and calibration method for a tuneable resonator of a delta-sigma modulator of the continuous time, band pass type. The calibration apparatus comprises: a resonator driver capable of causing an oscillating behavior in a resonator output signal, a reference signal source that provides a reference signal, a frequency detector that provides a frequency relation signal corresponding to the frequency relation between the resonator output signal and the reference signal, and a controller that controls the tuneable resonator in dependence from the frequency relation signal so as to reduce frequency deviation.

Abstract: A phase lock loop pre-charging system and method are described. In one embodiment, a phase lock loop pre-charge system includes a bias component for generating a pre-charge voltage, and an activation component for activating the bias component. In one exemplary implementation the pre-charge voltage is utilized to facilitate pre-charging of a phase lock loop voltage controlled oscillator. In one embodiment, the bias component includes replica bias components that track the voltage controlled oscillation control voltage over varying process, voltage and temperature characteristics. The phase lock loop pre-charging systems and methods can be utilized to reduce lock time for a circuit.

Abstract: An integrated circuit 2 is provided with one or more monitoring circuits 14, 16, 18, 20 in the form of ring oscillators 22. These ring oscillators 22 include a plurality of tri-state inverters 24, 26, 28 containing a current-limiting transistor 42 operating in a leakage mode. The leakage current through the transistor 42 is dependent upon an operating parameter of the integrated circuit 2 being monitored. Accordingly, the oscillation frequency Fosc of the ring oscillator 22 varies in dependence upon the operating parameter to be measured.

Abstract: An apparatus is provided. The apparatus comprising a voltage controlled oscillator (VCO), an amplifier, a switch, a calibration capacitor, and a control loop. The VCO includes a capacitive network that receives a first tuning voltage that is based at least in part on an input signal and a switched capacitor array that is coupled to the capacitive network. The amplifier amplifies the difference between the reference voltage and the first tuning voltage. The switch receives the reference voltage and the amplified difference between the reference voltage and the first tuning voltage. The calibration capacitor receives the output from the switch and generates a second tuning voltage. The control loop receives the input signal and the second tuning voltage.

Abstract: An oscillator is provided which comprises an array of capacitances. At least some capacitances in the array have different capacitance values.

Abstract: A voltage-controlled oscillator that can achieve low phase noise while ensuring stable oscillation startup and stable oscillation maintenance even under low supply voltage conditions. The voltage-controlled oscillator includes an LC parallel resonant circuit, whose impedance varies with a control input voltage and a negative resistance circuit for introducing negative resistance into the LC parallel resonant circuit, wherein the negative resistance circuit includes at least: a first amplifier circuit, provided in parallel with the LC parallel resonant circuit and having a first pair of transistors cross-coupled via a capacitor, that achieves class-C amplifier operation by biasing the gate of each transistor in the first transistor pair with a first bias voltage; and a similarly configured second amplifier circuit that achieves class-C amplifier operation by biasing the gate of each transistor with a second bias voltage which is different from the first bias voltage.

Abstract: The present invention relates to a quadrature divider which may be used in a phase locked loop or frequency synthesizer or with a single side band mixer. According to a preferred embodiment the divider takes a quadrature input and has a quadrature output. The divider has four analog mixers 1, 2, 3 and 4. The first two mixers 1, 2 take the in-phase quadrature input, while the second mixers 3, 4 take the quadrature-phase quadrature input. The outputs and feedback loops of the mixers are properly arranged such that the in-phase and quadrature-phase outputs of the divider have a determinisitic phase sequence relationship based on the phase sequence relationship of the corresponding quadrature inputs. Third order harmonics may be minimized or reduced by addition or subtraction of the mixer outputs. As the divider is able to take a quadrature input, there is no need for a dummy divider in the phase locked loop, thus saving space and power.

Abstract: According to one exemplary embodiment, a differential varactor circuit for a voltage controlled oscillator having two differential outputs includes a first varactor having first and second terminals and a second varactor having first and second terminals. In the differential varactor circuit, each of the first and second terminals of the first varactor and each of the first and second terminals of the second varactor are coupled to one of the two differential outputs of the voltage controlled oscillator, thereby allowing a size of each of the first and second varactors to be reduced so as to increase varactor quality factor. Each of the first and second terminals of the first varactor can be coupled to one of the two differential outputs by a capacitor, and each of the first and second terminals of the second varactor can be coupled to one of the two differential outputs by a capacitor.

Abstract: A system for providing voltage and current regulator sources based on a oscillator having variable loop gain is described. Only when the oscillator loop gain is at least the value of one does the oscillator oscillate. The oscillator's ability to oscillate is controlled by the one or more variable impedance or gain devices. Negative feedback of the voltage or current output level is used to control the loop gain of the oscillator circuit.

Abstract: A phase locked loop apparatus includes an oscillator, a variable capacitance device, a selectable capacitance device, and a capacitance controller that is configured to provide a control signal to the selectable capacitance device. The selectable capacitance device is connected to the oscillator and is responsive to the control signal such that the selectable capacitance device has a first capacitance at a first control signal value and a second capacitance at a second control signal value. The capacitance controller only selects either the first capacitance or the second capacitance by providing a control signal that has the first control signal value to select the first capacitance and having the second control signal value to select the second capacitance.

Abstract: Disclosed are various embodiments of temperature-compensated relaxation oscillator circuits that may be fabricated using conventional CMOS manufacturing techniques. The relaxation oscillator circuits described herein exhibit superior low temperature coefficient performance characteristics, and do not require the use of expensive off-chip high precision resistors to effect temperature compensation. Positive and negative temperature coefficient resistors arranged in a resistor array offset one another to provide temperature compensation in the relaxation oscillator circuit.

Abstract: A crystal oscillator emulator integrated circuit includes a first temperature sensor configured to sense a first temperature of the crystal oscillator emulator integrated circuit. The memory is configured to (i) store calibration parameters and (ii) select at least one of the calibration parameters based on the first temperature. A semiconductor oscillator is configured to generate an output signal, wherein (i) the output signal has a frequency and an amplitude and (ii) the frequency is based on the at least one of the calibration parameters. An amplitude adjustment module is configured to (i) compare the amplitude to a predetermined amplitude and (ii) generate a control signal to adjust the amplitude based on the comparison.

Abstract: A PLL circuit is disclosed that comprises a controlling unit that switches at a predetermined timing to enable/disable the phase difference signal supplied from the phase comparator to the low pass filter; and a resistor element that is disposed between a predetermined potential and a signal line for supplying the phase difference signal from the phase comparator to the low pass filter, when the phase difference signal is enabled, the oscillation circuit performing oscillation operation based on the voltage signal corresponding to the phase difference signal, when the phase difference signal is disabled, the low pass filter being supplied with the predetermined potential through the resistor element to allow the oscillation circuit to perform oscillation operation based on the voltage signal generated depending on the supplied predetermined potential.

Abstract: Compensation of a signal using resonators as well as related methods and devices are described. Some embodiments include methods and devices for performing frequency compensation on a signal.

Abstract: A system may include a first circuit configured to generate a first clock having a first period of oscillation, and a second circuit configured to generate a second clock having a second period of oscillation, where the difference (?T) between the first period of oscillation and the second period of oscillation remains within a specified limit even during variations in temperature and/or during variations in the supply voltage. The system may further include a control circuit, which may receive the first clock and the second clock, and adjust, according to ?T, a first target parameter corresponding to a first number of cycles of the first clock, when a current cycle count of the second clock reaches a second target parameter corresponding to a second number of cycles of the second clock.

Abstract: One well known problem associated with voltage controlled oscillators or VCOs is phase noise, and it is desirable to reduce phase noise in order to improve VCO performance. Here, a VCO is provided where gain elements are provided that reduce phase noise. These gain elements are generally comprised of oscillator tanks.