Abstract: A multi-protocol modulator capable of supporting two or more different modes of operation, each mode of operation corresponding to a different type of modulation, comprises an m-level phase shift keying (m-PSK) modulator which receives a serial input data stream and maps data contained therein into a constellation including m equidistant phases in accordance with a predetermined mapping scheme. The m-PSK modulator is shared by at least two different modulation protocols by allowing the mapping scheme to be selectively changed depending upon the modulation protocol used. The multi-protocol modulator further includes a phase rotator operatively coupled to the output of the m-PSK modulator. The phase rotator selectively rotates the phase of the m-PSK signal by a predetermined phase rotation value. The phase rotator is shared by the two or more modulation protocols by allowing the phase rotation value to be selectively modified depending upon the modulation protocol used.

Abstract: A digital data modulator is coupled to a source of a digital data signal. An encoder encodes the digital data using a variable pulse width code. A pulse signal generator generates pulses representing edges of the encoded digital data signal. A carrier signal generator generates a carrier signal having carrier pulses corresponding to the pulses from the pulse signal generator. A corresponding digital data demodulator is coupled to a source of a modulated signal having carrier pulses spaced relative to each other to represent a variable pulse width encoded digital data signal. A detector generates a variable pulse width encoded signal in response to received carrier pulses. A decoder decodes the variable pulse width encoded signal to generate the digital data signal.

Abstract: A digital data modulator is coupled to a source of a digital data signal having a data bit period, and a source of an auxiliary data signal. An encoder encodes the digital data using a variable pulse width code having edges occurring in an interval within the data bit period. A pulse signal generator, generates respective pulses representing the edges of the encoded digital data signal. A carrier signal generator generates a carrier signal having carrier pulses corresponding to the respective pulses during the interval, and modulated by the auxiliary data signal otherwise. A digital data demodulator is coupled to a source of a modulated signal including successive bit periods, each having a first interval containing a carrier pulse, spaced relative to other carrier pulses, to represent a variable pulse width encoded digital data signal, and a second interval during which the carrier is modulated with an auxiliary data signal.

Abstract: A signal having one of a plurality of modulation formats is formed by encoding first data in accordance with a particular one of the modulation formats. The encoded first data is then combined with second data identifying the particular modulation format of the encoded first data to form the signal.

Abstract: Channel estimation is performed for a received signal, wherein different parts of the received signals are modulated using different modulation types. The channel is first estimated based on part of a received signal modulated with a first modulation type. This channel estimate is then transformed into a channel estimate corresponding to at least a second modulation type.

Abstract: A multi-rate data modulation circuit includes a multi-rate data conversion circuit and a modulator such as a direct digital synthesis circuit. The multi-rate data conversion circuit receives digital data at varying data rates, receives a data rate input corresponding to the digital data and converts the digital data to a converted output based upon the data rate input. The direct digital synthesis circuit receives the converted output and synthesizes a modulated output signal based upon the converted output. The multi-rate data conversion circuit may include a multi-rate converter, a multi-rate digital data filter, an output scaler and an adder. The multi-rate converter receives the digital data, the data rate input and a clock signal and converts the digital data to converted digital data. The multi-rate digital data filter receives the converted digital data and produces a filtered digital output. The output scaler receives the filtered digital output and produces a scaled and filtered digital output.

Abstract: A method for transforming digital amplitude as well as phase or frequency modulation information into analog signals for controlling analog amplifier circuitry, comprises:

Abstract: A digital data modulator includes a source of a plurality of digital data signals having a common data bit period. A plurality of encoders each encode a corresponding one of the plurality of digital data signals using a variable pulse width code having edges occurring in respective non-overlapping intervals within the data bit period. A plurality of pulse signal generators each generate respective pulses representing the edges of the corresponding one of the encoded plurality of digital data signals. A carrier signal generator generates a carrier signal having carrier pulses corresponding to the respective pulses.

Abstract: In a satellite mobile telephone a radio signal is transmitted by firstly generating (602) a digital input signal. The digital input signal is processed (703) in combination with a digital modulating signal (704) to produce a digital intermediate signal. The digital intermediate signal is converted (705) into an analog intermediate signal and said analog intermediate signal is processed (706) in combination with an analog modulating signal to produce a radio frequency output signal. Similarly, during reception, a received signal is processed in combination with an analog demodulating signal to produce an analog intermediate signal. The analog intermediate signal is sampled to produce a digital intermediate signal and said digital intermediate signal is processed in combination with a digital demodulating signal so as to select a transmitted channel.

Abstract: In a radio communication system (100), enhanced communication capability is provided while maintaining standard channel modulation compatibility. At a transmitter (110, 200, 600), a first information signal is generated from data according to a predefined standard modulation scheme (212, 613). A second information signal is generated from data that provides supplemental information to the standard modulated data (213, 616). For transmission, the first and second information signals are combined into a composite signal (214, 619) that represents the first information signal when interpreted according to the predefined standard modulation scheme.

Abstract: An apparatus connects a data processing system (10) with an analog telephone line and/or an ISDN line. The apparatus modulates and demodulates data from the data processing system (10) to either of the two different telephone protocols without adding unnecessary expense or noise to the system.

Abstract: A method and apparatus for generating a modulated signal include a pulse modulation source (215), a pulse modulator (20) for modulating a pulsed signal, a high efficiency power amplifier (230) for amplifying the modulated pulsed signal, and a harmonic reduction filter (240) for passing the switching frequency of the pulsed signal as the RF carrier. The pulse modulation source (215) accepts baseband inphase and quadrature signals and determines phase values and duty ratios for modulating the pulsed signal. The pulse modulator (20) phase modulates and duty cycle modulates the pulsed signal before it is amplified and filtered. A quadrature demodulator (260) produces baseband inphase and quadrature feedback signals for increased linearity.

Abstract: This contribution involves the generation, transmission, propagation and selective reception of electrical, magnetic or electromagnetic energy in the form of a halfwave sinusoidal pulse signal, from one location to another, whereby intelligence input for transmission is recovered from one sinusoidal pulse, or from a plurality of sinusoidal pulses. In a transmitter embodiment, one or more sinusoidal halfwave pulse generators are provided, where each pulse signal may be generated asynchronously, with varying polarity, duration and amplitude on a continuous serial sampled information basis. Complementary pulse signal filtering and recovering of transmitted intelligence is provided in a signal receiver embodiment. Another transmitter embodiment includes a software-driven signal synthesizing capability, wherein a plurality of timed sinusoidal halfways pulses are linearly summed as elementary signal components of an information-carrying propagable signal.

Abstract: A multiple-modulation communication system includes a transmitter that modulates and transmits communication signals modulated by a first modulation technique and communication signals modulated by a second modulation technique. The first modulation technique and the second modulation technique are different. The communication system also includes a receiver capable of receiving the communication signals modulated by the first modulation technique and the communication signals modulated by the second modulation technique and demodulating the communication signals.

Abstract: A switched-inverter modulator for use in driving a load that comprises master and slave high voltage power supplies for providing output pulses that directly drive the load. A synchronized pulse generator provides pulse width tinting and synchronized amplitude commands to the master power supply. The timing pulse instructs the power supplies when to initiate high voltage and for what time interval. The analog waveform instructs the master power supply as to what high voltage level to obtain. The master power supply may have multiple slaves connected in parallel for additional current capacity. A low voltage DC capacitor bank is connected in parallel with each of the power supplies to supplement energy storage. Isolation resistors are coupled between outputs of the respective high voltage power supplies and the load to minimize temporary shorts from ringing back into the power supplies.

Abstract: An amplitude modulated RF amplifier using dual path modulation to increase operating efficiency. Both the RF drive to the amplifier and the DC power supply voltage to the amplifier are amplitude modulated. Preferably, the power supply modulation is accomplished with a high efficiency pulse width modulator circuit. To prevent phase shift distortion, the modulated DC output from the power supply is used both to power the RF amplifier and to amplitude modulate the RF drive to the amplifier. For maximum efficiency, the modulators are both non-linear. Maximum efficiency is realized with primarily supply modulation and some drive modulation providing the positive envelope modulation and primarily a non-linear RF drive modulation providing the negative envelope modulation. The use of primarily RF drive modulation for the deep negative modulation will reduce the amount of incidental phase modulation experienced, while having a nearly inconsequential effect on total efficiency of the RF amplifier.

Abstract: A transmission link for transmitting a sequence of signals comprising pulse and interval signals, across a transmission medium from a transmitter to a receiver circuit of a receiver, whereby each pulse signal is modulated with a frequency. At least two frequencies are used to modulate the pulses, and a separate evaluation circuit is provided in the receiver for each modulating frequency. The output signals of the evaluation circuits are concatenated (linked in series) by a AND-gate circuit.

Abstract: A modulator provides a continuous signal format composed of discrete freqcy steps and is designed to eliminate frequency overlap or smearing normally associated with filter ringing.

Abstract: An apparatus is provided which is responsive to a multiple bit sample of digital information for producing a pulse width modulated signal, the apparatus comprising: a first signal match detector, responsive to a first subset of the multiple bit sample, for producing a first signal that can transition between first and second logical states; a second signal match detector, responsive to a second subset of the multiple bit sample, for producing a second signal that can transition between the first and second logical states; and a voltage summing circuit for producing a first voltage that is substantially proportional to a magnitude of the first signal in one of the first logical state and the second logical state and for producing a second voltage that is substantially proportional to a magnitude of the second signal in one of the first logical state and the second logical state and for producing an output voltage that is substantially proportional to a sum of the first voltage and the second voltage.