With Impedance Matching Patents (Class 333/124)
  • Patent number: 7671702
    Abstract: A power combiner comprising an LC lattice structure is shown, together with a method for generating a planar wave front. The LC structure can comprise constant or voltage dependent capacitors. Either the delay or the characteristic impedance of the two-dimensional transmission line formed by the LC lattice structure are kept constant. A planar wave propagating along one direction of the transmission line gradually experiences higher impedances at the edges, creating a lower resistance path for the current in the middle. This funnels more power to the center as the wave propagates.
    Type: Grant
    Filed: October 16, 2008
    Date of Patent: March 2, 2010
    Assignee: California Institute of Technology
    Inventors: Ehsan Afshari, Harish Bhat, Seyed Ali Hajimiri
  • Publication number: 20100013572
    Abstract: Apparatus and methods are provided for a power matching apparatus for use with a processing chamber. In one aspect of the invention, a power matching apparatus is provided including a first RF power input coupled to a first adjustable capacitor, a second RF power input coupled to a second adjustable capacitor, a power junction coupled to the first adjustable capacitor and the second adjustable capacitor, a receiver circuit coupled to the power junction, a high voltage filter coupled to the power junction and the high voltage filter has a high voltage output, a voltage/current detector coupled to the power junction and a RF power output connected to the voltage/current detector.
    Type: Application
    Filed: July 21, 2009
    Publication date: January 21, 2010
    Applicant: APPLIED MATERIALS, INC.
    Inventors: STEVEN C. SHANNON, JANG GYOO YANG, MATTHEW L. MILLER, KARTIK RAMASWAMY, JAMES P. CRUSE
  • Publication number: 20100001810
    Abstract: A coupler including: a first conductive line intended to convey a signal to be transmitted between first and second terminals; a second conductive line, coupled to the first one and having one end intended to provide, on a third terminal, data relative to a signal reflected on the second terminal; and an inductive and/or capacitive impedance matching circuit, interposed between the other end of the second line and a fourth terminal of the coupler.
    Type: Application
    Filed: June 29, 2009
    Publication date: January 7, 2010
    Applicant: STMicroelectronics (Tours) SAS
    Inventors: Sylvain Charley, Francois Dupont, Hilal Ezzeddine
  • Publication number: 20090273413
    Abstract: A power divider integrated circuit is provided. The power divider integrated circuit includes a substrate and a power divider circuit formed on one side of the substrate.
    Type: Application
    Filed: May 1, 2008
    Publication date: November 5, 2009
    Inventors: Wen Hui Zhang, Jeffrey H. Bienstock
  • Patent number: 7573839
    Abstract: A second output transmission signal (“TX2”) added to a line driver is a scaled version of the main output transmission signal (“TX1”). TX2 is scaled from TX1 by a variable scale factor K. An adaptive hybrid circuit subtracts TX1 and TX2 from a line signal carrying both a line transmission signal and a line received signal (“RX”). A programmable impedance Ztune is coupled between the TX2 output of the line driver and the RX output of the adaptive hybrid circuit. A transmission echo in the output RX signal is measured. K and Ztune are then adaptively tuned to minimize the transmission echo. The hybrid in this case becomes a 4-port network, one port specifically added to adaptively cancel the transmission echo in the RX output of the adaptive hybrid circuit. Alternatively, the hybrid may be a 3-port hybrid including variable impedances to cancel the line transmission signal.
    Type: Grant
    Filed: December 3, 2004
    Date of Patent: August 11, 2009
    Assignee: Broadcom Corporation
    Inventors: Tom Kwan, Sumant Ranganathan
  • Publication number: 20090128441
    Abstract: The connection topology of input terminals 2, elements 4a, 4b, 4c and 4d and load 5 is designed similarly to a so-called “seven-segment display”, which is often used to display numerals on an electronic calculator or a digital watch. More specifically, suppose in the three horizontally running segments, the top and bottom segments are associated with the input terminals 2 and the load 5 is allocated to one of the four vertically running segments. Then, the three other vertical segments and the other horizontal segment are associated with the elements 4a, 4b, 4c and 4d, which are a capacitor with a capacitance of 0.573 pF, an inductor with an inductance of 5.013 nH, a capacitor with a capacitance of 0.692 pF, and an inductor with an inductance of 2.543 nH, respectively. By adopting this circuit configuration, the total number of elements can be reduced to four and the loss can be reduced significantly.
    Type: Application
    Filed: January 12, 2009
    Publication date: May 21, 2009
    Applicant: PANASONIC CORPORATION
    Inventor: Ushio SANGAWA
  • Patent number: 7536155
    Abstract: A wireless communication device that is attached or included in an electronic object, such as a portable computer, having its own separate communication system. The separate communication system has an antenna for receiving and transmitting wireless communications, and is powered by a power supply included in the object. Since the separate communication system can only communicate when powered, a separate passive wireless communication device is provided for wireless communication that does not require power from the power supply to communicate. The wireless communication device is interfaced with the existing antenna of the separate communication system so that the wireless communication device and separate communication system share a common antenna to reduce cost. The antenna may also be interconnected to a controller associated with the object so that the controller can directly communicate to the wireless communication device.
    Type: Grant
    Filed: August 31, 2006
    Date of Patent: May 19, 2009
    Inventors: Ian J Forster, Peter Robert George Horrell
  • Publication number: 20090121960
    Abstract: The connection topology of input terminals (2), elements (4a, 4b, 4c and 4d) and load (5) is designed similarly to a “seven-segment display” that is often used to display numerals on a calculator or a digital watch. Specifically, suppose in the three horizontally running segments of the seven-segment display, the top and bottom ones are associated with the input terminals (2) and the load (5) is allocated to the other horizontal one. Then, the other four vertical segments are associated with the elements (4a, 4b, 4c and 4d), which may be an inductor with an inductance of 4.030 nH, an inductor with an inductance of 11.208 nH, an inductor with an inductance of 2.497 nH, and a capacitor with a capacitance of 2.233 pF, respectively. By adopting this circuit configuration, the total number of elements can be reduced to four and the loss can be reduced significantly.
    Type: Application
    Filed: January 12, 2009
    Publication date: May 14, 2009
    Applicant: PANASONIC CORPORATION
    Inventor: Ushio SANGAWA
  • Publication number: 20090121962
    Abstract: The connection topology of input terminals (2), elements (4a, 4b, 4c and 4d) and load (5) is designed similarly to a “seven-segment display” that is often used to display numerals on a calculator or a digital watch. Specifically, suppose in the three horizontally running segments of the seven-segment display, the top and bottom ones are associated with the input terminals (2) and the load (5) is allocated to the other horizontal one. Then, the other four vertical segments are associated with the elements (4a, 4b, 4c and 4d), which may be an inductor with an inductance of 2.521 nH, an inductor with an inductance of 76.157 nH, an inductor with an inductance of 1.907 nH, and a capacitor with a capacitance of 1.429 pF, respectively. By adopting this circuit configuration, the total number of elements can be reduced to four and the loss can be reduced significantly.
    Type: Application
    Filed: January 12, 2009
    Publication date: May 14, 2009
    Applicant: PANASONIC CORPORATION
    Inventor: Ushio SANGAWA
  • Publication number: 20090121961
    Abstract: The connection topology of input terminals 2, elements 4a, 4b, 4c and 4d and load 5 is designed similarly to a so-called “seven-segment display”, which is often used to display numerals on an electronic calculator or a digital watch. More specifically, suppose in the three horizontally running segments, the top and bottom segments are associated with the input terminals 2 and the load 5 is allocated to one of the four vertically running segments. Then, the three other vertical segments and the other horizontal segment are associated with the elements 4a, 4b, 4c and 4d, which are an inductor with an inductance of 5.119 nH, a capacitor with a capacitance of 1.370 pF, an inductor with an inductance of 8.360 nH and a capacitor with a capacitance of 5.942 pF, respectively. By adopting this circuit configuration, the total number of elements can be reduced to four and the loss can be reduced significantly.
    Type: Application
    Filed: January 12, 2009
    Publication date: May 14, 2009
    Applicant: PANASONIC CORPORATION
    Inventor: Ushio SANGAWA
  • Publication number: 20090115549
    Abstract: A front-end circuit of the wireless transceiver is disclosed to reduce the number of the pin count of the chip, and achieve the impedance matching. The circuit comprises an antenna unit, a receiver, and a transmitting block, all of which are connected together, wherein there is no switch provided between the receiver and the antenna unit, such that the loss of switch can be avoided for reducing the noise figure and improve the sensitivity of the receiving path accordingly.
    Type: Application
    Filed: November 5, 2008
    Publication date: May 7, 2009
    Applicant: AIROHA TECHNOLOGY CORP.
    Inventor: Chien-Kuang Lee
  • Patent number: 7492239
    Abstract: An electronic circuit, an RF signal power amplifier circuit, and an integrated circuit provide for combining two radio frequency signals. These circuits include, among other things, capacitors (276, 282) that provide an elliptic section. This elliptic section simultaneously allows for filtering and reduction in required values for first and second inductors (248, 272), respectively. For example, the filtering provided by the capacitors (276, 282) allows for the harmonic of the combining frequency to be filtered out. This allows a designer to compensate for additional loss experienced by the circuit (200) by reducing filtering from sections that follow the circuit (200).
    Type: Grant
    Filed: October 16, 2007
    Date of Patent: February 17, 2009
    Assignee: Motorola, Inc.
    Inventor: George R. Sarkees
  • Publication number: 20090039978
    Abstract: Systems and methods for a coupling device are shown. In various embodiments, a variable frequency divider comprises a first transmission line and a second transmission line. The first transmission line may comprise a first and a second end. The first end may comprise a first terminal and the second end may comprise a first branch and a second branch. The first transmission line may be configured to receive a first signal at a first frequency at the first terminal and divide the first signal to output the divided first signal at the first branch and the second branch. The second transmission line may be proximate the first transmission line and configured to receive a second signal at a second frequency to control the frequencies of the output divided first signal at the first branch and the second branch through electromagnetic influence between the first transmission line and the second transmission line.
    Type: Application
    Filed: October 22, 2008
    Publication date: February 12, 2009
    Applicant: Harris Stratex Networks, Inc.
    Inventor: Bahram Razmpoosh
  • Publication number: 20090021325
    Abstract: A front end module is disclosed. The front end module includes a plurality of antennas receiving different frequency band signals, respectively, an impedance matching circuit unit comprising a plurality of tuners respectively connected to the plurality of antennas to control impedance matching, a selection unit selecting one frequency band signal from multiple frequency band signals passing through the impedance matching circuit unit, a measuring unit measuring signal strength of a received signal selected at the selection unit, and a control unit controlling an operation of the selection unit and an impedance of the tuner according to the signal strength of the received signal measured at the measuring unit.
    Type: Application
    Filed: July 18, 2008
    Publication date: January 22, 2009
    Applicant: Sumsung Electro-Mechanics Co., Ltd.
    Inventors: Jae CHAN LEE, Joong Han Yoon, Gi Ho Han, Seok Min Woo, Dong Hyun Kim, Hyun Hak Kim
  • Publication number: 20080303609
    Abstract: In power line communications using carrier waves of high frequencies in the MHz range such as 2 to 30 MHz, when a coaxial cable for performing transmission of signals and a power line are signal-coupled using a capacitive signal coupling unit, even if an impedance matching circuit is installed in the capacitive signal coupling unit, we have found that leakage current of levels that cannot be neglected from leakage noise considerations flows through the outer sheath of the coaxial cable that transmits the signals, and, accordingly, leaking electromagnetic waves induced by the leakage current flowing through the coaxial cable due to impedance mismatch between the power line and the capacitive signal coupling unit are reduced by an impedance member showing high impedances at high frequencies in the MHz range.
    Type: Application
    Filed: November 21, 2007
    Publication date: December 11, 2008
    Applicant: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Junichi ABE, Yuichiro Murata
  • Patent number: 7461188
    Abstract: The signal integrity of a high speed heavily loaded multidrop memory bus is often degraded due the numerous impedance mismatches. The impedance mismatches causes the bus to exhibit a nonlinear frequency response, which diminishes signal integrity and limits the bandwidth of the bus. A compensating element, such as a capacitor which ties the bus to a reference plane (e.g., a ground potential), or an inductor wired in series with the bus, is located approximately midway between the memory controller and the memory slots. The use of the compensating element equalizes signal amplitudes and minimizes phase errors of signals in an interested frequency range and diminishes the amplitudes of high frequency signals which exhibit high degrees of phase error. The resulting bus structure has increased desirable harmonic content with low phase error, thereby permitting the bus to exhibit better rise time performance and permitting a higher data transfer rate.
    Type: Grant
    Filed: August 20, 2007
    Date of Patent: December 2, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Roy Greeff, Terry R. Lee
  • Patent number: 7456704
    Abstract: A power combiner comprising an LC lattice structure is shown, together with a method for generating a planar wave front. The LC structure can comprise constant or voltage dependent capacitors. Either the delay or the characteristic impedance of the two-dimensional transmission line formed by the LC lattice structure are kept constant. A planar wave propagating along one direction of the transmission line gradually experiences higher impedances at the edges, creating a lower resistance path for the current in the middle. This funnels more power to the center as the wave propagates.
    Type: Grant
    Filed: April 28, 2006
    Date of Patent: November 25, 2008
    Assignee: California Institute of Technology
    Inventors: Ehsan Afshari, Harish Bhat, Seyed Ali Hajimi{grave over (r)}i
  • Publication number: 20080284539
    Abstract: A small, high performance, multifunctional high frequency circuit that is multiband and multimode compatible reduces loss from a switch formed on the output side of a final stage amplification unit. The final stage amplification unit power amplifies an input signal and outputs an amplified signal. A first matching circuit impedance converts the amplified signal input thereto at a first input impedance, and outputs a first impedance-converted signal at a first output impedance. A control unit that generates a control signal denoting signal path selection information. A switch unit selects one of at least two signal paths based on the control signal, passes the first impedance-converted signal at an on impedance through the selected path, and outputs the pass signal. A second matching circuit impedance converts a pass signal input thereto at a second input impedance, and outputs a second impedance-converted signal at a second output.
    Type: Application
    Filed: May 12, 2008
    Publication date: November 20, 2008
    Applicant: Matsushita Electric Industrial Co., Ltd.
    Inventors: Kazuki TATEOKA, Masahiko Inamori, Shingo Matsuda, Kazuhiko Ohashi, Haruhiko Koizumi
  • Publication number: 20080284538
    Abstract: A printed circuit board includes a signal layer, a first reference plane layer, and a second reference plane layer. At least one transmission line is arranged on the signal layer. The transmission line includes a main transmission line, and two branch transmission lines connected to an end of the main transmission line. The first reference plane layer is disposed below the signal layer for the main transmission line. The second reference plane layer is disposed below the first reference plane layer for the branch transmission lines, to increase impedance of the two branch transmission lines.
    Type: Application
    Filed: August 7, 2007
    Publication date: November 20, 2008
    Applicant: HON HAI PRECISION INDUSTRY CO., LTD.
    Inventor: SHOU-KUO HSU
  • Publication number: 20080169882
    Abstract: A filter includes: a first acoustic wave filter having acoustic wave filters cascaded, an input stage of the acoustic wave filters including a first multimode filter; a second acoustic wave filter having acoustic wave filters cascaded, an input stage of these acoustic wave filters including a second multimode filter having an aperture length different from that of the first multimode filter, the second acoustic wave filter receiving an unbalanced in signal applied to the first acoustic wave filter, and having a pass band that does not overlap with that of the first acoustic wave filter.
    Type: Application
    Filed: January 10, 2008
    Publication date: July 17, 2008
    Applicant: FUJITSU MEDIA DEVICES LIMITED
    Inventors: Satoru ONO, Osamu KAWACHI, Hidemitsu KUBOI, Kouta OHKUBO
  • Patent number: 7395028
    Abstract: A satellite antenna switching apparatus has LNB ports to which LNBs are connected, receiver ports to which receivers that exchange signals with the LNBs are connected, cascade ports to which another switching apparatus is cascade-connected, and impedance circuits that function as means for detecting the signals exchanged between the LNBs and receivers. The impedance circuits provide impedances according to the connection states of the cascade ports, and are electrically disconnected from the signal paths when another switching apparatus is cascade-connected to the cascade ports. With this configuration, the satellite antenna switching apparatus suffers from less attenuation of the exchanged signals even in a cascade connection of a plurality of stages of switching apparatuses.
    Type: Grant
    Filed: February 13, 2004
    Date of Patent: July 1, 2008
    Assignee: Sharp Kabushi Kaisha
    Inventor: Tetsuhide Okahashi
  • Patent number: 7388452
    Abstract: A network system is provided with a joint connector for branching a communication line to plural lines respectively linked with plural nodes, the joint connector is provided with terminals for respectively linking with plural nodes, and circuits respectively having characteristic impedances, the circuits respectively linking adjacent pairs of the terminals.
    Type: Grant
    Filed: June 24, 2005
    Date of Patent: June 17, 2008
    Assignee: Yazaki Corporation
    Inventors: Katsuya Fujihira, Sayaka Aoshima
  • Publication number: 20080116993
    Abstract: A piezoelectric filter which has a small circuit scale and device size and can reduce a loss, is provided. The piezoelectric filter (1) has an input impedance smaller than an output impedance. The piezoelectric filter (1) comprises an input terminal (101a), an output terminal (101b), series piezoelectric resonators (102a, 102b, 102c), and parallel piezoelectric resonators (103a, 103b, 103c). Among the parallel piezoelectric resonators (103a, 103b, 103c), on an equivalent circuit, a capacitance of a first parallel piezoelectric resonator (103a) close to the input terminal (101a) side is larger than a capacitance of a second parallel piezoelectric resonator (103c) close to the output terminal (101b) side.
    Type: Application
    Filed: February 21, 2006
    Publication date: May 22, 2008
    Inventors: Takehiko Yamakawa, Hiroyuki Nakamura, Keiji Onishi
  • Publication number: 20080074210
    Abstract: A signal splitter includes a common mode choke circuit that includes a first choke coil having two input nodes coupled to an incoming telephone line, and two output nodes coupled respectively to two first input nodes of a first filter inductor of a first filter circuit, and a second choke coil having two input nodes coupled respectively to two second output nodes of a second filter inductor of a third filter circuit, and two output nodes coupled to a telephony instrument. A second filter circuit includes a first capacitor coupled between two first output nodes of the first filter inductor that are coupled respectively to two second input nodes of the second filter inductor. The third filter circuit further includes a second capacitor coupled between the second output nodes of the second filter inductor.
    Type: Application
    Filed: September 8, 2006
    Publication date: March 27, 2008
    Applicant: YCL Electronics Co., Ltd.
    Inventors: Yung-Sheng Chen, Wen-Chung Liu
  • Patent number: 7330703
    Abstract: The present invention relates to a transceiver for bidirectional frequency division multiplexed transmission, a communication system including one or more transceivers. Optionally, the communication system is a communication system for a digital subscriber line. The transceiver comprises transmission means with a voltage source output or a current source output for transmitting data in a transmission frequency range, receiving means for receiving data in a receiving frequency range, and a coupling impedance for connecting the transmission means and the receiving means to a transmission medium. The magnitude of the coupling impedance in the transmission frequency range is smaller than the magnitude of the coupling impedance in the receiving frequency range if the transmission means has a voltage source output and is higher than the magnitude of the coupling impedance in the receiving frequency range if the transmission means has a current source output.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: February 12, 2008
    Assignee: Broadcom Corporation
    Inventor: Rudi Verbist
  • Patent number: 7286026
    Abstract: A coupling network has a first power line interface port and a power line modem interface configured to be coupled to a power line modem transceiver. An inductor-capacitor circuit coupled to the power line modem interface has a low-impedance resonant frequency at a signal frequency of the power line modem transceiver. An inductor having a corner frequency between the signal frequency and the power line frequency has a first end and a second end. The first end of the inductor is connected to the inductor-capacitor circuit and a second end of the inductor is coupled to an alternating current ground coupled to the transceiver ground. The inductor couples the first power line interface port to a power supply interface port.
    Type: Grant
    Filed: September 2, 2004
    Date of Patent: October 23, 2007
    Assignee: Avago Technologies Ecbu IP (Singapore) Pte. Ltd.
    Inventor: Robinson Peng Seng Law
  • Patent number: 7287108
    Abstract: The signal integrity of a high speed heavily loaded multidrop memory bus is often degraded due the numerous impedance mismatches. The impedance mismatches causes the bus to exhibit a nonlinear frequency response, which diminishes signal integrity and limits the bandwidth of the bus. A compensating element, such as a capacitor which ties the bus to a reference plane (e.g., a ground potential), or an inductor wired in series with the bus, is located approximately midway between the memory controller and the memory slots. The use of the compensating element equalizes signal amplitudes and minimizes phase errors of signals in an interested frequency range and diminishes the amplitudes of high frequency signals which exhibit high degrees of phase error. The resulting bus structure has increased desirable harmonic content with low phase error, thereby permitting the bus to exhibit better rise time performance and permitting a higher data transfer rate.
    Type: Grant
    Filed: March 9, 2004
    Date of Patent: October 23, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Roy Greeff, Terry R. Lee
  • Publication number: 20070205848
    Abstract: A termination circuit is connected to an input buffer receiving a data signal, and includes at least one termination resistor connected to the input buffer for impedance matching. At least one switch controls a connection between the input buffer and a corresponding one of the at least one termination resistors. A control signal generator generates a control signal for selectively enabling the termination circuit by controlling each of the at least one switches. The control signal has an input period less than or equal to an input period of a data signal.
    Type: Application
    Filed: January 5, 2007
    Publication date: September 6, 2007
    Inventors: Kwang-Soo Park, Jae-Jun Lee, Jong-Hoon Kim, Hoe-Ju Chung
  • Patent number: 7224180
    Abstract: A method for maintaining signal integrity of a differential output signal generated from a differential driver is disclosed. The method includes receiving the differential output signal from the differential driver. Once received, the method includes tuning the differential output signal by exposing the differential output signal to an inductance. The inductance is configured to reduce signal mismatch between complementary signals of the differential output signal. The signal mismatch is a result of having each of the complementary signals exposed to different capacitive loading. A device and system is also provided, which include integrating an inductor between the output leads of a differential driver. The inductor is sized for the particular frequency of operation, and the inductor provides an inductance that assists in eliminating mismatch between the complementary signals of the differential output.
    Type: Grant
    Filed: November 18, 2004
    Date of Patent: May 29, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Michael Hargrove, David Meltzer
  • Patent number: 7218185
    Abstract: A filter circuit is provided wherein one end of an inductor is connected to one end of a capacitor to form a signal input end. The other end of the inductor is connected to a first switch circuit, and the other end of the capacitor is connected to a second switch circuit. When a lower-frequency signal in a 2.4 GHz band is to be inputted, a low-pass filter circuit is formed by connecting the other end of the inductor to a signal output end and the other end of the capacitor to ground, and when a higher-frequency signal in a 5 GHz band is to be inputted, a high-pass filter circuit is formed by connecting the other end of the inductor to ground and the other end of the capacitor to the signal output end, by manipulating the first and second switch circuits.
    Type: Grant
    Filed: September 17, 2004
    Date of Patent: May 15, 2007
    Assignee: Seiko Epson Corporation
    Inventors: Toru Watanabe, Makoto Inoguchi
  • Patent number: 7215762
    Abstract: A method of selecting an optimum impedance for a loop start trunk line, comprising successively applying respective ones of a plurality of impedance settings to the loop start trunk line, for each impedance setting measuring the impulse response of the trans-hybrid echo path by applying audio test signals to obtain a time-domain trans-hybrid transfer function and deriving a frequency-domain spectrum representative of trans-hybrid loss, and then calculating figure of merit of the transfer function based on the power spectrum. Once all impedance settings have been tested, the optimum impedance is selected as the impedance setting associated with the highest calculated figure of merit.
    Type: Grant
    Filed: February 16, 2005
    Date of Patent: May 8, 2007
    Assignee: Mitel Networks Corporation
    Inventors: Yonghua Fang, Mirjana Popovic, Dieter Schulz
  • Patent number: 7212789
    Abstract: The method and apparatus herein identifies tunable duplexer in a communication system. The tunable duplexer includes a tunable receiver filter, a tunable transmitter filter, a variable receiver phase shifter, and variable transmitter phase shifter. Each filter and phase shifter is optimized based on characteristics of impedance within the duplexer. The duplexer may be adjusted to changing environments or desired changes in the frequency of operation, reducing circuitry architecture and providing greater flexibility in communication function. The method commences by tuning tunable filters within the duplexer and then optimizing phase shifters within the duplexer for adjusting impedance matching with antenna and isolating the receiver from the transmitter during duplexing operations. Optimizations and calibration may be performed during manufacture, upon initialization of the system, or during operation of the communication device.
    Type: Grant
    Filed: December 30, 2002
    Date of Patent: May 1, 2007
    Assignee: Motorola, Inc.
    Inventor: Stephen L. Kuffner
  • Patent number: 7190933
    Abstract: Disclosed is a circuit and method for automatic tuning of a resonant circuit in a transceiver having a receiver and a transmitter that includes a power amplifier for driving the resonant circuit. During a transmit mode of the transceiver, a resonance voltage of the resonant circuit is compared to an input voltage signal to the power amplifier to determine an error signal that is converted into a control word. The control word drives an adjustable capacitance bank that is part of the resonant circuit. During a receive mode of the transceiver, the control word value is held constant to substantially maintain resonance of the resonant circuit during operation of the receiver.
    Type: Grant
    Filed: July 15, 2004
    Date of Patent: March 13, 2007
    Assignee: Intergration Associates Inc.
    Inventors: Hendricus De Ruijter, Gábor Tóth, Péter Onódy, András Hegyi, Attila Zólomy, Matthijs D. Pardoen, János Erdélyi, Ferenc Mernyei
  • Patent number: 7142833
    Abstract: A matching unit includes a switching means for switching an inductance of a first inductor. This switching means sets an inductance such that a first inductor shows an inductance property to both of the VHF low-band and high-band, and shows a capacitance property to the UHF band. This structure allows the matching unit to achieve the matching for both the VHF low-band and high-band by just switching the two circuits of the VHF low-band and high-band, also allows the matching unit to show a capacitance property to the UHF band. Thus the loss produced in transmitting signals can be reduced, and the circuit can be simplified. As a result, the matching unit can be downsized, and the cost can be reduced.
    Type: Grant
    Filed: November 13, 2003
    Date of Patent: November 28, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasuhiro Hibino, Ryuichi Kamimoto, Akira Ito
  • Patent number: 7138886
    Abstract: A wideband high frequency signal splitter device utilized in a signal distribution network is disclosed. An input signal having a substantially extended frequency bandwidth is applied to an input port of the proposed signal splitter from the upstream portion of a signal distribution network. Within the signal splitter the signal is suitably divided into its constituent components. The constituent components include a low frequency component, a high frequency component and an AC current power component. The components are divided separately and re-routed to combiner units associated with suitable output ports. The separate components are combined and fed through the output ports to the downstream portion of the signal distribution network. The signal splitter device is also functional as a signal combiner device by combining separate signals received from the downstream portion of the network via the output ports and transmitting the combined signals to the upstream portion of the signal distribution network.
    Type: Grant
    Filed: May 2, 2002
    Date of Patent: November 21, 2006
    Assignee: Xtend Networks Ltd.
    Inventors: Yeshayahu Strull, Oleg Dounaevski, Eli Barshishat
  • Patent number: 7123884
    Abstract: A radio frequency (RF) switch which is used in an RF unit of a communication apparatus and which has less of an insertion loss during a transmission. A strip line disposed in the RF switch is formed by combining first and second strip lines having different values of characteristic impedance from each other.
    Type: Grant
    Filed: February 28, 2001
    Date of Patent: October 17, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd
    Inventors: Hideaki Nakakubo, Tomoyuki Iwasaki
  • Patent number: 7113759
    Abstract: A controller area network transceiver and a transmission method for a controller area network provides improved symmetry between its differential output signal CANH and CANL such that capacitive imbalance is minimized. The transceiver disclosed herein includes a driver including a non-inverted output that couples to the first output terminal CANH and a inverted output that couples to the second output terminal CANL. A receiver comparator includes a non-inverted input coupled to the first output terminal CANH and a inverted input coupled to the second output terminal CANL. A first and second impedance matching circuit portions capacitively balance the first and second output terminals such that efficient common-mode rejection is enabled by setting the RC time constants formed by each impedance matching circuit and external resistances to be substantially equivalent.
    Type: Grant
    Filed: August 28, 2002
    Date of Patent: September 26, 2006
    Assignee: Texas Instruments Incorporated
    Inventors: Ricky D. Jordanger, Anton M. Antonsen
  • Patent number: 7091849
    Abstract: Disclosed is a method and apparatus for reducing inbound interference in a broadband powerline communication system. Data modulated on first and second carrier frequencies is received via respective first and second lines of the powerline system. A characteristic of at least one of the carrier signals (e.g., phase or amplitude) is adjusted at the receiver in order to reduce the effects of inbound interference on the transmission system. The adjustment parameters may be determined by adjusting the parameters, during a period of no data transmission, until the output of a differential receiver is zero.
    Type: Grant
    Filed: May 6, 2004
    Date of Patent: August 15, 2006
    Assignee: AT&T Corp.
    Inventor: Paul Shala Henry
  • Patent number: 7091872
    Abstract: A transmitter for a line locator system that controls the electrical current, voltage or power applied to the target line is disclosed. Control of the electrical output of the transmitter can be achieved passively or by means of a feedback control system. A transmitter connected directly to a line can include an operator control and monitoring of current being supplied to a line to be located. Some transmitters include a current regulating circuit that controls current supplied to a line. In some transmitters, feedback controllers and feedback loops are used to regulate output current, voltage or power. Some control loops are based on monitoring currents in circuits; some control loops monitor power output from an inductive mode transmitter antenna. An inductively coupled transmitter with power output control is also disclosed.
    Type: Grant
    Filed: July 1, 2002
    Date of Patent: August 15, 2006
    Assignee: Metrotech Corporation
    Inventors: Russell N. Bigelow, Stevan Polak, James Long, Joseph Shtargot
  • Patent number: 7089032
    Abstract: A radio transmitting/receiving device having at least three modules. The first module includes a first function for amplifying a radio frequency signal, demodulating the amplified radio frequency signal to a baseband signal and outputting the same, and a second function for modulating the input baseband signal, converting the modulated baseband signal to a radio frequency and outputting the same. The second module includes a function for amplifying the input radio frequency. The third module includes a function for executing a baseband signal process and controlling respective units according to a transmission/reception sequence based on a communication protocol.
    Type: Grant
    Filed: August 20, 2001
    Date of Patent: August 8, 2006
    Assignee: Renesas Technology Corporation
    Inventors: Toyohiko Hongo, Toshinori Hirashima
  • Patent number: 7080186
    Abstract: The present invention provides a mechanism for supporting high digital bandwidth in a multi-drop bus system. A first device of the system is electrically coupled to a bus. Multiple receiving devices are coupled to the bus through associated electromagnetic couplers having coupling coefficients in a specified range. The geometries of the electromagnetic couplers are selected to reduce variations in the coupling coefficients with changes in the relative positions of the coupler components.
    Type: Grant
    Filed: September 23, 2003
    Date of Patent: July 18, 2006
    Assignee: Intel Corporation
    Inventors: Thomas D. Simon, Rajeevan Amirtharajah, Thomas F. Knight, Jr., Nandu J. Marketkar, John R. Benham
  • Patent number: 7075386
    Abstract: This invention relates to a switching circuit for use at the antenna of a multi-band cellular handset to select between the TX and RX modes of the bands. A number of high isolation switching circuits for selectively connecting a common antenna port to a TX port 2 or an RX port 3 of a multi-band cellular handset are described.
    Type: Grant
    Filed: August 11, 2004
    Date of Patent: July 11, 2006
    Assignee: TDK Corporation
    Inventor: Brian Kearns
  • Patent number: 7071792
    Abstract: An impedance matching circuit (140) includes a capacitive element (C1, 220), having a capacitance C, coupled in parallel with an output node (215) of the matching circuit, and an inductor (L1, 225) coupled in series with a transmission line (T1, 230) between the input node and the output node. The transmission line has a length that, in combination with the inductor, provides impedance substantially equal to the input impedance of the transmission circuit (150) at a frequency of interest. In one embodiment, the inductor is connected to an output (195) of an amplifier (180), and the transmission line is connected to the inductor and to the output (215). The capacitive element is connected to the transmission line such that the length of the transmission line between the inductor and the capacitive element provides the desired inductance.
    Type: Grant
    Filed: August 29, 2001
    Date of Patent: July 4, 2006
    Assignee: Tropian, Inc.
    Inventor: Ronald A. Meck
  • Patent number: 7058372
    Abstract: Disclosed is a circuit and method for continuous automatic tuning of a resonant circuit. A resonance voltage of the resonant circuit is phase shifted by a predetermined phase shift ? degrees and an input voltage signal to a power amplifier driving the resonant circuit is phase shifted by ?±90 degrees to place the signals in quadrature. The phase shifted signals are mixed to obtain a error signal. The error signal is compared to a predetermined voltage range in order to generate control signals for a control word generator, such as an up-down counter. The control word generator produces a control word that drives a capacitance bank that is part of the resonant circuit. The present invention continuously automatically adjusts the capacitance of the capacitance bank to tune the resonant circuit.
    Type: Grant
    Filed: November 1, 2002
    Date of Patent: June 6, 2006
    Assignee: Integration Associates Inc.
    Inventors: Matthijs D. Pardoen, János Erdélyi, Attila Zólomy, Ferenc Mernyei
  • Patent number: 7049906
    Abstract: Quad band antenna interface modules include a diplexer that is configured to connect to an antenna port, a switching core that is connected to the diplexer, and filters that are connected to the switching core and are configured to provide transmit and receive ports for four frequency bands. At least one matching network port is connected between the switching core and at least one of the filters and is configured to connect a matching network thereto. Three filters and three matching network ports may be provided. A switched impedance matching network and/or a singly compensated dual diode switch also may be provided.
    Type: Grant
    Filed: May 29, 2003
    Date of Patent: May 23, 2006
    Assignee: Sony Ericsson Mobile Communications AB
    Inventor: Bruce Emerson Wilcox
  • Patent number: 7035611
    Abstract: A radio-frequency (RF) apparatus includes front-end circuitry. The front-end circuitry includes a filter circuitry and an impedance matching circuitry. The filter circuitry has a differential output that has an output impedance. The filter circuitry filters signals outside a signal band of interest. The impedance matching network has a differential input coupled to the output of the filter circuitry. The impedance matching network also has a differential output coupled to a signal processing circuitry. The signal processing circuitry has an input impedance. The impedance matching network matches the input impedance of the signal processing circuitry to the output impedance of the filter circuitry.
    Type: Grant
    Filed: February 19, 2002
    Date of Patent: April 25, 2006
    Assignee: Silicon Laboratories Inc.
    Inventors: Eric R. Garlepp, Donald A. Kerth, Richard T. Behrens, Jeffrey W. Scott, G. Diwakar Vishakhadatta, G. Tyson Tuttle, Vishnu S. Srinivasan
  • Patent number: 7030714
    Abstract: Briefly, an apparatus having a first capacitor-inductor-capacitor impedance converter operably coupled to a second capacitor-inductor-capacitor impedance converter. The first and second capacitor-inductor-capacitor impedance converter may combine a first and second signals of first and second outphasing power amplifiers and may provide a matched output impedance to a desired load.
    Type: Grant
    Filed: October 1, 2003
    Date of Patent: April 18, 2006
    Assignee: Intel Corporation
    Inventor: Victor Korol
  • Patent number: 6998915
    Abstract: An apparatus for switching a matching circuit in a mobile communication terminal includes a PIN diode connected in parallel to an RF signal input and output line to be turned on and off to connect and disconnect an impedance matching-element to the RF signal input and output line in accordance with a frequency band switching-signal, and a bias circuit for generating a bias voltage applied to the PIN diode in accordance with the frequency band switching-signal, thereby shifting an amplitude of an RF signal to a positive side at an off-time of the PIN diode.
    Type: Grant
    Filed: January 16, 2003
    Date of Patent: February 14, 2006
    Assignee: NEC Corporation
    Inventor: Makoto Akiya
  • Patent number: 6987430
    Abstract: A power line communication system comprises an indoor power line and one or more power line branching apparatuses connected to the indoor power line. The power line branching apparatus comprises a communication channel that is branched off from the indoor power line and connectable to a power line communication device, and a power supply channel that is branched off from the indoor power line and connectable to electrical equipment. The power line branching apparatus further comprises an impedance matching circuit and a normal mode filter circuit. The impedance matching circuit is provided on the power supply channel, and sets the impedance of the indoor power line to a predetermined value. The normal mode filter circuit is provided on the power supply channel, and reduces normal mode noise occurring from the electrical equipment connected to the power supply channel.
    Type: Grant
    Filed: November 12, 2002
    Date of Patent: January 17, 2006
    Assignee: TDK Corporation
    Inventors: Masaru Wasaki, Hirotada Furukawa, Yoshihiro Saitoh, Mitsunari Suzuki
  • Patent number: 6985760
    Abstract: A foldable portable radio terminal is disclosed which normally optimizes an antenna characteristic by an antenna matching circuit even if the body length of the foldable portable radio terminal varies. A folded state detection circuit sends a detection signal to a control section depending upon whether or not the foldable portable radio terminal is folded. An antenna matching circuit is determined so that the antenna characteristic of an antenna is optimized when the foldable portable radio terminal is in a folded state. When the foldable portable radio terminal is unfolded, the control section renders a matching characteristic changeover circuit operative to change over the matching characteristic of the antenna matching circuit so that, even when the foldable portable radio terminal is in an unfolded state, the antenna characteristic by the antenna matching circuit may be optimized.
    Type: Grant
    Filed: May 29, 2001
    Date of Patent: January 10, 2006
    Assignee: NEC Corporation
    Inventor: Yoshimasa Hosonuma