Having Long Line Elements Patents (Class 333/33)
  • Patent number: 11940659
    Abstract: An optical integrated circuit (IC) structure includes: a substrate including a fiber slot formed in an upper surface of the substrate and extending from an edge of the substrate, and an undercut formed in the upper surface and extending from the fiber slot; a semiconductor layer disposed on the substrate; a dielectric structure disposed on the semiconductor layer; an interconnect structure disposed in the dielectric structure; a plurality of vents that extend through a coupling region of the dielectric structure and expose the undercut; a fiber cavity that extends through the coupling region of dielectric structure and exposes the fiber slot; and a barrier ring disposed in the dielectric structure, the barrier ring surrounding the interconnect structure and routed around the perimeter of the coupling region.
    Type: Grant
    Filed: August 30, 2021
    Date of Patent: March 26, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company Limited
    Inventors: Chen-Hao Huang, Hau-Yan Lu, Sui-Ying Hsu, Yuehying Lee, Chien-Ying Wu, Chia-Ping Lai
  • Patent number: 11888204
    Abstract: A transmission line includes a signal conductor and one or more return conductors, one or more of which having a stepped multi-layer structure. The return conductors may be disposed at opposite sides of the signal conductor. The return conductors may be multi-layer structures. At least some layers of each return conductor may have a stepped arrangement that defines a curve, such as an exponential curve. Additionally or alternatively, the signal conductor may be a stepped multi-layer structure, where at least some layers of the signal conductor may define a curve, such as an exponential curve. The signal conductor may be disposed at one or more upper layers of the transmission line or may be embedded at one or more layers near the center of the transmission line.
    Type: Grant
    Filed: May 9, 2022
    Date of Patent: January 30, 2024
    Assignee: NXP B.V.
    Inventors: Mustafa Acar, Danny Wayling Chang, Dominicus Martinus Wilhelmus Leenaerts, Philipp Franz Freidl
  • Patent number: 11882655
    Abstract: A high-speed transmission circuit comprises, as part of a signal path, a connector pin disposed on a pad that comprises an unused pad region. The unused pad region is not considered part of the signal path but is part of a resonant sub-circuit. In various embodiments, by properly adjusting the dimensions of the pad region and other structures in the high-speed transmission circuit, resonant frequencies of the sub-circuit are shifted to a frequency range that is outside of the frequency range of interest in the signal path, thereby, reducing insertion loss and increasing signal integrity without compromising mechanical stability.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: January 23, 2024
    Assignee: DELL PRODUCTS L.P.
    Inventors: Umesh Chandra, Douglas Wallace, Bhyrav Mutnury
  • Patent number: 11881715
    Abstract: An electronic device may include wireless circuitry having a transformer adjustable between first, second, and third modes. The transformer may have first, second, third, and fourth inductors. The third inductor may be magnetically coupled to the first and second inductors with equal coupling constants. The fourth inductor may be magnetically coupled to the first and second inductors with inverse coupling constants. First and second adjustable capacitors coupled to the third and fourth inductors may receive control signals that place the transformer into a selected one of the first, second, or third modes. In the first mode the transformer exhibits a passband that overlaps first and second bands. In the second mode, the transformer passes signals in the second band while filtering interference in the first band. In the third mode, the transformer passes signals in the first band while filtering interference in the second band.
    Type: Grant
    Filed: May 23, 2022
    Date of Patent: January 23, 2024
    Assignee: Apple Inc.
    Inventors: Hongrui Wang, Abbas Komijani
  • Patent number: 11839426
    Abstract: Microwave applicators are disclosed which include a first transmission line segment, a second transmission line segment, and a third transmission line segment. The first transmission line segment includes a first inner conductor, a first dielectric disposed on the first inner conductor, and a first outer conductor disposed on the first dielectric. The second transmission line segment includes a second inner conductor, a second dielectric disposed on the second inner conductor, and a second outer conductor disposed on the second dielectric. The third transmission line segment includes a third inner conductor disposed on the third inner conductor, a third outer conductor disposed on the proximal end of the third dielectric. The impedance of the second transmission line segment can be adjusted by adjusting the length of the third transmission line segment.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: December 12, 2023
    Assignee: Covidien LP
    Inventor: Joseph D. Brannan
  • Patent number: 11843157
    Abstract: An aspect of the present invention is to reduce return loss in a mode converter. A mode converter (10) includes an excitation pin (through via TV) configured to carry out mutual conversion between a waveguide mode of a post-wall waveguide (PW) and a waveguide mode of a microstrip line (MS). The mode conductor includes a pair of wide walls (conductor layers 12 and 13), in which first and second anti-pads (anti-pads 12c, 13c) are formed, respectively. The first and second anti-pads each have an inner edge including the excitation pin and each have an outer size (diameter D12) that is more than 5 times and less than 6 times as large as the diameter (DT) of the excitation pin.
    Type: Grant
    Filed: April 27, 2020
    Date of Patent: December 12, 2023
    Assignee: FUJIKURA LTD.
    Inventor: Yusuke Uemichi
  • Patent number: 11837560
    Abstract: A method of manufacturing a semiconductor device is provided. The method includes forming an assembly including placing a semiconductor die and a launcher structure on a carrier substrate, encapsulating at least a portion of the semiconductor die and the launcher structure, and applying a redistribution layer on a surface of the semiconductor die and a surface of the launcher structure to connect a bond pad of the semiconductor die with an antenna launcher of the launcher structure. The assembly is attached to a substrate and a waveguide overlapping the assembly is attached to the substrate. The waveguide structure is physically decoupled from the assembly.
    Type: Grant
    Filed: August 26, 2021
    Date of Patent: December 5, 2023
    Assignee: NXP USA, INC.
    Inventors: Michael B. Vincent, Giorgio Carluccio, Maristella Spella, Scott M. Hayes
  • Patent number: 11774474
    Abstract: Embodiments described herein relate to a method for modifying transmission line characteristics. The method may include: making a first determination of a null frequency of an input signal to a transmission line; performing an analysis to make a second determination of a wavelength of the input signal using, at least in part, the null frequency; making a third determination, based on the analysis, of a half wavelength of the input signal; calculating, based on the half wavelength, a total stub length; and adding a trace to a stub associated with a via, wherein the stub and the trace are a length that is at least a portion of the half wavelength of the input signal.
    Type: Grant
    Filed: April 5, 2022
    Date of Patent: October 3, 2023
    Assignee: DELL PRODUCTS L.P.
    Inventors: Sandor T. Farkas, Bhyrav M. Mutnury
  • Patent number: 11764454
    Abstract: A combiner/divider and method of designing a combiner/divider providing a single impedance transformation between a sum port and component ports with a determined insertion-loss variation over a determined operating bandwidth. Preferably the lowest number impedance-transformer sections are included that provide impedance transformation between the sum port and the component ports. A junction network preferably electrically connects a junction-network sum node to each of N junction-network component nodes. The junction-network sum node is connected to the sum port through at least a first impedance-transformer section of the ZT impedance-transformer sections. Each junction-network component node is connected to a respective one of the plurality of component ports through at least a respective second impedance-transformer section of the ZT impedance-transformer sections.
    Type: Grant
    Filed: October 19, 2022
    Date of Patent: September 19, 2023
    Assignee: Werlatone, Inc.
    Inventors: Allen F. Podell, Ky-Hien Do, William Deering
  • Patent number: 11757416
    Abstract: A matching circuit includes an input terminal, an output terminal, a first impedance component, a first set of switching devices, a second impedance component, a second set of switching devices and a controller. The first impedance component includes a first terminal coupled between the input terminal and the output terminal, and a second terminal. The first set of switching devices is coupled to the second terminal of the first impedance component, the controller and a reference terminal. The second impedance component includes a first terminal coupled between the second terminal of the first impedance component and the first set of switching devices, and a second terminal. The second set of switching devices is coupled to the second terminal of the second impedance component, the controller and the reference terminal. The controller controls the first set of switch devices and the second set of switch devices according to a detection signal.
    Type: Grant
    Filed: April 1, 2021
    Date of Patent: September 12, 2023
    Assignee: RichWave Technology Corp.
    Inventors: Chih-Sheng Chen, Yun-Jhu Lai
  • Patent number: 11742559
    Abstract: A multilayer transmission line includes a multilayer substrate. The multilayer substrate includes a plurality of conductor layers stacked in a predetermined direction with dielectric layers interposed therebetween. The conductor layers in an inner layer part include ground planes, respectively. The inner layer part includes a conductor hole part. The conductor hole part is provided penetrating the respective ground planes in the inner layer part in the predetermined direction. The conductor hole part includes a conductor part to electrically connect the ground planes together. The conductor layer in an outer layer part includes a transmission line and a conversion part. The outer layer part includes the conductor layer as the outermost layer and an inner conductor layer.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: August 29, 2023
    Assignee: DENSO CORPORATION
    Inventor: Kazuhiro Aoki
  • Patent number: 11735921
    Abstract: A method for flattening an impedance of a power delivery network includes capturing a set of impedance parameters, obtaining an impedance of the power delivery network according to the set of impedance parameters, defining a target impedance, performing an importance calculation to determine a port, obtaining an intersection frequency according to the target impedance and the impedance of the power delivery network, selecting a decoupling capacitor according to the intersection frequency, and disposing the decoupling capacitor at the port. The method can reduce the impedance of the power delivery network to the target impedance and flatten the impedance to avoid the rogue wave phenomenon.
    Type: Grant
    Filed: June 18, 2021
    Date of Patent: August 22, 2023
    Assignees: Inventec (Pudong) Technology Corp., Inventec Corporation
    Inventors: Yen-Hao Chen, Ding-Bing Lin, Jhih-Yu Yu
  • Patent number: 11721600
    Abstract: A method for fabricating a hermetic electronic package includes providing a package body; hermetically coupling a package base plate to the package body; thermally coupling a substrate to the base plate; thermally mounting a semiconductor device to the substrate; bonding at least one high-current input/output (I/O) terminal to the first metalized region of the substrate by a strap terminal that is an integral high current heatsink terminal. A ceramic seal surrounding the at least one high-current I/O terminal is hermetically bonded to an outer surface of the package body. A metal hermetic seal washer surrounding the at least one high-current I/O terminal is hermetically bonded to the ceramic seal and to a portion of the at least one high-current I/O terminal. A lid is seam welded onto the package body.
    Type: Grant
    Filed: December 21, 2020
    Date of Patent: August 8, 2023
    Assignee: Microsemi Corporation
    Inventors: Saeed Shafiyan-Rad, Manuel Medeiros, III, David Scott Doiron
  • Patent number: 11682828
    Abstract: An electronic device may be provided with an antenna module and a phased antenna array on the module. The module may include a logic board, an antenna board surface-mounted to the logic board, and a radio-frequency integrated circuit (RFIC) mounted surface-mounted to the logic board. The phased antenna array may include antennas embedded in the antenna board. The antennas may radiate at centimeter and/or millimeter wave frequencies. The logic board may form a radio-frequency interface between the RFIC and the antennas. Transmission lines in the logic board and the antenna board may include impedance matching segments that help to match the impedance of the RFIC to the impedance of the antennas. The module may efficiently utilize space within the device without sacrificing radio-frequency performance.
    Type: Grant
    Filed: April 25, 2022
    Date of Patent: June 20, 2023
    Assignee: Apple Inc.
    Inventors: Jennifer M. Edwards, Siwen Yong, Jiangfeng Wu, Harish Rajagopalan, Bilgehan Avser, Simone Paulotto, Mattia Pascolini
  • Patent number: 11681015
    Abstract: This document includes techniques, apparatuses, and systems related to a waveguide with squint alteration, which can improve electromagnetic wave operation. In aspects, squint of electromagnetic waves pertaining to waveguides may be altered and improved. In this example, the techniques also enable the waveguide to direct electromagnetic waves according to respective chambers and one or more apertures, improving the quality of signals transmitted and received. The chambers may be divided according to a divider extending toward an opening of the waveguide, directing electromagnetic waves between the opening and the one or more apertures.
    Type: Grant
    Filed: March 18, 2021
    Date of Patent: June 20, 2023
    Assignee: Aptiv Technologies Limited
    Inventors: Alireza Foroozesh, Shawn Shi
  • Patent number: 11658373
    Abstract: A packaging structure, a method of manufacturing a packaging structure, and a quantum processor include a substrate; a coplanar waveguide including a first ground wire, a second ground wire, and a signal wire, wherein the first ground wire, the second ground wire, and the signal wire are disposed on a surface of the substrate at intervals, and the signal wire is located between the first ground wire and the second ground wire; an air bridge including a first end connected with the first ground wire and a second end connected with the second ground wire, wherein a gap exists between the air bridge and a surface of the signal wire away from the substrate; and a compensation structure located on the surface of the substrate.
    Type: Grant
    Filed: May 13, 2021
    Date of Patent: May 23, 2023
    Assignee: Alibaba Group Holding Limited
    Inventors: Hua Xu, Jin Qin
  • Patent number: 11562957
    Abstract: A semiconductor device has a first area in which first and third semiconductor elements are formed, a second area in which second and fourth semiconductor elements are formed, and a third area located between the first and second areas. On the first to fourth semiconductor elements, a multilayer wiring layer including first and second inductors is formed. A through hole penetrating the semiconductor substrate is formed in the third area, and a first element isolation portion protruding from a front surface side of the semiconductor substrate toward a back surface side of the semiconductor substrate is formed in the through hole. Further, on the back surface side of the semiconductor substrate, the semiconductor substrate in the first area is mounted on the first die pad, and the semiconductor substrate in the second area is mounted on the second die pad.
    Type: Grant
    Filed: March 3, 2021
    Date of Patent: January 24, 2023
    Assignee: RENESAS ELECTRONICS CORPORATION
    Inventors: Shinichi Kuwabara, Yasutaka Nakashiba
  • Patent number: 11553586
    Abstract: A wiring substrate which includes a base member having a first surface, a first differential signal line disposed on the first surface of the base member and a second differential signal line disposed adjacent to the first differential signal line on the first surface of the base member. A ground layer which faces the first and second differential signal lines, has a plurality of openings continuously arranged along a predetermined direction. In a planar view of the wiring substrate, where a length of each of the plurality of openings in a direction along the signal lines is a length L1, a length of the opening in a direction orthogonal to Li is a length L2, and a distance between the first and second differential signal lines is a length L3, L1 is equal to or greater than four times L2, and L2 is equal to or less than L3.
    Type: Grant
    Filed: December 4, 2020
    Date of Patent: January 10, 2023
    Assignee: Canon Kabushiki Kaisha
    Inventors: Toshiyuki Yoshida, Yu Ogawa, Shoji Matsumoto
  • Patent number: 11539446
    Abstract: Disclosed is an optical receiver. The optical receiver includes a circuit board, a base member, a photodetector mounted on the base member, a transimpedance amplifier, and a capacitor. The base member is disposed between a first grounding pattern and a second grounding pattern on a first side of the circuit board. The transimpedance amplifier is mounted on the first grounding pattern. The capacitor is mounted on the second grounding pattern. The first wiring pattern and the second wiring pattern are apart from both the first grounding pattern and the second grounding pattern in a plan view of the first side. The first grounding pattern is electrically connected to the second grounding pattern through a grounding pattern formed on the first side.
    Type: Grant
    Filed: September 9, 2020
    Date of Patent: December 27, 2022
    Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.
    Inventor: Kenichi Nakayama
  • Patent number: 11523499
    Abstract: A flexible wiring board includes a layer including an impedance control line capable of transmitting a high frequency signal and a conductive layer including a conductor positioned along the impedance control line. The flexible wiring board is capable of transmitting high frequency signals well.
    Type: Grant
    Filed: February 12, 2021
    Date of Patent: December 6, 2022
    Assignee: KYOCERA Corporation
    Inventor: Akira Ukon
  • Patent number: 11502384
    Abstract: A microwave transmission arrangement, comprising an electrically conductive hollow waveguide having a first waveguide portion, a second waveguide portion between the first waveguide portion and a first end of the hollow waveguide, and a conductive transition surface of the hollow waveguide forming a transition between the first waveguide portion and the second waveguide portion; and a microwave circuit board including a dielectric carrier, and a first conductor pattern on a first side of the dielectric carrier, the first conductor pattern including a patch for radiating or receiving microwave signals in the predefined wavelength range, and a first ground plane surrounding the patch, wherein the first ground plane of the microwave circuit board is in conductive contact with the first end of the hollow waveguide, and extends into the second waveguide portion cross-section area to define at least one conductive pocket together with the second waveguide portion and the transition surface of the hollow waveguide.
    Type: Grant
    Filed: March 4, 2021
    Date of Patent: November 15, 2022
    Assignee: ROSEMOUNT TANK RADAR AB
    Inventor: Magnus Ohlsson
  • Patent number: 11490549
    Abstract: A high-frequency module includes: a chassis which is made of a conductor and which has an internal space; a high-frequency circuit board which is housed in the internal space of the chassis; and a resistive element provided between an inner wall that opposes the high-frequency circuit board among inner walls of the chassis which define the internal space and the high-frequency circuit board.
    Type: Grant
    Filed: March 8, 2019
    Date of Patent: November 1, 2022
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Hiroshi Hamada, Hideyuki Nosaka
  • Patent number: 11486900
    Abstract: A probe apparatus of a millimeter or submillimeter radio frequency band comprises transition layers having outermost layers on opposite surfaces of the probe apparatus. An internal transition cavity extends through the transition layers for guiding electromagnetic radiation within the probe apparatus. A probe layer disposed between the transition layers, the probe layer having a lateral transmission line for interacting with the electromagnetic radiation guided by the internal transmission cavity.
    Type: Grant
    Filed: May 22, 2018
    Date of Patent: November 1, 2022
    Assignee: TEKNOLOGIAN TUTKIMUSKESKUS VTT OY
    Inventors: Vladimir Ermolov, Antti Lamminen, Jussi Säily, Tauno Vähä-Heikkilä, Pekka Rantakari
  • Patent number: 11482481
    Abstract: An electronic device is disclosed. In one example, the electronic device includes a circuit board comprising a recess a package in the recess, a semiconductor die coupled to the first side of the package, and a bridge extending from the first side of the package to the circuit board wherein the bridge electrically couples the package to the circuit board.
    Type: Grant
    Filed: May 29, 2020
    Date of Patent: October 25, 2022
    Assignee: Intel Corporation
    Inventors: Bok Eng Cheah, Jackson Chung Peng Kong, Kooi Chi Ooi, Lee Fueng Yap, Chan Kim Lee
  • Patent number: 11469511
    Abstract: A waveguide microstrip line converter includes a waveguide, a dielectric substrate, a ground conductor including a slot, and a line conductor. The line conductor includes a first section that is a microstrip line having a first line width, a conversion unit that is a second section positioned immediately above the slot and having a second line width greater than the first line width, and a third section extending from the second section in a first direction and performing impedance matching between the first section and the second section. One of the opposite ends of the third section in the first direction is connected to the second section. The first section extends in a second direction perpendicular to the first direction continuously from the other end of the opposite ends of the third section.
    Type: Grant
    Filed: January 10, 2018
    Date of Patent: October 11, 2022
    Assignee: Mitsubishi Electric Corporation
    Inventors: Takashi Maruyama, Shigeo Udagawa
  • Patent number: 11437972
    Abstract: A multicomponent network may be added to a transmission line in a high-frequency circuit to transform a first impedance of a downstream circuit element to second impedance that better matches the impedance of an upstream circuit element. The multicomponent network may be added at a distance more than one-quarter wavelength from the downstream circuit element, and can tighten a frequency response of the impedance-transforming circuit to maintain low Q values and low VSWR values over a broad range of frequencies.
    Type: Grant
    Filed: October 30, 2020
    Date of Patent: September 6, 2022
    Assignee: MACOM TECHNOLOGY SOLUTIONS HOLDINGS, INC.
    Inventors: Robert Sadler, David Runton
  • Patent number: 11387534
    Abstract: A converter includes an electrical opening which is a loop pattern, at one end of a conductor pattern located immediately above one end of a waveguide with a dielectric substrate interposed therebetween.
    Type: Grant
    Filed: July 13, 2020
    Date of Patent: July 12, 2022
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Ryo Ueda, Yu Ushijima, Hidenori Ishibashi, Takashi Maruyama
  • Patent number: 11342663
    Abstract: An antenna apparatus includes: a first dipole antenna pattern; a feed line electrically connected to the first dipole antenna pattern; and a first ground plane disposed rearward of the first dipole antenna pattern and spaced apart from the first dipole antenna pattern; wherein the first ground plane forms a step-type cavity, and width of a rear portion of the step-type cavity is different from a width of a front portion of the step-type cavity.
    Type: Grant
    Filed: June 11, 2019
    Date of Patent: May 24, 2022
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Nam Ki Kim, Jeong Ki Ryoo, Kyu Bum Han, Young Kyoon Im, Won Cheol Lee
  • Patent number: 11337301
    Abstract: A printed circuit board includes a line formation layer including a differential line having a first conductor and a second conductor, a first component for a countermeasure against a surge, a first connection conductor having one end connected to the first conductor and another end connected to the first component, a second component for a countermeasure against a surge, a second connection conductor having one end connected to the second conductor and another end connected to the second component, a ground layer, and a dielectric mounted between the line formation layer and the ground layer. Lengths of the first conductor and second conductor are adjusted based on a difference of capacitance values in the circuit board.
    Type: Grant
    Filed: June 2, 2017
    Date of Patent: May 17, 2022
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Ayumi Sakai, Fujiyuki Nakamoto, Yuichi Sasaki, Naoto Oka, Hideyuki Ohashi
  • Patent number: 11293944
    Abstract: The test socket includes a fifth housing 15 located in a central part of contact terminals 21 in an axial direction and having electrical conductivity, plural through-holes 15c being formed in the fifth housing 15 to pass the respective contact terminals 21 therethrough; a sixth housing 16 stacked in the axial direction on the fifth housing 15, passage holes being formed in the sixth housing 16, the passage holes being configured to position the contact terminals 21 in a direction orthogonal to the axial direction; and an eighth housing 18 having electrical conductivity and stacked in the axial direction by sandwiching the sixth housing 16 between the eighth housing 18 and fifth housing 15, wherein the sixth housing 16 is provided with through-vias configured to form a conductive path in the axial direction.
    Type: Grant
    Filed: March 27, 2019
    Date of Patent: April 5, 2022
    Assignee: YAMAICHI ELECTRONICS CO., LTD.
    Inventors: Yuji Nakamura, Masashi Iwata
  • Patent number: 11291109
    Abstract: A transmission line includes connecting portions connected to the outside and a main body located between the connecting portions. Each of the connecting portions includes a terminal electrode connected to an external electrode, a signal conductor, and ground conductors. The main body includes the signal conductor and the ground conductors, and at least one of the plurality of connecting portions includes a first region including the terminal electrode, a second region adjacent to the first region along a signal propagation path, and a third region located between the second region and the main body. The first region, the second region, and the third region provide impedance matching at the connecting portion.
    Type: Grant
    Filed: October 9, 2020
    Date of Patent: March 29, 2022
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Kuniaki Yosui
  • Patent number: 11258195
    Abstract: According to one embodiment, a storage device is disclosed. The storage device includes a substrate, a first connector provided on the substrate and including a notch, and a nonvolatile memory provided on the substrate. The storage device further includes a first conductive part provided on the first connector and being adjacent to the notch.
    Type: Grant
    Filed: September 11, 2019
    Date of Patent: February 22, 2022
    Assignee: Kioxia Corporation
    Inventor: Naoki Kimura
  • Patent number: 11189905
    Abstract: An apparatus includes an antenna array package cover comprising a radiating surface, a mating surface disposed opposite the radiating surface, and an array of antenna array sub-patterns wherein each antenna array sub-pattern comprises at least one antenna element. The antenna array package also includes an array of sub-pattern interface packages mated to the mating surface of the antenna array package cover. Each sub-pattern interface package of the array of sub-pattern interface packages comprises a package carrier, a sub-pattern integrated circuit electrically and mechanically coupled to the package carrier, and a set of interface lines corresponding to the antenna elements of the antenna array sub-pattern that corresponds to the sub-pattern interface package. Methods for mounting the above apparatus into a host circuit are also disclosed herein.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: November 30, 2021
    Assignee: International Business Machines Corporation
    Inventors: Xiaoxiong Gu, Duixian Liu, Christian W. Baks, Alberto Valdes Garcia
  • Patent number: 11178762
    Abstract: A connection structure for a wiring substrate and a flexible substrate including a wiring substrate and a flexible substrate, in which the wiring substrate includes an insulating member, conductor layer, and ground layer, the flexible substrate includes an insulating sheet and metal film, and the metal film includes a signal line pad joined to the conductor layer via a joining material when viewed from the back surface of the flexible substrate. When viewed from behind the flexible substrate, there is an overlap region where the signal line pad and conductor layer overlap. In a cross-section when the overlap region is cut in a direction perpendicular to a signal transmission direction, in a case where a width of the signal line pad including the overlap region is W, and a width of the conductor layer including the overlap region is W0, the connection structure satisfies W0<W.
    Type: Grant
    Filed: March 3, 2020
    Date of Patent: November 16, 2021
    Assignees: NGK Electronics Devices, Inc., NGK Insulators, Ltd.
    Inventors: Takashi Kawamura, Masato Ishizaki, Naoki Gotou
  • Patent number: 11114734
    Abstract: An apparatus may include a substrate assembly having a first side and a second side. The apparatus may further include a waveguide antenna element positioned on the first side of the substrate assembly. The apparatus may also include a microstrip line positioned within the substrate assembly, where the waveguide antenna element overlaps the microstrip line. The apparatus may include a first conductive plane positioned on the first side of the substrate assembly. The apparatus may further include a second conductive plane positioned on the second side of the substrate assembly. The first conductive plane and the second conductive plane may define at least a portion of a planar surface integrated waveguide or a planar stripline.
    Type: Grant
    Filed: October 3, 2019
    Date of Patent: September 7, 2021
    Assignee: THE BOEING COMPANY
    Inventor: John E. Rogers
  • Patent number: 11050172
    Abstract: A multi-layer circuit board includes a first layer including a first trace, a second layer connected to the first layer and including a second trace, and a stubless interconnect positioned through the first layer and the second layer. The stubless interconnect includes a body that is electrically insulative, and a bridge trace that is electrically conductive and connected to the body, the bridge trace extending from the first trace to the second trace to electrically connect the first trace and the second trace.
    Type: Grant
    Filed: November 22, 2019
    Date of Patent: June 29, 2021
    Assignee: International Business Machines Corporation
    Inventors: Matteo Cocchini, Michael Cracraft, Zachary Thomas Dreiss
  • Patent number: 10971335
    Abstract: A radio frequency (RF) power monitoring device includes an RF sensor to monitor RF power transferred to a target load and an impedance of the target load and a transmission line to electrically connect the RF sensor to the target load and to transfer the RF power to the target load. A phase (?z) of the impedance of the target load is adjusted to satisfy a range of ?30°+180°*n<?z<30°+180°*n (where n=?2, ?1, 0, 1, or 2).
    Type: Grant
    Filed: October 23, 2019
    Date of Patent: April 6, 2021
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Hyungjoon Kim, Myoungwoon Kim, Hee jong Jeong
  • Patent number: 10938083
    Abstract: The present application discloses embodiments that relate to a radar system. The embodiments may include a plurality of radiating waveguides each having a waveguide input. The embodiments also include an attenuation component, which can be located on a circuit board. The embodiments further include a beamforming network. The beamforming network includes a beamforming network input. The beamforming network also includes a plurality of beamforming network outputs, where each beamforming network output is coupled to one of the waveguide inputs. Additionally, the beamforming network includes an attenuation port, wherein the attenuation port is configured to couple the beamforming network to the attenuation component. The attenuation component dissipates received electromagnetic energy.
    Type: Grant
    Filed: November 4, 2019
    Date of Patent: March 2, 2021
    Assignee: Waymo LLC
    Inventors: Jamal Izadian, Adam Brown
  • Patent number: 10930645
    Abstract: A semiconductor device assembly includes a substrate and a die coupled to the substrate. The die includes a first contact pad electrically coupled to a first circuit on the die including at least one active circuit element, and a second contact pad electrically coupled to a second circuit on the die including only passive circuit elements. The substrate includes a substrate contact electrically coupled to both the first and second contact pads. The semiconductor device assembly can further include a second die including a third contact pad electrically coupled to a third circuit on the second die including at least a second active circuit element, and a fourth contact pad electrically coupled to a fourth circuit on the second die including only passive circuit elements. The substrate contact can be electrically coupled to the third contact pad and electrically disconnected from the fourth contact pad.
    Type: Grant
    Filed: January 15, 2020
    Date of Patent: February 23, 2021
    Assignee: Micron Technology, Inc.
    Inventors: James E. Davis, John B. Pusey, Zhiping Yin, Kevin G. Duesman
  • Patent number: 10910688
    Abstract: The present invention relates to the field of communications technology, and in particular, to technology related to impedance matching in communication technology, and in particular, to a dielectric phase shifting unit, dielectric phase shifter and base station antenna. It includes a feeding network and a dielectric plate for impedance matching and for moving along a predetermined path, an impedance matching portion of the dielectric plate being disposed on one end of the dielectric plate adjacent to an input port on the feeding network. The present invention not only reduces the number of impedance matching and network loss; it also reduces the equivalent electrical length of the entire network, effectively saving costs, reducing the complexity of disassembly and assembly of related components, and improves disassembly and assembly efficiency.
    Type: Grant
    Filed: May 19, 2017
    Date of Patent: February 2, 2021
    Inventors: Litao Chen, Bin Gao, Peitao Liu, Guosheng Su
  • Patent number: 10854941
    Abstract: A broadband waveguide comprising at least one filament configured to transmit a signal therethrough. The broadband waveguide may include one or more reflection suppression techniques including a damping material coupled to at least a portion of the at least one filament and/or at least one reflection point configured thereon. The waveguide may further including a cladding material coupled to the at least one filament. The at least one filament may be coupled to a securing element configured to couple to a surface. The at least one filament may be coupled to a sensor configured to sense the transmitted signal.
    Type: Grant
    Filed: December 31, 2018
    Date of Patent: December 1, 2020
    Assignee: ETEGENT TECHNOLOGIES, LTD.
    Inventors: Christopher G. Larsen, Oleg Lobkis, Richard A. Roth, Stuart J. Shelley, Conor Coyan, Jason Feldman, Ann El Demery, Mackenzie Shelley
  • Patent number: 10848003
    Abstract: A method of transmitting power wirelessly from at least two transmitter loops to at least one power receiver. The method comprises separately supplying a respective alternating current to each one of the transmitter loops thereby to transmit wireless power for receipt by the at least one power receiver. Also provided is a method of receiving power wirelessly. Associated apparatuses and an associated system are also provided.
    Type: Grant
    Filed: February 11, 2019
    Date of Patent: November 24, 2020
    Assignee: The University of Hong Kong
    Inventors: Wai Man Ng, Cheng Zhang, Deyan Lin, Ron Shu Yeun Hui
  • Patent number: 10720707
    Abstract: The present disclosure relates to a reconfigurable patch antenna, which includes a substrate, a ground plane formed on a bottom surface of the substrate or within the substrate, a primary patch, an extension patch, and switching components. The primary patch and the extension patch are formed on a top surface of the substrate and are placed parallel to each other. Herein, a gap is formed between the primary patch and the first extension patch. The switching components are formed across the gap, electrically coupled to both the primary patch and the extension patch, and configured to connect the primary patch to the extension patch or disconnect the primary patch from the extension patch.
    Type: Grant
    Filed: October 16, 2018
    Date of Patent: July 21, 2020
    Assignee: Qorvo US, Inc.
    Inventors: Ali Tombak, Marcelo Jorge Franco, Edward T. Spears
  • Patent number: 10720688
    Abstract: An RF transition assembly (300) for enabling a radiofrequency transition between an RF transmission layer (301) of an electronic device and a conductor (309) which is electrically connected (317) to the RF transmission layer (301). The conductor (309) extends generally orthogonal to the RF transmission layer (301). The assembly comprises an open coaxial structure (313) located adjacent to an edge of the RF transmission layer (301). The open coaxial structure (313) comprises a cavity (315) extending therethrough for receiving the conductor (309). The cavity (315) comprises an opening facing the edge of the RF transmission layer (301) so as to direct electromagnetic radiation towards the RF transmission layer (301).
    Type: Grant
    Filed: April 24, 2017
    Date of Patent: July 21, 2020
    Assignee: Lumentum Technology UK Limited
    Inventors: Mario Bonazzoli, Roberto Galeotti, Luigi Gobbi
  • Patent number: 10680567
    Abstract: A low-noise wide band amplifier is realized utilizing a superconductor-insulator-superconductor (SIS) junction, quasiparticle frequency mixers connected in tandem or in cascade, a first quasiparticle mixer performs first frequency mixing with use of a first local signal having a frequency not less than twice a frequency of an input signal to the first quasiparticle mixer, a second quasiparticle mixer performs second frequency mixing with use of a second local signal having a frequency not more than twice a frequency of an input signal to the second quasiparticle mixer, and signal amplification is performed through frequency conversion by extracting, from among a plurality of signals generated with the first and the second frequency mixing, a signal in a frequency band not more than a frequency band of the signal before the first frequency mixing and the second frequency mixing, using a transmission line or a filter.
    Type: Grant
    Filed: September 25, 2018
    Date of Patent: June 9, 2020
    Assignee: INTER-UNIVERSITY RESEARCH INSTITUTE CORPORATION NATIONAL INSTITUTES OE NATURAL SCIENCES
    Inventors: Yoshinori Uzawa, Takafumi Kojima
  • Patent number: 10666000
    Abstract: A coaxial bias T-connector includes: first and second coaxial cables; a rear body electrically connected to the first cable outer conductor; a first inner contact positioned within the rear body and electrically connected with the first inner conductor; a front body connected with the rear body and including a forward portion; a second inner contact positioned within the front body and electrically connected with the first inner contact; a spring basket including a plurality of spring fingers and electrically connected with the forward portion of the front body and electrically isolated from the second inner contact, the forward portion of the front body, the spring fingers and the second inner contact forming a 4.3/10 interface; a third inner contact electrically connected with the second cable inner conductor; and a coaxial fitting electrically connected with the front body and with the second cable outer conductor. The third inner contact is in electrical connection with the second inner contact.
    Type: Grant
    Filed: February 12, 2019
    Date of Patent: May 26, 2020
    Assignee: CommScope Technologies LLC
    Inventors: Jien Zheng, Yujun Zhang, Xianxiang Li
  • Patent number: 10594014
    Abstract: A connection structure (3) of a high-frequency transmission line according to this invention includes a columnar central conductor (7) having one end connected to a coaxial line and the other end connected to a planar transmission line, a first outer conductor (41) arranged on a side of the one end of the central conductor coaxially with the central conductor, a first dielectric body (42) filled between the first outer conductor and the central conductor, a second outer conductor (61) arranged on a side of the other end of the central conductor coaxially with the central conductor, a second dielectric body (62) filled between the second outer conductor and the central conductor, a third outer conductor (51) arranged between the first outer conductor and the second outer conductor coaxially with the central conductor, and a third dielectric body (52) filled between the third outer conductor and the central conductor.
    Type: Grant
    Filed: December 22, 2016
    Date of Patent: March 17, 2020
    Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
    Inventors: Hitoshi Wakita, Munehiko Nagatani, Hideyuki Nosaka
  • Patent number: 10536128
    Abstract: A transmission-line-based impedance transformer including first and second couplers, with each coupler including respective pairs of coupled signal conductors. The signal conductors are connected sequentially in series between an input port and an output port and may form a single spiral configuration. A signal conductor of one coupler may be connected in series between the two signal conductors of another coupler. The couplers have characteristic impedances between an input impedance and an output impedance. A signal conductor of a coupler may include first and second conductor portions disposed in respective spaced-apart parallel planes, with the other signal conductor of the coupler disposed physically directly between the first and second conductor portions. A transmission-line signal conductor in the spiral may be shielded from coupled signal conductors by ground conductors disposed in respective spaced-apart parallel planes on opposite sides of the shielded signal conductor.
    Type: Grant
    Filed: June 25, 2019
    Date of Patent: January 14, 2020
    Assignee: Werlatone, Inc.
    Inventors: Allen F. Podell, Ky-Hien Do, Mariama Dadhi Barrie
  • Patent number: 10529480
    Abstract: For a T-coil IC, a first inductor core is on an Mx layer, has at least 1? turns, and has a first-inductor-core-first end and a first-inductor-core-second end. A second inductor core is on an Mx-1 layer, has at least 2? turns, and has a second-inductor-core-first end and a second-inductor-core-second end. The first-inductor-core-second end is connected to the second-inductor-core-first end at a node. A third inductor core is on an Mx-2 layer and has at least 3 turns. The third inductor core has a third-inductor-core-first end and a third-inductor-core-second end. The second-inductor-core-second end is connected to the third-inductor-core-first end. A tap is on an Mx-3-y layer, where y?0. The tap is connected to the first and second inductor cores at the node. A first inductor is formed by the first inductor core, and a second inductor is formed by the second and third inductor cores.
    Type: Grant
    Filed: September 1, 2017
    Date of Patent: January 7, 2020
    Assignee: QUALCOMM Incorporated
    Inventor: Siqi Fan
  • Patent number: 10498002
    Abstract: The present application discloses embodiments that relate to a radar system. The embodiments may include a plurality of radiating waveguides each having a waveguide input. The embodiments also include an attenuation component, which can be located on a circuit board. The embodiments further include a beamforming network. The beamforming network includes a beamforming network input. The beamforming network also includes a plurality of beamforming network outputs, where each beamforming network output is coupled to one of the waveguide inputs. Additionally, the beamforming network includes an attenuation port, wherein the attenuation port is configured to couple the beamforming network to the attenuation component. The attenuation component dissipates received electromagnetic energy.
    Type: Grant
    Filed: June 21, 2018
    Date of Patent: December 3, 2019
    Assignee: Waymo LLC
    Inventors: Jamal Izadian, Adam Brown