With Balanced Circuits Patents (Class 333/4)
  • Patent number: 11777462
    Abstract: A quantum computing devices includes: a qubit; a readout device coupled to the qubit, the readout device including a frequency filter having a filter frequency range; and an amplifier device coupled to the readout device, in which the amplifier device is configured to amplify a measurement signal from the readout device upon receiving a pump signal having a pump frequency that is outside of the filter frequency range of the frequency filter.
    Type: Grant
    Filed: December 16, 2020
    Date of Patent: October 3, 2023
    Assignee: Google LLC
    Inventors: Theodore Charles White, Julian Shaw Kelly
  • Patent number: 11617257
    Abstract: Various embodiments of the disclosure relate to a printed circuit for transmitting a signal in a high-frequency band and an electronic device including the same. The printed circuit board may include a flexible circuit board configured to transmit a signal in a high-frequency band, and the flexible circuit board may include: first multiple layers including a power line configured to transmit power; and second multiple layers stacked in a first direction of the first multiple layers and including a first signal line and a second signal line configured to transmit a signal in the high-frequency band.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: March 28, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Youngsun Lee, Eunseok Hong, Byeongkeol Kim, Jongmin Jeon
  • Patent number: 11343905
    Abstract: One embodiment can provide a method and system for compensating for timing skew in a differential pair transmission line on a printed circuit board (PCB). During operation, the system obtains a PCB comprising one or more layers and at least a differential pair transmission line. The differential pair transmission line comprises first and second transmission lines, with a respective transmission line coupled to at least one via extending through the one or more layers of the PCB. The system determines a difference in length between first and second transmission lines and determines a stub length of the at least one via based on the determined difference in length between the first and second transmission lines, thereby compensating for the time skew in the differential pair transmission line.
    Type: Grant
    Filed: February 28, 2020
    Date of Patent: May 24, 2022
    Assignee: Hewlett Packard Enterprise Development LP
    Inventors: Hyunjun Kim, Andrew J. Becker, Paul T. Wildes
  • Patent number: 11057987
    Abstract: In one embodiment, a method includes positioning a first component for generating a differential signal on a printed circuit board, positioning a second component for receiving the differential signal on a printed circuit board, and routing a differential conductor pair on a path between the first component and the second component, wherein the path comprises at least one turn in which the differential conductor pair changes direction. A first conductor and a second conductor of the differential conductor pair each comprise a plurality of sets of bends proximate to the turn to provide skew compensation while reducing differential mode to common mode conversion and wherein each of the sets of bends in the second conductor is aligned with one of the sets of bends in the first conductor.
    Type: Grant
    Filed: February 14, 2019
    Date of Patent: July 6, 2021
    Assignee: CISCO TECHNOLOGY, INC.
    Inventors: Jianquan Lou, Alpesh U. Bhobe, Juhi Garg, Joel Richard Goergen
  • Patent number: 11026321
    Abstract: A differential trace pair system includes a board including a board structure having a first, a second, a third, and a fourth board structure member, wherein a distance between the first and the third board structure members is longer than a distance between the second and the fourth board structure members. The differential trace pair system further includes a differential trace pair that includes a first differential trace extending between the first and the third board structure members and a second differential trace extending between the second and the fourth board structure members. The second differential trace having a serpentine structure that includes a first portion that continuously transitions away from the first differential trace and a second portion that is contiguous with the first portion, the second portion continuously transitions towards the first differential trace.
    Type: Grant
    Filed: February 1, 2019
    Date of Patent: June 1, 2021
    Assignee: Dell Products L.P.
    Inventors: Umesh Chandra, Chun-Lin Liao, Bhyrav M. Mutnury
  • Patent number: 10973117
    Abstract: Disclosed herein is a method. A first electrically conductive trace is provided on a substrate. A second electrically conductive trace is providing on the substrate proximate the first electrically conductive trace. A solder mask is provided at the first and the second electrically conductive traces. A portion of the first electrically conductive trace is free of any portion of the solder mask covering thereon.
    Type: Grant
    Filed: July 11, 2019
    Date of Patent: April 6, 2021
    Assignee: FCI USA LLC
    Inventor: Benjamin Reed Staudt
  • Patent number: 10903809
    Abstract: A quantum computing devices includes: a qubit; a readout device coupled to the qubit, the readout device including a frequency filter having a filter frequency range; and an amplifier device coupled to the readout device, in which the amplifier device is configured to amplify a measurement signal from the readout device upon receiving a pump signal having a pump frequency that is outside of the filter frequency range of the frequency filter.
    Type: Grant
    Filed: September 15, 2016
    Date of Patent: January 26, 2021
    Assignee: Google LLC
    Inventors: Theodore Charles White, Julian Shaw Kelly
  • Patent number: 10796839
    Abstract: An RF transformer is provided. The RF transformer includes a ferrite core and a winding coil structure formed around the ferrite core. The winding coil structure is in electrical contact with a center portion of the ferrite core. The winding coil structure is essentially electrically and physically spaced from external portions of the ferrite core.
    Type: Grant
    Filed: March 26, 2018
    Date of Patent: October 6, 2020
    Assignee: PPC BROADBAND, INC.
    Inventors: Leon Marketos, Erdogan Alkan
  • Patent number: 10651822
    Abstract: A multiplexer includes a common connection terminal on a first surface of a substrate and to be connected to an antenna element, and transmission-side and reception-side elastic wave filters of Band25 and Band66 mounted on a second surface of the substrate opposite the first surface, that are connected to the common connection terminal, and that have pass bands different from each other. The transmission-side elastic wave filter of Band66 is located nearest on the substrate to the common connection terminal among the elastic wave filters.
    Type: Grant
    Filed: June 27, 2018
    Date of Patent: May 12, 2020
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Yuichi Takamine
  • Patent number: 10536130
    Abstract: A single input multiple output plasma control system includes a splitter that receives a single input and generates multiple outputs. Each output from the splitter is provided to a load. The splitter includes branch circuits connected between selected splitter outputs. The branch circuits control voltage, current, power, frequency, or phase between each branch to enable controlling a predetermined relationship between the voltage, current, power, impedance, frequency, or phase measured at each load.
    Type: Grant
    Filed: August 24, 2018
    Date of Patent: January 14, 2020
    Assignee: MKS Instruments, inc.
    Inventors: David J. Coumou, Dennis M. Brown, Jeongseok Jang, Jin Huh
  • Patent number: 10491178
    Abstract: One example includes a parametric amplifier system. The system includes an input/output (I/O) transmission line to propagate a signal tone. The system also includes a non-linearity circuit comprising at least one Josephson junction to provide at least one inductive path of the signal tone in parallel with the at least one Josephson junction. The system further includes an impedance matching network coupled to the I/O transmission line to provide impedance matching of the tone signal between the I/O transmission line and the non-linearity element.
    Type: Grant
    Filed: October 31, 2017
    Date of Patent: November 26, 2019
    Assignee: NORTHROP GRUMMAN SYSTEMS CORPORATION
    Inventors: Ofer Naaman, David George Ferguson
  • Patent number: 10467358
    Abstract: A simulation apparatus includes a database configured to a set line parameter for a system line configuring a power system; a parameter error detector configured to compare surveyed data measured in the system line and the line parameter to detect error of the line parameter; a system analysis simulator configured to perform a system analysis simulation based on the surveyed data and the line parameter; and a monitor configured to display an error detection result of the line parameter from the parameter error detector and a system analysis simulation result performed in the system analysis simulator.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: November 5, 2019
    Assignee: LSIS CO., LTD.
    Inventors: Myung Hwan Lee, Young In Kim, Hong Joo Kim, Chong Suk Song
  • Patent number: 10375823
    Abstract: Disclosed herein is a method. A first electrically conductive trace is provided on a substrate. A second electrically conductive trace is providing on the substrate proximate the first electrically conductive trace. A solder mask is provided at the first and the second electrically conductive traces. A portion of the first electrically conductive trace is free of any portion of the solder mask covering thereon.
    Type: Grant
    Filed: June 1, 2016
    Date of Patent: August 6, 2019
    Assignee: FCI USA LLC
    Inventor: Benjamin Reed Staudt
  • Patent number: 10038421
    Abstract: A common mode filter suppressing a reflection of a common mode noise and sufficiently removing the common mode noise of 2 GHz or less includes: a signal coil spirally formed in a dielectric layer of a multilayer structure, and serially inserted and connected to one of the differential signal lines; a signal coil inserted and connected to the other differential signal line and formed in the dielectric layer so as to face the signal coil through the dielectric layer; a control coil formed in the dielectric layer so as to be sandwiched between the first and second signal coils interposing the dielectric layer and wound in the same direction as the signal coil; and an embedded resistor connected to at least one of an outer peripheral end or an inner peripheral end of the control coil, thus forming a feedback loop circuit by the control coil and the embedded resistor.
    Type: Grant
    Filed: May 27, 2014
    Date of Patent: July 31, 2018
    Assignee: ELMEC CORPORATION
    Inventor: Masaaki Kameya
  • Patent number: 9641150
    Abstract: An electrical component, e.g., a diplexer or a duplexer, can have one of a number of diverse arrangements for terminal surfaces on the substrate bottom. For example, the terminal surfaces for first and second filters are not disposed at the maximum distance from one another. First and second filters can be disposed as one or two discrete components on the substrate, wherein one filter can be implemented as being integrated in a multilayer substrate.
    Type: Grant
    Filed: August 22, 2014
    Date of Patent: May 2, 2017
    Assignee: SNAPTRACK, INC.
    Inventors: Maximilian Pitschi, Andreas Fleckenstein, Juergen Kiwitt
  • Patent number: 9559661
    Abstract: A duplexer includes: a transmit filter that is connected between an antenna terminal and a transmit terminal and has a plurality of acoustic wave resonators; a receive filter that is connected between the antenna terminal and a receive terminal and has a plurality of acoustic wave resonators; and a delay line or a longitudinal coupling type resonator that is connected in parallel with at least one of the plurality of acoustic wave resonators of the transmit filter and the plurality of acoustic wave resonators of the receive filter and has at least two IDTs (Interdigital Transducers).
    Type: Grant
    Filed: November 13, 2015
    Date of Patent: January 31, 2017
    Assignee: TAIYO YUDEN CO., LTD.
    Inventors: Shogo Inoue, Masafumi Iwaki, Jun Tsutsumi
  • Patent number: 9252476
    Abstract: In a circuit module, even if a transmission signal output from a transmission electrode of a mounting substrate to a transmission terminal of a splitter leaks into a ground electrode, the transmission signal that has leaked into the ground electrode flows into via conductors that are connected along an edge portion of the ground electrode close to the transmission electrode and connected to a ground line of a motherboard. Therefore, the transmission signal that has been output from the transmission electrode and leaked into the ground electrode is prevented from traveling along an edge portion of the ground electrode toward a reception electrode side. Thus, characteristics of isolation between the transmission electrode and the reception electrode provided on the mounting substrate on which the splitter is mounted are improved.
    Type: Grant
    Filed: October 18, 2013
    Date of Patent: February 2, 2016
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Syuichi Onodera
  • Patent number: 8981865
    Abstract: An exemplary transmission line system is provided. The system includes a first transmission line partially arranged on a first layer of a PCB including first structure units and partially arranged on a third layer of the PCB including second structure units, and a second transmission line arranged on a second layer of the PCB. Each first structure unit and each second structure respectively include a first connection line, a second connection line, and a first bent line; and a third connection line, a fourth connection line, and a second bent line. A second end of the first connection line and the second connection line of each of the first structure units are respectively connected to a second end of the third connection line and the fourth connection line of the adjacent second structure unit through respective vias.
    Type: Grant
    Filed: November 29, 2012
    Date of Patent: March 17, 2015
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Shao-Wei Wang
  • Patent number: 8922303
    Abstract: To sufficiently attenuate a common mode signal by passing an ultra-high speed differential signal through an ultra-high speed differential transmission line. A common mode filter comprises: a pair of conductive lines formed on a first dielectric layer to transmit a differential signal; a plurality of first divided floating grounds in a state of being separated from an external ground potential, and facing the conductive lines, with the first dielectric layer interposed between them, and formed by being divided into a plurality of numbers in a length direction of the conductive lines, and forming a distribution constant type differential transmission line for the differential signal, together with the conductive lines; and a first passive two-terminal network connected between the first divided floating grounds located at least at an input side or an output side of the first divided floating grounds, and the external ground potential.
    Type: Grant
    Filed: July 21, 2010
    Date of Patent: December 30, 2014
    Assignee: Elmec Corporation
    Inventor: Masaaki Kameya
  • Patent number: 8922291
    Abstract: A shield for differential transmission lines formed in a first metal layer may include one or more floating shields, each floating shield comprising an upper-side tile formed in a second metal layer of the integrated circuit adjacent to the first metal layer, a lower-side tile formed in a third metal layer of the integrated circuit adjacent to the first metal layer and non-adjacent to the second metal layer, and at least one via configured to electrically couple the upper-side tile at an end of the length of the upper-side tile to the lower-side tile and at an end of the length of the lower-side tile.
    Type: Grant
    Filed: May 9, 2012
    Date of Patent: December 30, 2014
    Assignee: Intel IP Corporation
    Inventors: Haolu Xie, Chi-Taou Tsai, Patrick L. Rakers
  • Patent number: 8917148
    Abstract: A transmission unit with reduced crosstalk signal includes a first conductor group having at least one first conductor surrounded by a first sheath and at least one second conductor surrounded by a second sheath. The first and the second conductor are axially arranged corresponding to one another. The first sheath has a dielectric coefficient higher than that of the second sheath, so that a difference in dielectric property exists between the first and the second conductor to enable reduction of crosstalk occurred during high-speed signal transmission over the transmission unit.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: December 23, 2014
    Assignee: Yes Way Enterprise Corporation
    Inventors: Da-Yu Liu, Da-Yung Liu, Teng-Lan Liu, Ben-Hwa Jang
  • Publication number: 20140340167
    Abstract: A low pass filter 6 comprises an inductor unit 8 comprising first and second inductors 11 and 12, an input side capacitor unit 7 provided on a signal input side of the inductor unit 8, and an output side capacitor unit 9 provided on a signal output side of the inductor unit 8. The input side capacitor unit 7 comprises a first capacitor 21 provided between the signal lines. Further, the input side capacitor unit 7 comprises a second capacitor 22 wherein one end is connected to a signal input end 11a of the first inductor 11, and the other end is connected to a ground (GND), and a third capacitor 23 wherein one end is connected to a signal input end 12a of the second inductor 12, and the other end is connected to a ground (GND).
    Type: Application
    Filed: September 10, 2012
    Publication date: November 20, 2014
    Applicant: CANON KABUSHIKI KAISHA
    Inventor: Daishiro Sekijima
  • Publication number: 20140300430
    Abstract: In some embodiments, a system may include a passive uniplanar single-balanced millimeter-wave mixer. In some embodiments, a three-port diode-tee IC forming a mixer core is coupled between an end of a slotline balun and a second coplanar balun. The operational bandwidth of a mixer structure is enhanced by optimizing the distance between the mixer diode-tee core and the back-short circuits. The frequency separation of LO and IF signals may be accomplished by means of stand-alone three-port filter-diplexer device. The system may allow wider than a frequency octave operational bandwidth for a frequency converter device all the way into millimeter wave frequencies at the same time as supporting the operational bandwidth for baseband IF signal over more than six frequency octaves. In some embodiments, the system may accomplish a 500 MHz to 34.5 GHz continuous IF bandwidth with RF signal sweeping from 33 GHz to 67 GHz and local oscillator at 67.5 GHz fixed frequency.
    Type: Application
    Filed: April 5, 2013
    Publication date: October 9, 2014
    Inventor: Alexander Feldman
  • Patent number: 8847696
    Abstract: A high speed flexible interconnect cable for an electronic assembly includes a number of conductive layers and a number of dielectric layers. Conductive signal traces, located on the conductive layers, combine with the dielectric layers to form one or more high speed electrical transmission line structures. The cable can be coupled to electronic components using a variety of connection techniques. The cable can also be terminated with any number of known or standardized connector packages.
    Type: Grant
    Filed: November 30, 2010
    Date of Patent: September 30, 2014
    Assignee: QUALCOMM Incorporated
    Inventors: James Leroy Blair, Jeffrey Thomas Smith
  • Patent number: 8797114
    Abstract: Two transmission lines are formed adjacent to each other at spacing on an upper surface of a base insulating layer, and a ground conductor layer is formed on a lower surface of the base insulating layer. The ground conductor layer is arranged to be opposite to at least part of one transmission line and at least part of the other transmission line in a width direction of the two transmission lines. When a width of one transmission line, a width of the other transmission line, a spacing between the two transmission lines and a width of the ground conductor layer in an arbitrary cross section perpendicular to the two transmission lines are referred to as W1, W2, S, Wg, respectively, the width Wg of the ground conductor layer is set to satisfy relationship of Wg<(W1+W2+S) and S?0.8 Wg.
    Type: Grant
    Filed: July 5, 2011
    Date of Patent: August 5, 2014
    Assignee: Nitto Denko Corporation
    Inventor: Daisuke Yamauchi
  • Patent number: 8791769
    Abstract: A balun includes a first conductor winding having a first figure eight shape and a second conductor winding have a second figure eight shape. The first figure eight shape includes a first loop and a second loop. The second figure eight shape includes a third loop and a fourth loop. The first loop and the second loop are not concentric. The third loop and the fourth loop are not concentric.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: July 29, 2014
    Assignee: Marvell World Trade Ltd.
    Inventors: Poh Boon Leong, Hou Xian Loo
  • Publication number: 20140176388
    Abstract: A tunable impedance network and a method for tuning the tunable impedance network are disclosed. In one aspect, the tunable impedance network comprises a plurality of transformers connected in series. Each transformer has a primary winding and a secondary winding. The transformers have a voltage transformation ratio of N:1 with N>1. An impedance structure, acting as a resonant circuit together with the inductance of the secondary winding, is connected at the secondary winding of each transformer. A control circuit or processor is configured to tune the imaginary part of at least one of the impedance structures so as to change its resonance frequency to mimic a reference impedance. The control circuit is further configured to tune the real part of at least one of the impedance structures so as to change its Q-factor to mimic the reference impedance.
    Type: Application
    Filed: December 17, 2013
    Publication date: June 26, 2014
    Applicant: IMEC
    Inventors: Barend Van Liempd, JONATHAN BORREMANS
  • Patent number: 8633399
    Abstract: A differential transmission circuit includes a pair of transmission line conductors and a ground conductor layer, wherein the pair of transmission line conductors include a first straight line region where both the pair of transmission line conductors extend in parallel to each other in a first direction with a first width in a first layer, a first cross region where one of the pair of transmission line conductors is formed in the first layer, the other thereof is formed in a second layer, and the pair of transmission line conductors cross the each other in a three-dimensional manner, the first cross region being disposed on the front side of the first straight line region, and wherein each of the widths of the pair of transmission line conductors in the first cross region is smaller than the first width.
    Type: Grant
    Filed: February 23, 2012
    Date of Patent: January 21, 2014
    Assignee: Oclaro Japan, Inc.
    Inventor: Osamu Kagaya
  • Patent number: 8633781
    Abstract: An apparatus for providing impedance matching between a single-ended circuit and a differential circuit includes first and second capacitors and first and second inductors. The first capacitor is connected between an input/output of the single-ended circuit and a first differential input/output of the differential circuit. The first inductor is connected between the input/output of the single-ended circuit and a second differential input/output of the differential circuit. The second capacitor is connected between the second differential input/output of the differential circuit and ground. The second inductor is connected between the first differential input/output of the differential circuit and the second differential input/output of the differential circuit.
    Type: Grant
    Filed: December 21, 2010
    Date of Patent: January 21, 2014
    Assignee: Avago Technologies General IP (Singapore) Pte. Ltd.
    Inventors: Paul Bradley, Michael Frank
  • Patent number: 8629741
    Abstract: A device that includes a coplanar waveguide structure is disclosed. In an example, a device includes a coplanar waveguide structure that is oriented in a first direction, and a slot-type floating shield structure oriented proximate to the coplanar waveguide structure. The slot-type floating shield structure includes a first portion that extends transversely to the coplanar waveguide structure in a second direction and a second portion that extends from the first portion in a third direction that is perpendicular to the first direction and the second direction.
    Type: Grant
    Filed: July 5, 2012
    Date of Patent: January 14, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Shu-Ying Cho
  • Patent number: 8586873
    Abstract: A circuit board includes a pair of differential signal lines and a pair of test point pads, one test point pad coupled to one of the signal lines and another of the test point pads coupled to another of the signal lines. The two test point pads are staggered relative to each other and the two signal lines. The circuit board includes a plurality of conductive layers and a plurality of insulating layers. The conductive layers can be etched into conductive patterns, or traces, for connecting the electronic components, which are soldered to the circuit board. The conductive layers may be selectively connected together by vias. One or more of the conductive layers may be a metal plane for providing a ground plane and/or a power plane. To minimize or eliminate the capacitance generated between the test point pad and an underlying ground plane and/or power plane, portions of the ground plane and/or the portion of the power plane directly aligned with each test point pad are removed.
    Type: Grant
    Filed: February 23, 2010
    Date of Patent: November 19, 2013
    Assignee: Flextronics AP, LLC
    Inventor: Leon Wu
  • Publication number: 20130300514
    Abstract: A shield for differential transmission lines formed in a first metal layer may include one or more floating shields, each floating shield comprising an upper-side tile formed in a second metal layer of the integrated circuit adjacent to the first metal layer, a lower-side tile formed in a third metal layer of the integrated circuit adjacent to the first metal layer and non-adjacent to the second metal layer, and at least one via configured to electrically couple the upper-side tile at an end of the length of the upper-side tile to the lower-side tile and at an end of the length of the lower-side tile.
    Type: Application
    Filed: May 9, 2012
    Publication date: November 14, 2013
    Applicant: FUJITSU SEMICONDUCTOR LIMITED
    Inventors: Haolu Xie, Chi-Taou Tsai, Patrick L. Rakers
  • Patent number: 8525611
    Abstract: According to one exemplary embodiment, a circuit board for reducing dielectric loss, conductor loss, and insertion loss includes a pair of transmission lines. The pair of transmission lines has sufficient thickness to cause substantial broadside electromagnetic coupling between the pair of transmission lines, where the pair of transmission lines is sufficiently separated from a ground plane of the circuit board so as to cause negligible electromagnetic coupling to the ground plane relative to the substantial broadside electromagnetic coupling. The pair of transmission lines thereby reduce dielectric loss, conductor loss, and insertion loss for signals traversing through the transmission line pair. The pair of transmission lines can be separated from the ground plane by, for example, at least 50.0 mils.
    Type: Grant
    Filed: February 21, 2012
    Date of Patent: September 3, 2013
    Assignee: Broadcom Corporation
    Inventor: Mohammad Tabatabai
  • Publication number: 20130194053
    Abstract: A circuit can include multiple data input ports and data output ports, pickoff tees coupled therebetween, and a resistive network coupled between the pickoff tees. A differential signal generator can be coupled with the resistive network and the pickoff tees. Resistances of the pickoff tees and resistive network can be selected such that impedances looking into the data input ports and data output ports are matched to a desired system impedance.
    Type: Application
    Filed: July 27, 2012
    Publication date: August 1, 2013
    Applicant: Tektronix, Inc.
    Inventor: Keith J. BERTRAND
  • Patent number: 8493163
    Abstract: A bandpass filter for a wide frequency band such as UWB is disclosed. The bandpass filter can receive a pair of signals, namely a balanced signal, and output a pair of signals. The bandpass filter comprises a plurality of ½ wavelength resonance electrodes, a plurality of ¼ wavelength resonance electrodes and a plurality of coupling electrodes. A transmission characteristic of the bandpass filter having flat and low loss over the entire region of the broad pass band can be achieved.
    Type: Grant
    Filed: September 25, 2009
    Date of Patent: July 23, 2013
    Assignee: Kyocera Corporation
    Inventors: Takanori Kubo, Hiromichi Yoshikawa
  • Publication number: 20130141180
    Abstract: A high-frequency module has a structure including balanced terminals, with high design flexibility and good transmission characteristics. Wiring patterns to be connected to balanced terminals of SAW filters of SAW duplexers are located on a second layer to a sixth layer of a layered body. The characteristic impedances of first wiring patterns defining a pair of parallel or substantially parallel lines match, the characteristic impedances of second wiring patterns defining a pair of parallel or substantially parallel lines match, the characteristic impedances of third wiring patterns defining a pair of parallel or substantially parallel lines match, and the characteristic impedances of fourth wiring patterns defining a pair of parallel or substantially parallel lines match.
    Type: Application
    Filed: January 25, 2013
    Publication date: June 6, 2013
    Applicant: MURATA MANUFACTURING CO., LTD.
    Inventor: Murata Manufacturing Co., Ltd.
  • Patent number: 8441327
    Abstract: A printed circuit board includes an insulation layer and a signal layer attached to the insulation layer. The signal layer includes a pair of differential transmission lines. Width W of each of the differential transmission lines is changed according to change of space S between the differential transmission lines, based on the following formula: W = C ? ? 1 × H × ( C ? ? 2 × H 0.8 ? W 0 + T ) C ? ? 3 × ? C ? ? 4 × S 0 H - 1 1 - C ? ? 3 × ? C ? ? 4 × S H - 1.25 ? T In above formula, C1=7.475, C2=5.98, C3=0.48, C4=?0.96, H is a thickness of the insulation layer, W0 is an original width of each of the differential transmission lines, and S0 is an original space between the differential transmission lines, and T is a thickness of each of the differential transmission lines.
    Type: Grant
    Filed: December 3, 2010
    Date of Patent: May 14, 2013
    Assignees: Hong Fu Jin Precision Industry (ShenZhen) Co., Ltd., Hon Hai Precision Industry Co., Ltd.
    Inventors: Hua-Li Zhou, Ming Wei, Chia-Nan Pai, Shou-Kuo Hsu
  • Patent number: 8436691
    Abstract: A signal transmission apparatus includes two circuit layers. First and second ground sheets each has a rectangular area are arranged in the two circuit layers respectively. A third ground sheet is arranged between the two circuit layers. A differential pair includes a transmission line arranged between the first and third ground sheets and a transmission line arranged between the second and third ground sheets. The first to third ground sheets have same electric potential. Projections of the two rectangular areas on a surface where the third ground sheet in only have one common border with the third ground sheet. The third ground sheet is formed by extending the common border along a signal transmission direction. The differential pair includes a number of section pairs each composed of two sections arranged in the two transmission lines symmetrically. Every two adjacent section pairs are equivalent to a capacitor and an inductor.
    Type: Grant
    Filed: November 17, 2009
    Date of Patent: May 7, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Po-Chuan Hsieh, Yu-Chang Pai, Shou-Kuo Hsu
  • Patent number: 8400232
    Abstract: A balun includes a first set of wound conductors includes a first loop portion and a second loop portion. The first loop portion and the second loop portion are conductively coupled and form a first figure eight structure. The balun further includes a second set of wound conductors includes a third loop portion and a fourth loop portion. The third loop portion and the fourth loop portion are conductively coupled and form a second figure eight structure. The first loop portion and the third loop portion are inductively coupled. The second loop portion and the fourth loop portion are inductively coupled.
    Type: Grant
    Filed: December 20, 2011
    Date of Patent: March 19, 2013
    Assignee: Marvell World Trade Ltd.
    Inventors: Poh Boon Leong, Hou Xian Loo
  • Patent number: 8390401
    Abstract: An embodiment relates to a coplanar waveguide electronic device comprising a substrate whereon is mounted a signal ribbon and at least a ground plane. The signal ribbon comprises a plurality of signal lines of a same level of metallization electrically coupled together, and the ground plane is made of an electrically conducting material and comprises a plurality of holes.
    Type: Grant
    Filed: May 19, 2009
    Date of Patent: March 5, 2013
    Assignee: STMicroelectronics, SA
    Inventors: Sébastien Pruvost, Frédéric Gianesello
  • Publication number: 20130049878
    Abstract: A differential mode transmission line with a weak coupling structure is presented. The differential mode transmission line with a weak coupling structure includes a first transmission line and a second transmission line. The first transmission line includes a first wiring portion, a second wiring portion, and a third wiring portion. The second transmission line also includes a first wiring portion, a second wiring portion, and a third wiring portion. The wiring portions of the present disclosure are connected through connection portions, and the connection portions are designed as a corner structure. Due to the characteristics of the corner structure of the present disclosure, a pitch between the second wiring portions is greater than that between the first wiring portions or the third wiring portions, thereby generating a weak coupling structure to suppress common mode noises.
    Type: Application
    Filed: November 22, 2011
    Publication date: February 28, 2013
    Applicant: CHUNG YUAN CHRISTIAN UNIVERSITY
    Inventors: Guang-Hwa SHIUE, Che-Ming HSU
  • Patent number: 8384491
    Abstract: A signal transmission apparatus includes two circuit layers. First and second ground sheets are arranged in the two circuit layers respectively. A third ground sheet is arranged between the two circuit layers. A differential pair includes a transmission line arranged between the first and third ground sheets and a transmission line arranged between the second and third ground sheets. The first to third ground sheets have same electric potential. Projections of the first and second ground sheets on the third ground sheet superpose a border of the third ground sheet. The third ground sheet is formed by extending the border along a signal transmission direction. A vertical distance between the first and second transmission lines is twice as each of a vertical distance from the first ground sheet to the first transmission line and a vertical distance from the second ground sheet to the second transmission line.
    Type: Grant
    Filed: November 17, 2009
    Date of Patent: February 26, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Po-Chuan Hsieh, Hsiao-Yun Su, Yu-Chang Pai, Shou-Kuo Hsu
  • Patent number: 8358179
    Abstract: A semiconductor device has a substrate and RF coupler formed over the substrate. The RF coupler has a first conductive trace with a first end coupled to a first terminal of the semiconductor device, and a second conductive trace with a first end coupled to a second terminal of the semiconductor device. The first conductive trace is placed in proximity to a first portion of the second conductive trace. An integrated passive device is formed over the substrate. A second portion of the second conductive trace operates as a circuit component of the integrated passive device. The integrated passive device can be a balun or low-pass filter. The RF coupler also has a first capacitor coupled to the first terminal of the semiconductor device, and second capacitor coupled to a third terminal of the semiconductor device for higher directivity. The second conductive trace is wound to exhibit an inductive property.
    Type: Grant
    Filed: September 10, 2009
    Date of Patent: January 22, 2013
    Assignee: STATS ChipPAC, Ltd.
    Inventors: Robert C. Frye, Kai Liu
  • Patent number: 8344821
    Abstract: A printed circuit board layout method includes the following steps. A printed circuit board with a signal layer and a pair of differential transmission lines positioned on the signal layer is provided. A first distance is determined; when the distance between the pair of differential transmission lines is greater than the first distance, an eye width and an eye height of an eye diagram nearly remains the same. When a distance between the pair of differential transmission lines is less than the first distance, an eye width and an eye height of an eye diagram decreases. A second distance that is less than the first distance is set between the pair of differential transmission lines which makes the eye width and the eye height greater than a predetermined value, and which is determined by a Far End Crosstalk (FEXT) on the eye diagram when the pair differential transmission lines transmit signals.
    Type: Grant
    Filed: August 13, 2010
    Date of Patent: January 1, 2013
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventor: Yu-Hsu Lin
  • Patent number: 8344819
    Abstract: Methods, systems, and apparatuses for circuit boards are provided herein. An electrically insulating material is formed over one or more traces on a circuit board. One or more further electrically conductive features are present on the circuit board. A layer of an electrically conductive material is formed over the one or more traces that is electrically isolated from the one or more traces by the electrically insulating material, and is in electrical contact with the one or more further electrically conductive features. The electrically conductive material confines magnetic and electric fields produced when the one or more traces conduct an alternating current. By confining the magnetic and electric field distributions in this manner, problems of interference and/or crosstalk with adjacent signal traces are reduced or eliminated.
    Type: Grant
    Filed: October 28, 2008
    Date of Patent: January 1, 2013
    Assignee: Broadcom Corporation
    Inventor: Sampath Komarapalayam Velayudham Karikalan
  • Patent number: 8324979
    Abstract: A coupled microstrip line structure having tunable characteristic impedance and wavelength are provided. In accordance with one aspect of the invention, a coupled microstrip line structure comprises a first ground plane having a plurality of first conductive strips separated by a dielectric material, and a first dielectric layer over the first ground plane. The coupled microstrip line further comprises a first signal line over the first dielectric layer, wherein the first signal line is directly above the plurality of first conductive strips, and wherein the first signal line and the plurality of first conductive strips are non-parallel, and a second signal line over the first dielectric layer, wherein the second signal line is directly above the plurality of first conductive strips, and wherein the second signal line and the plurality of first conductive strips are non-parallel, and wherein the second signal line is substantially parallel to the first signal line.
    Type: Grant
    Filed: November 12, 2009
    Date of Patent: December 4, 2012
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventor: Shu-Ying Cho
  • Patent number: 8319113
    Abstract: A printed circuit board (‘PCB’) with reduced dielectric loss, including conductive traces disposed upon layers of dielectric material, the layers of dielectric material including core layers and prepreg layers, one or more of the layers of dielectric material including pockets of air that reduce an overall relative dielectric constant of the PCB.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: November 27, 2012
    Assignee: International Buisness Machines Corporation
    Inventors: Moises Cases, Bradley D. Herrman, Bhyrav M. Mutnury, Nam H. Pham, Terence Rodrigues
  • Patent number: 8305156
    Abstract: A printed circuit board includes a signal layer and a ground layer adjacent to the signal layer. The signal layer includes a pair of differential transmitting lines. The ground layer includes a common mode filter formed by hollow spiral patterns in the ground layer. The common mode filter includes two filter portions respectively arranged at opposite sides of a projection of the pair of differential transmitting lines onto the ground layer. Hollowed areas of the two filter portions are bridged by a void.
    Type: Grant
    Filed: June 28, 2010
    Date of Patent: November 6, 2012
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Yu-Chang Pai, Po-Chuan Hsieh, Chien-Hung Liu
  • Patent number: 8299869
    Abstract: A balun including on the common-mode side, an inductive element in series with a first capacitive element between a first common-mode access terminal and the ground; and on the differential-mode side, two inductive windings in series having first respective ends defining differential access terminals and having second common ends connected to ground, second capacitive elements being respectively connected in parallel on the differential-mode windings.
    Type: Grant
    Filed: December 28, 2009
    Date of Patent: October 30, 2012
    Assignee: STMicroelectronics (Tours) SAS
    Inventors: Claire Laporte, Hilal Ezzeddine
  • Patent number: 8253509
    Abstract: A printed circuit board includes a signal layer and a ground layer adjacent to the signal layer. The signal layer includes a pair of differential transmission lines. The ground layer includes a first void, a second void, a third void, and a common mode filter. The first void and the second void are respectively arranged at opposite sides of a projection of the pair of differential transmission lines on the ground layer, and are bridged with the third void. The common mode filter includes a first filter portion positioned in the first void, and a second filter portion positioned in the second void. Each of the first and second filter portions includes a number of coils arranged side by side along a direction parallel to the projection of the pair of differential transmission lines.
    Type: Grant
    Filed: June 25, 2010
    Date of Patent: August 28, 2012
    Assignee: Hon Hai Precision Industry Co., Ltd.
    Inventors: Yu-Chang Pai, Chien-Hung Liu, Po-Chuan Hsieh