Coding By Table Look-up Techniques Patents (Class 341/106)
  • Patent number: 7321322
    Abstract: A compression and decompression method and apparatus comprising at least one data source providing a stream of data to at least one data destination, employing at least one pattern classifier processing the stream of data of the at least one data source into a single stream of messages and generating at least one pattern event, a message encoder and a message decoder changing an internal state in response to the at least one pattern event.
    Type: Grant
    Filed: November 7, 2005
    Date of Patent: January 22, 2008
    Assignee: SAP Portals Israel Ltd.
    Inventors: Nadav Binyamin Helfman, Guy Keren, Alex Drobinsky
  • Patent number: 7319417
    Abstract: An input tangled sequence such as an instruction stream is compressed by modeling the sequence into multiple Markov chains to simultaneously capture and exploit the correlations among and within subsequences that are mingled in the input tangled sequence. The multiple Markov chains may be combined to drive an entropy coder.
    Type: Grant
    Filed: November 18, 2005
    Date of Patent: January 15, 2008
    Assignee: Intel Corporation
    Inventors: Xiaolin X. Wu, Yuanhao Sun, Boon-Lock Yeo, Lv Lv, Fenglin Yu
  • Patent number: 7315266
    Abstract: Method of reversible compression of low-order bits in digital images that uses image palette as a look up table for high versus low order bit fragments and replaces actual low-order bit fragments in the image by relative sequential indexes that identify the position of correspondent low-order bit fragment in palette array. Said relative sequential indexes are smaller than low-order bit fragments because they are introduced and incremented within the same high-order bit expression in palette array and have significantly different statistical distribution properties compared to distribution of original low-order bit fragments. For successful reconstruction of said low-order bit fragments from said relative sequential indexes the critical part of palette array is saved in compressed data. In spite of additional data buffer the method significantly improves compression ratio and has dual effect: first is compression of low-order bits and second is possibility to ignore then low-order bits in data modeling.
    Type: Grant
    Filed: September 1, 2006
    Date of Patent: January 1, 2008
    Inventor: Andrew Polar
  • Patent number: 7310055
    Abstract: Character strings in sample data are classified into groups of character strings with the same leading n characters (for example, “abc”). Then, one character string with the highest appearance frequency (the most frequently appearing character string) in the sample data is extracted from each group. The most frequently appearing character strings extracted from each group are registered in a dictionary as initial values in descending order of appearance frequency. Alternatively, character strings in sample data are classified into groups of character strings with the same hash value of leading n characters, the most frequently appearing character string is detected from each of the groups and the most frequently appearing character string is registered in the dictionary as an initial value.
    Type: Grant
    Filed: January 31, 2006
    Date of Patent: December 18, 2007
    Assignee: Fujitsu Limited
    Inventor: Junichi Odagiri
  • Patent number: 7307552
    Abstract: A method and apparatus provide for data compression with deflate block overhead reduction through the use of “pseudo-dynamic” Huffman codes to enable single deflate block encoding in a deflate algorithm implementation. Further, provided is data compression with deflate block overhead reduction through the use of “pseudo-dynamic” Huffman codes to enable single deflate block encoding in a deflate algorithm implementation, with inflation detection and mitigation capabilities.
    Type: Grant
    Filed: November 16, 2005
    Date of Patent: December 11, 2007
    Assignee: Cisco Technology, Inc.
    Inventors: Kevin Ma, Wayne Wei-Wen Chen
  • Patent number: 7298298
    Abstract: A network device capable of transmitting data includes a processor, an encoder and a port. The encoder encodes the data using a known valid dictionary while constructing a new dictionary over an epoch of data. A network device capable of receiving encoded data is also disclosed. The network device includes a processor, a port and a decoder. The decoder is operable to decode the data using a known valid dictionary, while constructing a new dictionary over the epoch of data. When a valid dictionary has been constructed, the receiving device notifies the transmitting device.
    Type: Grant
    Filed: April 15, 2003
    Date of Patent: November 20, 2007
    Assignee: Cisco Technology, Inc.
    Inventor: Mehryar Khalili Garakani
  • Patent number: 7271748
    Abstract: Systems and methods are provided for providing a filtered, thermometer coded output signal from an N bit digital input, where N is an integer greater than one. A truncated lookup table provides a corresponding truncated thermometer code in response an address related to the N bit digital input. A code recovery assembly transforms the truncated thermometer code into a thermometer coded output according to a recovery bit associated with the N bit digital input.
    Type: Grant
    Filed: September 13, 2004
    Date of Patent: September 18, 2007
    Assignee: Texas Instruments Incorporated
    Inventors: Keith Charles Brouse, Paul E. Landman
  • Patent number: 7262715
    Abstract: According to some embodiments, a bit stuffing method is provided for fax and other data communication.
    Type: Grant
    Filed: December 31, 2002
    Date of Patent: August 28, 2007
    Assignee: Intel Corporation
    Inventor: Raghavendra P. Sagar
  • Patent number: 7256715
    Abstract: Received data is compressed according to an algorithm, which is a modification of the conventional LZW algorithm. A limited number of hash values are formed, and a code memory is searched at locations corresponding to the hash values. If all of the locations contains a valid code, but none of them contains a valid code corresponding to a potential new code, a dummy code is created, and a counter, which indicates the number of codes created, is incremented. The algorithm can be implemented in parallel in hardware.
    Type: Grant
    Filed: January 7, 2005
    Date of Patent: August 14, 2007
    Assignee: Altera Corporation
    Inventor: Martin Langhammer
  • Patent number: 7250879
    Abstract: A decoder circuit includes a first delay means for delaying unit data read out from a dictionary, a selecting means for selecting data and a second delay means for delaying data selected by the selecting means, wherein delayed data from the second selecting means is written again in the dictionary, the selecting means is supplied with delayed data from the first delay means and delayed data from the second delay means and the selecting means selects delayed data from the second delay means if a read address and a write address of the dictionary fall within a range of a predetermined distance corresponding to delay amounts of the first and second delay means and the selecting means selects delayed data from the first delay means in other cases.
    Type: Grant
    Filed: May 15, 2006
    Date of Patent: July 31, 2007
    Assignee: Sony Corporation
    Inventor: Toshiyuki Hirose
  • Patent number: 7248190
    Abstract: The present invention correctly decodes data encoded with a variable-length encoding method that improves the compression ratio. The variable-length encoding method encodes a unit data composed of a plurality of sub-data while referencing a parameter table, and includes: an initialization step in which the parameter table is set to initial values; a parameter table information encoding step in which information related to the initialized parameter table is encoded; a parameter obtaining step in which encoding parameters to be used in the encoding of sub-data are obtained from the parameter table; a sub-data encoding step in which variable-length encoding of the sub-data is performed with reference to the obtained encoding parameters; and an encoded information placement step in which the encoded information is placed in a position in which the information can be obtained before the encoded unit data.
    Type: Grant
    Filed: March 7, 2006
    Date of Patent: July 24, 2007
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinya Kadono, Yoshinori Matsui, Satoshi Kondo
  • Patent number: 7242329
    Abstract: Methods, systems and data structures select prioritized robust data values from a plurality of available data values formed by a plurality of data bits, each capable of exhibiting a bit value. Available data values are arranged into a gray code format, and alternate values of gray code format are selected to form a value map. An optional complementary value map may also be formed from the remaining data values. The value map is then prioritized according to bit adjacencies, wherein bit adjacencies are defined by contiguous bits within one of the data values that exhibit a common bit value. Priority may be given to data values having shortest and/or fewest bit adjacencies.
    Type: Grant
    Filed: August 11, 2005
    Date of Patent: July 10, 2007
    Assignee: GM Global Technology Operations, Inc.
    Inventor: Kerfegar K. Katrak
  • Patent number: 7233265
    Abstract: A method (300) and arrangement for LZ1 compression of a data string where multiple input symbols are compared in parallel with the history buffer by: holding in an input buffer (140) a first sequence of bytes of the data string; holding in a history buffer (110, 120) a second sequence of bytes of the data string; comparing (170), in matrix comparison means coupled to the input buffer and the history buffer and having a plurality of rows and columns of comparison units (200), bytes held in the input buffer with bytes held in the history buffer, bytes of the history buffer being coupled to diagonally displaced comparison units in the matrix comparison means; detecting (150) in each of the rows the column in which a largest number of consecutive byte matches has occurred at the comparison unit in that row and preceding comparison units in the same column; and encoding (160) as a token a sequence of matched bytes detected in the step of detecting (150).
    Type: Grant
    Filed: January 30, 2003
    Date of Patent: June 19, 2007
    Assignee: International Business Machines Corporation
    Inventors: Gordon Cockburn, Adrian John Hawes
  • Patent number: 7233266
    Abstract: A first compression unit compresses input data by a first compression method utilizing a dictionary coding method. A second decompression unit compresses input data by a second compression method utilizing a statistical coding method. A size calculation/determination unit pre-calculates sizes of data to be output when the data is compressed only by the first compression method, when the data is compressed only by the second compression method, when the data is compressed both by the first and second compression methods, and when the data is compressed neither by the first nor the second compression method, and selects the method that will result in the smallest data size, so that the input data is compressed by the selected method.
    Type: Grant
    Filed: December 20, 2005
    Date of Patent: June 19, 2007
    Assignees: Casio Electronics Manufacturing Co., Ltd., Casio Computer Co., Ltd.
    Inventor: Miyoshi Sasakura
  • Patent number: 7218252
    Abstract: A system and method for converting character sets are provided. In one embodiment, the method includes populating a conversion character array based on a character string and a conversion character string, with the character string represented in a first character set and the conversion character string comprising the character string represented in a second character set. A conversion status array is populated for the character string at least partially based on the conversion character array. A dataset is then selected and the dataset is represented in the first character set. The dataset is converted into the second character set based, at least in part, on the conversion character array and the conversion status array.
    Type: Grant
    Filed: June 4, 2004
    Date of Patent: May 15, 2007
    Assignee: Computer Associates Think, Inc.
    Inventor: Scott A. Fauque
  • Patent number: 7215264
    Abstract: Character conversion methods for converting characters from a source character code set to a destination character code set. The source and destination character code sets are analyzed to establish a mapping table indicating relationships therebetween. A target character encoded in the source character code set is converted to destination code encoded in the destination character code set by searching the mapping table.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: May 8, 2007
    Assignee: Pixtel Media Technology (P)Ltd.
    Inventors: Vikram Salwan, Arun Gupta, Anku Jain
  • Patent number: 7215259
    Abstract: A method and apparatus for encoding a sequence of input data into a sequence of coded data, where the coded data is represented as literal data, as single-character references to recent input data, and as a references to one or more past input data. The references may be fixed in length or variable in length. The references may include an indication of a match offset and/or an indication of a match length.
    Type: Grant
    Filed: July 11, 2005
    Date of Patent: May 8, 2007
    Assignee: Quantum Corporation
    Inventors: Galen G. Kerber, Jeffrey A. Riley, Bijan Eskandari-Gharnin
  • Patent number: 7205915
    Abstract: The method disclosed may be used together with any prefix oriented decoding method to enable faster decoding of variable length codes when a subset of most frequently used codes with relatively short prefixes may be determined. An embodiment of the present invention reads a number of bits, not less than the maximal possible length of a code, from a bit stream. Then a predetermined number of bits is selected and used as an index to a data structure that contains at least a decoded value and a validity indicator, along with other pre-decoded data, namely: prefix type and length, maximal code length for a group of codes, actual code length, the number of bits to return to the bit stream, etc. The validity indicator is used to determine whether to proceed with the decoding operation, or obtain the valid decoded value from the data structure and return excess bits to the bit stream.
    Type: Grant
    Filed: July 15, 2003
    Date of Patent: April 17, 2007
    Assignee: Intel Corporation
    Inventors: Sergey Nikolaevich Zheltov, Stanislav Viktorovich Bratanov
  • Patent number: 7190288
    Abstract: Signal conversion is implemented employing a memory system operating as a look-up table that stores a plurality of sets of output samples associated with each of a plurality of respective input samples. The look-up table thus can generate a corresponding set of output samples in response to a given input sample, thereby emulating desired digital upsampling and delta-sigma modulation. The output samples can be aggregated, such as by multiplexing, to provide an output data stream at a desired sample rate.
    Type: Grant
    Filed: June 27, 2003
    Date of Patent: March 13, 2007
    Assignee: Northrop Grumman Corp.
    Inventors: Ian Stuart Robinson, Jeffrey Mark Hinrichs, Jasmine Upendra Patel, Paul Charles MacFalda, Reza Dehmohseni, Frederic J. Harris, Kenneth Weber
  • Patent number: 7164374
    Abstract: A demodulation apparatus and method using a code table that decreases complexity. The demodulation apparatus includes a code table including a plurality of the code words, wherein similar ones of the code words are arranged to be grouped together; and a soft demodulator to calculate probabilities of individual bits that constitute the code words, and to generate a soft demodulation value of the data word.
    Type: Grant
    Filed: May 11, 2005
    Date of Patent: January 16, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sung-hyu Han, Ki-hyun Kim, In-sik Park, Yoon-woo Lee
  • Patent number: 7155173
    Abstract: A method for providing wireless communication between a mobile station and a network station using a context for message compression is provided. Profile-specific information is stored persistently in a profile-specific dictionary. Communication is then provided between the mobile station and the network station using the profile-specific dictionary for message compression.
    Type: Grant
    Filed: December 17, 2001
    Date of Patent: December 26, 2006
    Assignee: Nokia Corporation
    Inventors: Ka Cheong Leung, Khiem Le, Zhigang Liu, Christopher Clanton
  • Patent number: 7148821
    Abstract: An apparatus and method of decoding variable length codes is provided. According to some embodiments, a method includes receiving a bitstream of a codebook of variable length codes, partitioning the codebook based on leading zeros (0) or ones (1), removing a common prefix, from each codeword to obtain a set of shortened codewords, determining a set of bit-patterns from the shortened codewords, partitioning the shortened codewords based on the set of bit-patterns to obtain sub-sets of the shortened codewords, removing a common prefix from each shortened codeword in the sub-sets of shortened codewords to obtain residual codewords, and forming a codebook based on the residual codewords.
    Type: Grant
    Filed: February 9, 2005
    Date of Patent: December 12, 2006
    Assignee: Intel Corporation
    Inventor: Hari Thirumoorthy
  • Patent number: 7145487
    Abstract: Methods and devices for processing GPS signals are provided. The device includes: a memory for storing one or more lookup tables, each lookup table including a plurality of entries, each entry including an input segment and an output segment, wherein the output segment is a system response to the corresponding input segment. The device further includes a processor configured to receive an input data sequence including one or more input segments, and for each of the input segments, retrieve from one of the lookup tables the output segments corresponding to the input segment. The processor is further configured to perform a time-shifted sum of one or more output segments to produce an output sequence that is a downsampled representation of the input data sequence.
    Type: Grant
    Filed: February 23, 2005
    Date of Patent: December 5, 2006
    Assignee: SiRF Technology, Inc.
    Inventors: Erik Anderson, Paul Eric Beckmann, William Kerry Keal
  • Patent number: 7143143
    Abstract: A system and method for transferring multiple portions of data utilizing a distributed cache are disclosed. A content server obtains a request for content data and associates an identifier with the request. The content server returns a first portion of the data with the request and stores a second portion of the data in a cache according to the first identifier. Thereafter, the content server receives a request for the remaining portion of the provider data and associates a second identifier with the second request. If the second identifier matches the first identifier, the content server returns the data stored according to the first identifier. Additionally, the content server implements and utilizes a click server having multiple cache servers in which multi-cache replication is utilized to store identical contents in each cache server.
    Type: Grant
    Filed: October 27, 2000
    Date of Patent: November 28, 2006
    Assignee: Microsoft Corporation
    Inventor: R. Donald Thompson
  • Patent number: 7135997
    Abstract: A CAVLC decoding method and apparatus is provided. In the method for decoding a coded bitstream using a CAVLC length table and a CAVLC value table, CAVLC length tables are re-sorted in an order of a codeword length and the coded bitstream is decoded using the re-sorted length table. Therefore, since data on a bitstream is sequentially read as much as a length suggested by the re-sorted table of the present invention, a memory access time is reduced and calculation complexity for comparing the CAVLC codewords is reduced.
    Type: Grant
    Filed: December 17, 2004
    Date of Patent: November 14, 2006
    Assignee: LG Electronics Inc.
    Inventor: Jun Hwan Oh
  • Patent number: 7129864
    Abstract: A method may include performing an N bit-at-a-time matching operation for a first N bits in an encoded input stream of bits using a lookup table. The matching operation may obtain a first address in the table, and N may be an integer greater than one. The method may also include obtaining a second address in the table based on a mask and a jump address that are associated with the first address and a second number of bits in the encoded input stream. An index value may be output based on the second address in the table.
    Type: Grant
    Filed: December 31, 2004
    Date of Patent: October 31, 2006
    Assignee: Intel Corporation
    Inventors: Musa Jahanghir, Munsi A. Haque, Louis Lippincott
  • Patent number: 7119975
    Abstract: A position of a moveable object may be encoded and indicated by a skew-tolerant Gray code on the object. Skew-tolerant Gray codes have the property that consecutive code words differ in only one co-ordinate position, and the additional property that, in each consecutive group of three consecutive code words, the first and third code words differ in only two adjacent coordinate positions.
    Type: Grant
    Filed: December 12, 2003
    Date of Patent: October 10, 2006
    Assignee: Hitachi Global Storage Technologies-Netherlands BV
    Inventors: Mario Blaum, Bruce Alexander Wilson
  • Patent number: 7113115
    Abstract: Embodiments relate to converting or compressing symbols or run, level pair of an input digital video or image data stream to variable length code (VLC) by looking the symbols or run, level pairs up in a table including a binary code, a length code, and a flip code and constructing the VLC therefrom. For instance, the binary code may identify a first non-zero portion of the VLC, the length may identify the length of the VLC, and the flip code may identify whether or not the first portion and a number of 0's appended to the first portion to form a VLC having the length given by the length code, must be inverted to create the VLC. Also, the table may include entries grouped according to symbol or run, level pair values, and an address offset determined by the symbol or run, level pair or the input may be used to access the binary, length, and flip code from the appropriate group.
    Type: Grant
    Filed: June 30, 2004
    Date of Patent: September 26, 2006
    Assignee: Intel Corporation
    Inventors: Suketu R. Partiwala, Kalpesh D. Mehta
  • Patent number: 7113112
    Abstract: Techniques are disclosed that reduce the computational complexity of PPM-based data compression through use of certain simplifying assumptions that permit faster search for a close-to-optimal PPM model than conventional techniques. The disclosed techniques permit the cost of the computationally-expensive model building task to be amortized over many compression/decompression cycles by maintaining a PersistentModel class, accessible to both the coder and decoder side of the system. This allows the computationally-expensive model building task to be performed only occasionally, as opposed to each time a message is coded. Furthermore, the model-building task is preferably scheduled to run at non-busy times, such that it minimizes user-perceptible service disruptions.
    Type: Grant
    Filed: April 16, 2002
    Date of Patent: September 26, 2006
    Assignee: Vindigo, Inc.
    Inventors: Jon McAuliffe, David Joerg
  • Patent number: 7109895
    Abstract: A data compression architecture includes a shift register with multiple shift register elements. A data input receives input data characters, and applies each received input data character to the shift register, such that the received input data character is stored in each shift register element of said shift register in turn. Logic circuitry is associated with each shift register element of the shift register, for detecting a match when the comparison circuitry determines that a sequence of two or more received input data characters is equal to a sequence stored in the shift register. A flush input receives a data flush input signal, and applies a received data flush input signal to the logic circuitry associated with each shift register element of the shift register, such that no match is detected by said logic circuitry when the data flush input signal is received.
    Type: Grant
    Filed: February 1, 2005
    Date of Patent: September 19, 2006
    Assignee: Altera Corporation
    Inventor: Martin Langhammer
  • Patent number: 7106228
    Abstract: The present invention relates to a method and system for multi-rate lattice vector quantization of a source vector x representing a frame from a source signal to be used, for example, in digital transmission and storage systems. The multi-rate lattice quantization encoding method comprises the steps of associating to x a lattice point y in a unbounded lattice ?; verifying if y is included in a base codebook C derived from the lattice ?; if it is the case then indexing y in C so as to yield quantization indices if not then extending the base codebook using, for example a Voronoi based extension method, yielding an extended codebook; associating to y a codevector c from the extended codebook, and indexing y in the extended codebook C. The extension technique allows to obtain higher bit rate codebooks from the base codebooks compared to quantization method and system from the prior art.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: September 12, 2006
    Assignee: VoiceAge Corporation
    Inventors: Bruno Bessette, Stéphane Ragot, Jean-Pierre Adoul
  • Patent number: 7103536
    Abstract: If the character string is long, and when retrieving symbols containing characters of high frequency of appearance or character chain, high speed retrieval is possible up to infix matching, and a symbol dictionary of small capacity can be compiled. In the symbol dictionary compiling method of the invention, each symbol in symbol data is covered with shorter symbols called “meta-symbols” for covering the symbol in the symbol data, and the information showing how each symbol is covered is obtained by preparing meta-symbol appearance information recorded in each meta-symbol, and therefore high speed retrieval including up to infix matching is possible, and a symbol dictionary of small capacity can be compiled.
    Type: Grant
    Filed: November 30, 1999
    Date of Patent: September 5, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventor: Yuji Kanno
  • Patent number: 7095344
    Abstract: In a bit stream syntax containing compressed video slice data for compressed video data of a slice structure, a slice header for compressed video slice data has attached thereto a slice start code, a register reset flag indicating whether a register value, which designates a status of a codeword occurring in an arithmetic coding process, should be reset in the next transmission unit, an initial register value which indicates a register value to be used to start arithmetic coding/decoding to build/decompose the next transmission unit, only when the register reset flag indicates that the register should not be reset.
    Type: Grant
    Filed: April 10, 2003
    Date of Patent: August 22, 2006
    Assignee: Mitsubishi Denki Kabushiki Kaisha
    Inventors: Shunichi Sekiguchi, Yoshihisa Yamada, Kohtaro Asai
  • Patent number: 7095343
    Abstract: Code compression techniques and decompression architectures for embedded systems are disclosed, providing good compression ratio while improving decompression time for VLIW instructions and reducing bus power consumption. The invention includes two fixed-to-variable (F2V) length code compression schemes based on a reduced arithmetic code compression algorithm combining arithmetic coding with probability models; a static probability model using static coding and semi-adaptive coding using a Markov model. Multi-bit decompression methods for the F2V techniques are presented, together with a parallel decompression scheme that tags and divides a compressed block into smaller sub-blocks. The Markov model provides better compression ratio, but the static model has a less complicated decompression unit design. The invention also includes two variable-to-fixed (V2F) length coding algorithms, one based on Tunstall coding and another on arithmetic coding.
    Type: Grant
    Filed: October 9, 2002
    Date of Patent: August 22, 2006
    Assignee: Trustees of Princeton University
    Inventors: Yuan Xie, Wayne H Wolf
  • Patent number: 7088269
    Abstract: The present invention correctly decodes data encoded with a variable-length encoding method that improves the compression ratio. The variable-length encoding method encodes a unit data composed of a plurality of sub-data while referencing a parameter table, and includes: an initialization step in which the parameter table is set to initial values; a parameter table information encoding step in which information related to the initialized parameter table is encoded; a parameter obtaining step in which encoding parameters to be used in the encoding of sub-data are obtained from the parameter table; a sub-data encoding step in which variable-length encoding of the sub-data is performed with reference to the obtained encoding parameters; and an encoded information placement step in which the encoded information is placed in a position in which the information can be obtained before the encoded unit data.
    Type: Grant
    Filed: February 24, 2005
    Date of Patent: August 8, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Shinya Kadono, Yoshinori Matsui, Satoshi Kondo
  • Patent number: 7079056
    Abstract: A compressed data table is formed from an uncompressed data table by defining a code description bit structure having a code type and a run length of data items. The code type may be configured to identify byte-length data items, word-length data items and/or one or more user-specified data items. Each run of one or more byte-length, word-length or user-specified data items in the uncompressed data table is represented in the compressed data table with a code description bit structure having an appropriately configured code type and having its run length equal to the number of byte-length, word-length or user-specified data items in the run of one or more byte-length or word-length data items, and in the case of byte-length and word-length data items each code description bit structure is followed in the compressed data table by the one or more byte-length or word-length data items.
    Type: Grant
    Filed: January 15, 2003
    Date of Patent: July 18, 2006
    Assignee: Delphi Technologies, Inc.
    Inventor: Richard A Weaver
  • Patent number: 7071849
    Abstract: The present invention abandons the conventional approach of incrementing bits-per-cell b by 1, but allows increments of states-per-cell N by as little as 1 between product generations. Because N is no longer an integral power of 2, b takes a fractional value, resulting in a fractional-bit system. In a fractional-bit system, cells are decoded in unit of word. By adjusting the word-width, the system efficiency can be optimized.
    Type: Grant
    Filed: March 31, 2005
    Date of Patent: July 4, 2006
    Inventor: Guobiao Zhang
  • Patent number: 7064688
    Abstract: A method for compressing a message is disclosed, comprising: identifying a block of data within the message which is found in a previous message; generating a pointer identifying the block of data in said previous message; and replacing the block of data with the pointer in the message.
    Type: Grant
    Filed: July 9, 2001
    Date of Patent: June 20, 2006
    Assignee: Good Technology, Inc.
    Inventors: Roger Collins, John Lawrence Friend
  • Patent number: 7061407
    Abstract: An encoder includes a first storage array having a first set of values, a second storage array having a second set of values, and a selection circuit. Each of the first and second storage arrays have address ports coupled to receive a first or second portion of an input value, and are adapted to output a first or second value of the first or second set in response to a value of the first or second portion of the input value, respectively. The selection circuit has input ports coupled to the first storage array, to the second storage array, and for receiving the input value. The selection circuit is adapted to output the second value from the second storage array as an encoded value of the input value or the first value from the first storage array as the encoded value.
    Type: Grant
    Filed: June 14, 2005
    Date of Patent: June 13, 2006
    Assignee: Xilinx, Inc.
    Inventor: Hyun Soo Lee
  • Patent number: 7061410
    Abstract: An apparatus comprising a first circuit, a second circuit and an output circuit. The first circuit may be configured to generate (i) one of a first set of entropy coded input signals or a second set of entropy coded input signals and (ii) a data path signal. The second circuit may be configured to generate (i) a first set of entropy encoded output signals in response to decoding the second set of entropy coded input signals, or (ii) a second set of entropy coded output signals in response to decoding the first set of entropy coded input signals. The second circuit may provide real time decoding and encoding on a macroblock basis. The output circuit may be configured to present an output signal in response to (i) one of the first set of entropy coded output signals or the second set of entropy coded output signals and (ii) the data path signal.
    Type: Grant
    Filed: July 18, 2005
    Date of Patent: June 13, 2006
    Assignee: LSI Logic Corporation
    Inventors: Eric C. Pearson, Harminder S. Banwait
  • Patent number: 7046175
    Abstract: A decoding method includes extracting a preselected number of bits from a bitstream to be decoded, accessing a table entry of a table using an index generated in response to the extracted bit, and if a first value in the table entry indicates a second value in the table entry comprises a decoded result, retrieving the decoded result.
    Type: Grant
    Filed: May 27, 2005
    Date of Patent: May 16, 2006
    Assignee: Cirrus Logic, Inc.
    Inventor: Girish Subramaniam
  • Patent number: 7026962
    Abstract: A technique for constructing a dictionary word list for use in a data compressor is provided by determining a set of words that are included in the dictionary word list and sorting each subset of words having a common starting character by lengths of the words. Partitions are formed and identified based on the common starting character and word length, with each partition being stored in memory and indexed.
    Type: Grant
    Filed: July 27, 2000
    Date of Patent: April 11, 2006
    Assignee: Motorola, Inc
    Inventors: Shahriar Emami, Julio C. Blandon
  • Patent number: 7019673
    Abstract: Skew-tolerant Gray codes have the property that consecutive code words differ in only one co-ordinate position, and the additional property that, in each consecutive group of three consecutive code words, the first and third code words differ in only two adjacent coordinate positions.
    Type: Grant
    Filed: February 18, 2005
    Date of Patent: March 28, 2006
    Assignee: Hitachi Global Storage Technologies-Netherlands
    Inventors: Mario Blaum, Bruce Alexander Wilson
  • Patent number: 7019674
    Abstract: A content-based information retrieval architecture is herein disclosed that can achieve correct and predictable high speed lookups while taking advantage of inexpensive conventional memory components. A content-based information retrieval architecture is herein disclosed that can achieve high speed lookups with a constant query time while taking advantage of inexpensive conventional memory components. In accordance with an embodiment of the invention, the architecture comprise a hashing module, a first table of encoded values, a second table of lookup values, and a third table of associated input values. The input value is hashed a number of times to generate a plurality of hashed values, the hashed values corresponding to locations of encoded values in the first table. The encoded values obtained from an input value encode an output value such that the output value cannot be recovered from any single encoded value.
    Type: Grant
    Filed: August 2, 2004
    Date of Patent: March 28, 2006
    Assignee: NEC Laboratories America, Inc.
    Inventors: Srihari Cadambi, Joseph Kilian, Pranav Ashar, Srimat T. Chakradhar
  • Patent number: 7015836
    Abstract: An EFM data decoding method and apparatus thereof for optical disk system is provided. According to the method, a 14-bit data complying with the EFM modulation criteria but failing to correspond to a 8-bit data based on an EFM decoding table is transformed successfully by looking up an expanded EFM decoding table. The expanded EFM decoding table includes probable 8-bit data corresponding to the erroneous data complying with the EFM modulation criteria. Reliability of data reading is thus enhanced in the present invention.
    Type: Grant
    Filed: March 1, 2005
    Date of Patent: March 21, 2006
    Assignee: VIA Technologies, Inc.
    Inventors: Pei-Jei Hu, S L Ouyang
  • Patent number: 7015839
    Abstract: A method includes utilizing the look-up table to store a plurality of basic values and a plurality of delta value sets, wherein each of the delta value sets represents a difference between a corresponding basic value and another basic value adjacent to the corresponding basic value; determining a first basic value and a first delta value set according to an input value; and generating an output value according to the first basic value and the first delta value set.
    Type: Grant
    Filed: January 6, 2005
    Date of Patent: March 21, 2006
    Assignee: Realtek Semiconductor Corp.
    Inventors: Hsien-Chun Chang, Jin-Sheng Gong
  • Patent number: 6999010
    Abstract: A table look-up method for ASN.1 encoding/decoding systems is disclosed. Once the invention receives input data, it adds a specified index to the received data, then it analyzes whether the received data contains explicit reference data, implicit reference data or optional data. The invention further modifies the specified index of explicit, implicit or optional data. It compares the consistency of the modified specified index with the specified index in a reference table; if it is consistent, it declares the input data being fully decoded. The conventional method has four main steps: (1). Updating definition data. (2). Executing program generator. (3). Redoing encoding and decoding. (4). Applying new function. This invention simplifies the method into two main steps: (1). Updating definition data. (2). Applying new function. Furthermore, this method does not need to modify program for encoding/decoding a file. This method simplifies the conventional flow process for handling the tabulated data file.
    Type: Grant
    Filed: April 16, 2004
    Date of Patent: February 14, 2006
    Assignee: Ares International Corporaton
    Inventor: Tai-Hung Lin
  • Patent number: 6982662
    Abstract: An apparatus and method for conversion of direct stream digital (DSD) signal samples to pulse code modulated (PCM) signal samples using a look-up table. The apparatus includes a first-in-first-out (FIFO) buffer that contains a plurality of bits from a DSD signal, the plurality of bits further divided into a plurality of words of the same size. The apparatus comprises a look-up table coupled to the FIFO buffer, the look-up table generating a result for each of the plurality of words. In one embodiment, the apparatus includes an accumulator coupled to the look-up table, the accumulator holding the results added together. After adding the result for the last word in the plurality of bits, the accumulator generates at an output a multiple bit PCM signal sample. The apparatus includes an address generator connected to the FIFO buffer and look-up table.
    Type: Grant
    Filed: March 8, 2004
    Date of Patent: January 3, 2006
    Assignee: Texas Instruments Incorporated
    Inventor: Jaehoon Heo
  • Patent number: 6975256
    Abstract: A circuit is provided for rectifying and amplifying an AC input waveform to optimize the dynamic range of downstream circuitry, such as an analog-to-digital converter. The circuitry includes an inverting amplifier and a non-inverting amplifier. The inverting amplifier includes a selectable resistance network in a feedback loop that permits the gain to be adjusted by appropriate selection of conductive states of solid state switches. The non-inverting amplifier includes a selectable resistance network on an input line. A control circuit, such as a microprocessor, monitors the output of the A/D converter and controls the conductive state of switches in the feedback and input networks to maintain the digital output within a desired portion of the dynamic range of the A/D converter. Several discrete gains may be provided and programmed in accordance with a predetermined selection scheme.
    Type: Grant
    Filed: September 29, 2000
    Date of Patent: December 13, 2005
    Assignee: Rockwell Automation Technologies, Inc.
    Inventors: Daniel J. Bolda, Steven T. Haensgen
  • Patent number: 6968305
    Abstract: A method and apparatus for creating a memory model for use in modeling a physical memory of an electronic circuit design. Memory write operations to the physical memory and memory read operations are modeled in a lookup table. The number of entries in the lookup table is limited by an upper bound representing a total number of memory operations that can occur over a given number of clock cycles.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: November 22, 2005
    Assignee: Averant, Inc.
    Inventor: Adrian J. Isles