Abstract: Aspects of the subject technology relate to electronic devices with displays. A display may include an array of display pixels and control circuitry for operating the display. The control circuitry may determine, based on pixel values for a row of display pixels, that a current in common supply voltage circuitry for the display pixels will exceed a threshold, if the row of display pixels is operated using the pixel values. The control circuitry may modify the pixel values for the row of display pixels to reduce the current in the common supply voltage circuitry and/or prevent the current in the common supply voltage circuitry from exceeding the threshold.

Abstract: A protection circuit for use in an RF active circuit includes a signal strength detecting circuit, a current detecting circuit, a logic circuit, and a switching unit. The signal strength detecting circuit is coupled to the signal input end or the signal output end of the RF active circuit and configured to generate a first detecting signal according to the signal strength of the RF signal. The current detecting circuit is configured to detect the VSWR of the RF signal based on the driving current of the RF active circuit, thereby generating a corresponding second detecting signal. The logic circuit is configured to generate a switch control signal according to the first detecting signal and the second detecting signal. The switching unit is configured to lower the driving current of the RF active circuit according to the switch control signal.

Abstract: A digital up-converter (DUC) includes a cascaded combinator-differentiator (CCD) filter, a low-pass filter, an up-sampler, and a down-sampler. The combinator includes a number of series-connected combinator stages and the differentiator includes a number of series-connected differentiator stages. The CCD filter functions similarly to an interpolator filter, filtering and up-sampling the baseband signal out of the baseband. In one embodiment, the up-sampling factor is twice the number of channels (2N). The disclosed DUC does not require complex mixers or oscillators. Also, the low-pass filter of the DUC does not require a narrow transition band, so the number of coefficients for the low-pass filter is relatively low.

Abstract: A method and apparatus for processing a signal, wherein the apparatus identifies a sample interval satisfying a predetermined reference using a change in a plurality of samples based on a downsampling, acquires, based a result of the identifying, a feature point of a signal before the downsampling is applied to the signal, and acquires time information corresponding to a position of the feature point in a feature sample interval including the feature point is provided.

Abstract: A utility meter for measuring a utility parameter is disclosed, the utility meter including a measuring system, an analog-to-digital converter having a conversion range, and a control unit, the measurement system being able to transmit a measurement signal representative of the utility parameter to the analog-to-digital converter, and the analog-to-digital converter being able to convert the measurement signal into a digital bit number and transmit the digital bit number to the control unit. The control unit controls the transmission of an ADC control signal based on a set of digital bit numbers to the analog-to-digital converter so as to control the conversion range. Furthermore, a method of operating a utility meter is disclosed.

Abstract: A system and method is described for converting an analog signal into a digital signal. The gain and offset of an ADC is dynamically adjusted so that the N-bits of input data are assigned to a narrower channel instead of the entire input range of the ADC. This provides greater resolution in the range of interest without generating longer digital data strings.

Abstract: A transmitter according to the present invention includes: a baseband amplitude value distribution processor (90) for changing a distribution of an amplitude value of a baseband signal based on a control signal that has been input and outputting the baseband signal as an output signal; a digital transmitter (91) that ?? modulates the output signal and transmits the modulated signal; an in-band distortion measurement unit (92) for measuring an in-band distortion amount of the output signal; an amplitude value distribution measurement unit (93) for calculating an amplitude value distribution of the output signal; a sideband distortion prediction unit (94) for predicting a sideband distortion amount occurring in the output signal by the digital transmitter (91) from the calculated amplitude value distribution; and a baseband processing controller (95) for adjusting the control signal based on the measured in-band distortion amount and the sideband distortion amount and outputting the adjusted signal.

Abstract: A frequency response analyzer includes a signal generator, a reference channel module, and a digital frequency response analyzer. The signal generator includes an input, a first output to provide an output signal to a unit under test, and a second output to provide a first synchronization signal. The reference channel module includes an input coupled to the first output of the signal generator, and an output to provide phase information data of the output signal. The digital frequency response analyzer includes a first input to receive the first synchronization signal, and a second input to receive digitized analog data from the unit under test. A processor of the frequency response analyzer correlates received digitized analog data to received analog data based on the phase, and determines a transfer function of the plant of the unit under test based on the correlation of received digitized analog data and received analog data.

Abstract: In a signal processing chain producing an analog output signal from a digital input signal, dynamic range control applies to the analog output signal a dynamic range control gain as a function of an input gain applied to the digital input signal. The dynamic range control gain is applied to the analog output signal with a delay relative to the input gain applied to the digital input signal. A first flag signal is generated for the analog output signal and a second flag signal for the digital input signal, each flag assuming first and second levels and set to the first level when the signal from which the flag is generated is within a certain amplitude range. The first and second flag signals are compared and delay of application of the dynamic range control gain to the analog output signal controlled as a function of a result of the comparison.

Abstract: The invention provides apparatuses and method for crest factor reduction.

Abstract: A circuit includes a digital-to-analog converter with non-uniform resolution for converting a digital signal into an analog signal. The digital-to-analog converter includes high-resolution circuitry, reduced-resolution circuitry coupled to the high-resolution circuitry and a switch coupled to the high-resolution circuitry and to the reduced-resolution circuitry. The switch couples one of the high-resolution circuitry and the reduced-resolution circuitry to an output node. The circuit also includes a decoder coupled to the switch. The decoder receives the digital signal to control the switch.

Abstract: A method and a corresponding device reduce the convergence time of a correlation algorithm that uses random signals injected into an analog-to-digital converter (ADC) as input to the algorithm. The method and device involve, at a processor of a pipelined ADC, injecting a random signal into each of a plurality of stages in the pipeline and obtaining digital values generated in response to the random signals. Noise components of residue signals in the plurality of stages are calculated as a function of the digital values and values of the random signals. The noise components correspond to the random signals.

Abstract: A photonic analog-to-digital signal conversion system can utilize an optical phase modulator configured to receive a first signal and a first optical pulse signal and to provide an optical phase—modulated pulse signal. A photonic processor can be configured to receive the optical phase—modulated pulse signal and the optical pulse signal and to provide an electronic first demodulated signal and an electronic second demodulated signal. A first comparator can be configured to receive the electronic first demodulated signal and provide a first compared signal, and a second comparator can be configured to receive the electronic second demodulated signal and provide a second compared signal. At least one logic circuit can be configured to receive the first compared signal and the second compared signal.

Abstract: A technique for applying crest factor reduction to a signal involves identifying peaks of an oversampled digital signal that exceed a threshold and generating a correction waveform corresponding to a sequence of correction pulses for respective peaks. The correction waveform is applied to the oversampled digital signal via a delta-sigma modulator to generate an oversampled digital output signal with reduced peaks. The delta-sigma modulator causes most of the energy of the correction waveform in the oversampled digital output signal to fall outside a frequency band of the oversampled digital signal. The oversampled digital output signal is low pass filtered to remove energy outside the frequency band of the oversampled digital signal such that noise introduced into the oversampled digital output signal by the correction waveform is reduced. The oversampled digital output signal is down sampled to produce a digital output signal with a lower sampling rate.

Abstract: A particular method includes calibrating data capture by a data register, where the data register receives a data signal from an analog-to-digital converter (ADC). The data capture may be calibrated by determining a peak value of a set of output values of the data register, where the peak value is determined in response to the ADC receiving a known input signal, and increasing a delay interval applied to registering of a value by the data register when the peak value satisfies a threshold.

Abstract: A noise reduction method is disclosed that uses numerical logic to estimate the value of the noise in a receive system and remove the noise. A surrogate probe value is selected and subtracted from an input signal and an iterative process selects a noise probe value for each iteration and the respective noise probe values are summed resulting in a noise estimate that is combined with the input signal.

Abstract: A peak visualization enhancement system for use with a non-destructive inspection (NDI) instrument using a digital display which replicates the haloing effect of analog cathode ray tube (CRT) displays. A peak detection algorithm is provided which intelligently selects the peak values from within the uncompressed digitized waveform while taking measures to prevent noise spikes and the like from being identified as valid waveform peaks. The digital display then highlights the identified peaks, or a subset of the identified peaks, on the compressed waveform display. In this way the effect of bright spots (halos) about the zero slope points on a waveform displayed on an analog CRT is replicated in a digitally compressed waveform display.

Abstract: A detecting device has: a detecting element to which a first constant voltage is applied; a resistance element connected to the detecting element; a switching element having a first terminal to the resistance element, a second terminal controlled to a second constant voltage lower than the first constant voltage, and a control terminal sets the first terminal and the second terminal in a conducting state; a control unit, according to a conducting/non-conducting state, controls voltage to the control terminal to maintain a potential difference between the detecting element and the resistance element; and an AD converter converting, into a digital value, a potential of a potential difference between the first constant voltage and the first terminal being voltage-divided at the detecting element and the resistance element to the detecting element, a first reference potential is the first constant voltage, and a second reference potential is voltage to the first terminal.

Abstract: A detecting device has: a detecting element to which a first constant voltage is applied; a resistance element connected to the detecting element; a switching element having a first terminal to the resistance element, a second terminal controlled to a second constant voltage lower than the first constant voltage, and a control terminal sets the first terminal and the second terminal in a conducting state; a control unit, according to a conducting/non-conducting state, controls voltage to the control terminal to maintain a potential difference between the detecting element and the resistance element; and an AD converter converting, into a digital value, a potential of a potential difference between the first constant voltage and the first terminal being voltage-divided at the detecting element and the resistance element to the detecting element, a first reference potential is the first constant voltage, and a second reference potential is voltage to the first terminal.

Abstract: A method and apparatus is disclosed to extend a dynamic input range of an analog to digital converter (ADC). A composite ADC may include one or more ADCs. The one or more ADCs compare a signal metric of an analog input signal to quantization levels to produce intermediate digital output signals using one or more non-clipping input values. The composite ADC may select among the one or more intermediate digital output signals based on the signal metric of the analog input signal to produce a final digital output.

Abstract: Automatic gain control in a receiver. A method for controlling operating range of an analog-to-digital converter (ADC) by an automatic gain control circuit includes estimating a peak-to-average ratio corresponding to an analog signal from digital samples of the analog signal. The method includes determining a peak value corresponding to the analog signal based on the peak-to-average ratio. Further, the method includes maintaining magnitude of the analog signal at an input of the ADC and gain of the receiver based on the peak value.

Abstract: Systems and methods for improving output resolution of an optical drive circuit in an optical sensor. The optical sensor circuit includes an optics circuit that generates analog measurement data, a detector circuit that detects the analog measurement data and converts the analog measurement data to a digital measurement data, and a signal processing circuit that demodulates the digital measurement data and generates a segmented digital signal based on the demodulated digital measurement data. The optical sensor circuit further includes an optics drive circuit that generates an analog drive signal based on the segmented digital signal. The analog drive signal is then used to drive the optical circuit.

Abstract: It is an object of the present invention to provide a signal processing device which, even when a steep difference in DC level is included in a signal read from a disc such as a DVD-RAM format, cuts off the DC level and pulls the read signal into an appropriate A/D input level with an attempt to cost reduction. A steep difference in DC level between a data section and a CAPA section is absorbed by a first offset unit 1, and an asymmetry which occurs due to variations in the disc manufacturing stage is corrected by a second offset unit 2. Further, a control signal for operating the two offset units exclusively is generated by a controller 7, thereby to control the both offset units.

Abstract: The present invention discloses a sigma-delta modulator architecture capable of automatically improving dynamic range and a method for the same. Based on the concept that different dynamic ranges of a sigma-delta modulator can be obtained via adjusting the signal power gain thereof, the present invention provides a novel algorithm to implement an automation program. The present invention finds out several sets of dynamic-range curves to improve the overall dynamic range. Via a high-level sigma-delta modulator architecture, the present invention can calculate the required feedforward coefficients. Further, the present invention install in the sigma-delta modulator architecture with four additional components, including a peak detection unit, a comparator unit, a digital coefficient control unit and a switch unit, to dynamically detect the output of the sigma-delta modulator and dynamically modify the feedforward coefficient of the sigma-delta modulator.

Abstract: An aspect of the present invention improves accuracy of output codes generated by a lower resolution ADC. In an embodiment, a gain factor is determined by examining a strength of an input signal in analog form. The gain factor equals one if the strength is more than half of the maximum voltage resolvable by the ADC and is more than one otherwise. An analog sample obtained from the input signal is converted to a digital code using the ADC, with the digital code being scaled up by the gain factor compared to an output code representing the strength of the analog sample in relation to the maximum voltage. The digital code is divided by the gain factor to generate the output code representing the strength of the analog sample in relation to the maximum voltage. The accuracy of the output code is greater for smaller amplitudes of the analog samples.

Abstract: A full-duplex RF communication system and corresponding methods use digital adaptive filters for interference cancellation. As provided, the techniques allow full-duplex radio frequency communication without frequency-, time-, or code-division multiplexing and without the use of hardware RF cancellers. Such techniques may be useful for wireless communication, such a cellular communication, radio communication, broadcasting, short-range point-to-point communication, wireless sensor networks, and wireless computer networks.

Abstract: A peak detector provides repeatable and accurate measurements of the signal amplitude for variable frequencies of input signals. The peak detector includes a pulse edge generator circuit that generates a pulse edge signal in response to the signal peaks of an input signal and a sampler circuit that is triggered to sample the input signal by the pulse edge signal. The pulse edge generator circuit compares the input signal with a delayed version of the input signal to produce a differential signal and generates the pulse edge signal using the differential signal. An analog or digital sampler is triggered by the pulsed edge signal to measure the information, e.g., peak value, of the input signal. One or more delay circuits may be used to align the edges of the pulsed edge signal with the peaks of the input signal.

Abstract: The present invention relates to a method for using the peak-to-average power ratio (PAR) of signals received by a receiver to control the gain of the receiver for an analogue-to-digital converter (ADC) and/or to control the dynamic range of the ADC.

Abstract: A selection circuit is used for detecting analogue signals from different inputs. For the detection of a signal switched through by means of the selection circuit, a delay time during the detection of the switched-through signal is set depending on the occurrence of a setting operation in the selection circuit. The selection circuit can have a plurality of switches each having an assigned delay time and the detection can be controlled in such a way that it does not take place until after the elapsing of the delay times of all the involved in switching through the analogue signal to be detected.

Abstract: An analog-digital converting apparatus includes: an analog-digital converting unit that performs a conversion from an analog input signal into a digital output signal; a buffer unit that temporary stores the digital output signal for a plurality of samples and outputs the samples in time-series; a clipping detecting unit that detects a first sample having a signal value corresponding to a clipping level of the analog-digital converting unit from among the samples of the digital output signal; and an interpolating unit that rewrites the signal value of the first sample stored in the buffer unit into an estimated signal value that is obtained by estimating a signal value at a time corresponding to a time of the first sample by an interpolation using at least one of (1) a set of second and third samples that are samples previous to the first sample and (2) a set of fourth and fifth samples that are samples subsequent to the first sample.

Abstract: A serial interface for a programmable logic device (PLD) uses an analog-to-digital converter (ADC) in place of conventional signal detect and receiver detect circuitry. A separate ADC can be used in each receiver and each transmitter in each serial interface on the PLD. Alternatively, time division multiplexing can be used to allow the receiver and transmitter in each receiver/transmitter pair, or even multiple receiver/transmitter pairs, to share a single ADC. When none of the receiver/transmitter pairs associated with a particular ADC is being used, the ADC can be accessed for use simply as an ADC.

Abstract: A system and a method are provided for receiving analog and digital audio input via a single audio input connector. The method includes receiving an input signal from a single audio input connector, splitting the received input signal into a first input signal and a second input signal, filtering the first input signal to pass a digital signal, filtering the second input signal to pass an analog signal, digitizing the filtered analog signal, and multiplexing the filtered digital signal and the filtered digitized analog signal.

Abstract: There is a problem that a delay is caused in signal processing by exercising control so as to cause amplitude peaks in a transmission signal to fall in a prescribed range. A transmission apparatus for conducting wireless communication makes a decision whether a specific pattern which causes a peak exceeding a predetermined amplitude range to be generated in frequency characteristics of a transmission signal is included in a transmission code sequence for forming the transmission signal. And the transmission apparatus selects filter coefficients which prescribe a band limiting factor for the frequency characteristics of the transmission signal, on the basis of a result of the decision, and conducts filtering on the transmission code sequence by using the selected filter coefficients.

Abstract: An A/D conversion circuit converts an asymmetric analogue signal into a digital signal. In an A/D conversion circuit of a parallel type, a central value of a reference voltage is adjusted by means of an average of an input analogue signal, such as a reproduced RF signal from an optical disk, or the like. The average value of the input analogue signal is detected by means of a low-pass filter (LPF). Respective comparators compare the input analogue signal with the reference voltage, and encodes a result of comparison by means of an encoder. An A/D conversion characteristic determined by voltage values from a maximum value Vref1 to an average value and another A/D conversion characteristic determined by voltage values from the average value to a minimum value Vref2 become nonlinear, thereby becoming able to address asymmetry of the input analogue signal.

Abstract: An electronic signal level detection system and method are provided. The method receives an analog input signal having a variable voltage and compares the input signal voltage to a threshold. A detection signal is generated for input signal voltages exceeding the threshold in a periodic first time frame. In a second periodic time frame (following the first time frame), a count is updated in response to the generated detection signals. The count is used to create a metric representative of the difference between the input signal voltage and the threshold. The count is incremented in response to the generating a detection signal (“1”) in the first time frame, and decremented in response to not generating a detection signal (“0”) in the first time frame.

Abstract: Nuclear spectroscopy systems have improved over the course of time especially with the advent of digital pulse processing. One disadvantage of digital processing, however, is that it has eliminated the older, universally compatible interface standard of analog signals. Digital component interfaces are often defined by computer software, protected by copyright and unique to a single manufacturer. Consequently, all components of an entire spectroscopy system must be from a single manufacturer. This not only dictates system wide component replacement, but also impedes optimization that would otherwise occur were component compatibility the rule rather than the exception. The present innovation describes a method and apparatus to relieve the present incompatibility between digital components of a nuclear spectroscopy system that are supplied by more than one manufacturer.

Abstract: A radio frequency digital-to-analog converter with a programmable current output. In exemplary aspects of the invention, improved apparatus and methods for providing (i) current mirror matching, (ii) enhanced current pulse rising edge performance, (ii) reduced base voltage swing, and (iv) compensated high voltage swing, are provided. The foregoing apparatus and methods can be applied to any RF signal application (wireless or otherwise), including for example wireless cellular handsets.

Abstract: A matched filter and peak detector identify peaks of a received signal. The peak detector may detect peaks during a fixed or adjustable time window. The peaks may be used as a preliminary decision (e.g., soft decision) for subsequent receiver decoding operations. The detector may be used to detect high bandwidth signals such as ultra-wide band signal pulses yet consume relatively minimal power.

Abstract: A system allows greater dynamic range in fixed-width sample representations of waveforms. Known properties of the waveform are used to determine an unlikely, or impossible, data condition to be used as an exception condition. Samples following the exception condition are assumed to be shifted by a predetermined amount so that their representation within the allowable dynamic range of the word results in an extended dynamic range. In a preferred embodiment, pre-processing of a waveform is used to create exception conditions and to shift portions of the waveform that would otherwise become clipped, so that the waveform peaks reside in a shifted position within the digital representation. Analogously, playback processing serves to detect the exception conditions and to restore the peaks of the waveform back to their original status for, e.g., audible digital-to-analog playback, high-resolution processing, etc.

Abstract: A two-dimensional all-digital ratiometric decoder to analyze signals representative of state changes in a closed loop control system. In one embodiment, the two-dimensional digital ratiometric decoder comprises at least one selector circuit, a summation circuit, a difference circuit and a divider circuit. The at least one selector circuit is adapted to select the signals to be processed by alternating between the signals representative of the X dimension and the signals representative of the Y dimension. The summation circuit is adapted to add the amplitude magnitudes of the signals selected. The difference circuit is adapted to obtain the difference between the amplitude magnitudes of the signals selected. The divider circuit is adapted to divide the output of the difference circuit by the output of the summation circuit to produce a quotient proportional to the physical change of the object being controlled.

Abstract: A circuit and method for processing digitized analog signals (“input signals”) containing noise as well as maxima and minima of input signal, whereby local peaks and valleys of the input signal are detected and captured in the presence of the noise, and whereby peak detection attributable only to noise is suppressed.

Abstract: A radio frequency digital-to-analog converter with a programmable current output. In exemplary aspects of the invention, improved apparatus and methods for providing (i) current mirror matching, (ii) enhanced current pulse rising edge performance, (ii) reduced base voltage swing, and (iv) compensated high voltage swing, are provided. The foregoing apparatus and methods can be applied to any RF signal application (wireless or otherwise), including for example wireless cellular handsets.

Abstract: An analog signal processing apparatus generates a reference voltage for a microcontroller by utilization of interrupting the microcontroller when two similar analog sinusoidal signals with a phase difference cross over, and evaluating the positive and negative crossover voltages and their average as a temporary reference voltage that is evaluated for several times to avoid errors in the two analog input signals due to noise interference or voltage drift. Finally, the evaluated temporary reference voltages are averaged and set to be the reference voltage for the microcontroller.

Abstract: A circuit, for digitizing an analogue signal includes an analogue to digital converter, a clip processor adapted to estimate a value for clipped digital signal samples, and a buffer adapted to dynamically store a plurality of digitized samples produced by the analogue to digital converter. The clip processor is adapted to read digitized samples from the buffer and replace clipped digitized samples with the estimated values, thereby mitigating the effects of clipping in an output of the circuit.

Abstract: An unusual waveform detection circuit of the present invention is a digital-type unusual waveform detection circuit that arbitrarily sets a threshold used for determining an unusual waveform and produces an unusual waveform determination signal by comparing an input signal with the threshold. In producing the unusual waveform determination signal, one of a configuration where a voltage at each of all sampling points is compared with a reference voltage and a configuration where a continuously changing gradient of signal waveform peaks is calculated and is compared with a reference gradient is selectively employed. The unusual waveform detection circuit can easily and accurately detect various unusual waveforms.

Abstract: The invention pertains to a method for converting an analogue signal representing a runlength limited binary signal with runs having a length of at least N into a binary output signal comprising the following steps: a) sampling the analogue signal, b) generating an intermediary binary signal on the basis of the sampled analogue signal, c) identifying binary sequences within the intermediary binary signal having a length greater than 2N−1, the sequences comprising a set of successive samples having the same binary value, and which set borders on samples having an opposite binary value and for each such binary sequence, d) selecting an analogue sequence in the sampled analogue input signal which corresponds to the identified binary sequence, e) searching for the existence of a plurality of significant local extrema within the selected analogue sequence, f) if such a plurality of significant local extrema is found partitioning the identified binary sequence into a corresponding plurality of smaller runs, c

Abstract: A method for decoding information contained in a waveform having a series of peaks is disclosed which is particularly directed to a method for reading a magnetic stripe for example on a card that allows the information on the stripe to be read without the need for unidirectional, single stroke swiping motion of the stripe. Features are disclosed that permit the accurate decoding of magnetic stripe data to define the bi-phase coded bits in the presence of signal degradations caused specifically, but not exclusively, by variations in the read speed including stop events and reversals. The method uses sampling of the waveform at a variable rate based upon the area of the waveform. The samples are used to locate peaks in the waveform, the profiles of which are then compared using various criteria with trained model peaks to classify the peaks into different types based upon the intersection between the different bits allowed under the bi-phase coding rules.

Abstract: A digital calibration system for an analog-to-digital converter system includes a computational system receiving digital bits from an analog-to-digital converter representing selection of elements of the digital-to-analog converter in response to an analog input. The computational engine produces a digital output representative of the analog input during conversion operation, and digital values for adjustment of an adjustable analog source during calibration. Further, a digital system comprises a radix-less-than-two non-configurable digital-to-analog converter, a comparator system connected to the converter, and a computational system configured for SAR calibration and conversion.

Abstract: A control mechanism that can be used to control a &Sgr;&Dgr; ADC to provide the required level of performance while reducing power consumption. The &Sgr;&Dgr; ADC is designed with multiple stages (i.e., loops or sections), and provides improved performance (e.g., higher dynamic range) as more stages are enabled. The control mechanism selectively enables a sufficient number of stages to provide the required performance and disables remaining stages to conserve power. The control mechanism achieves this by measuring one or more characteristics (e.g., signal level) of the ADC input signal through a &Sgr;&Dgr; ADC that is similar to the &Sgr;&Dgr; ADC on the signal path, comparing the measured characteristic(s) to particular threshold level(s), and controlling the stages such that the desired objectives are achieved. In one implementation, the control circuit includes one or more detector stages, a conditioning circuit, and a signal processor.

Abstract: A circuit (50) and method are presented for demodulating servo bursts (40-45) detected from a data medium (12). The circuit (50) includes an A/D converter to receive the detected servo bursts to convert the servo bursts (40-45) into digital data words at predefined sample times (48). A peak detector (52) determines respective peaks of the digital data words. A circuit (72, 74) weights the peaks of the digital data words with predefined weights, and a circuit (76) accumulates the weighted peaks. Circuits 88 and 90 detect the maximum and minimum weighted peak values, respectively, from the incoming data stream. A circuit (78) determines a sum of the weights applied to the digital data words. Circuits 96 and 98 store the weight values which correspond to the peak values detected by circuits 88 and 90, respectively, and a circuit (80) divides the accumulated weighted peaks by the sum of the weights.