With Error Detection Or Correction Patents (Class 341/94)
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Publication number: 20140152476Abstract: In an embodiment, a data encoding method may be provided. The data encoding method may include: inputting data to be encoded; determining a polynomial so that an evaluation of the polynomial at a sum of a first supporting point of the polynomial and a second supporting point of the polynomial corresponds to the sum of an evaluation of the polynomial at the first supporting point and an evaluation of the polynomial at the second supporting point, wherein coefficients of the polynomial are determined based on the data to be encoded; and generating a plurality of encoded data items by evaluating the polynomial at a plurality of supporting points.Type: ApplicationFiled: December 8, 2010Publication date: June 5, 2014Applicant: Nanyang Technological UniversityInventors: Frederique Oggier, Anwitaman Datta
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Patent number: 8707129Abstract: A method of feedback in a wireless transmit receive unit includes providing a precoding matrix index (PMI), error checking the (PMI) to produce an error check (EC) bit, coding the PMI and the EC bit and transmitting the coded PMI and EC bit.Type: GrantFiled: June 20, 2013Date of Patent: April 22, 2014Assignee: Interdigital Technology CorporationInventor: Kyle Jung-Lin Pan
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Patent number: 8692697Abstract: A method and apparatus for encoding based on a linear block code, and a method and apparatus for generating a linear block code are provided. The method for encoding based on a linear block code includes: generating a linear block code; and encoding an information sequence with an encoding matrix of the linear block code to obtain a bit stream sequence. The linear block codes have a good minimum distance characteristic, so that the error correction performance is improved.Type: GrantFiled: November 23, 2011Date of Patent: April 8, 2014Assignee: Huawei Technologies Co., Ltd.Inventors: Ying Xu, Shaofang Wang
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Patent number: 8633840Abstract: A determining method and apparatus thereof for a transition point of a sequence which can be applied to a decoder. The determining method determines the transition point of the sequence having N numbers, wherein the sequence is composed of a first value and a second value and N is a positive integer. The determining method includes determining the position the first value appearing consecutively in the sequence to determine a first interval; determining the position the second value appearing consecutively in the sequence to determine a second interval; and determining the longer interval between the first interval and the second interval, when the first interval is longer, determining an adjacency of the first interval and the second value as the transition point according to the first interval, and when the second interval is longer, determining an adjacency of the second interval and the first value as the transition point.Type: GrantFiled: November 16, 2010Date of Patent: January 21, 2014Assignee: MStar Semiconductor, Inc.Inventors: Po Lin Yeh, Chien-Hsing Lin, Jui-Hua Yeh, Shao Ping Hung, Chih-Tien Chang
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Patent number: 8618963Abstract: An embodiment of a bit converter includes a substitution module and an output module. The substitution module substitutes a decision result representing one of “0” and “1” for input bit information based on a substitution rule for bit information for converting a bit string of a predetermined pattern into a predetermined code word. The output module outputs the decision result of the bit information substituted by the substitution module, to a decoder configured to decode the decision result into the predetermined code word.Type: GrantFiled: March 6, 2012Date of Patent: December 31, 2013Assignee: Kabushiki Kaisha ToshibaInventor: Kenji Yoshida
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Publication number: 20130321183Abstract: Techniques are disclosed relating to coding data in an apparatus. In one embodiment, the apparatus includes a coder circuit coupled to a data bus, where the coder circuit is configured to receive an indication that data is being transmitted over the data bus from a first circuit to a second circuit. The coder circuit is configured to perform a coding operation on the data in response to receiving the indication. In some embodiments, the coder circuit is configured to operate in a mode in which the coder circuit captures data of a data transmission via the data bus without being specified as a participant of the data transmission. When the coder circuit is not operating in the mode, the coder circuit is not configured to capture data of a data transmission without being specified as a participant of the data transmission.Type: ApplicationFiled: May 31, 2012Publication date: December 5, 2013Inventor: Kenneth W. Fernald
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Patent number: 8582668Abstract: An embodiment is a method and apparatus to decode a signal using channel information. A channel state estimator generates a tone value representing channel information. A quantizer quantizes the tone value. A combiner combines de-interleaved symbols weighed by the quantized tone value. A comparator compares the combined de-interleaved symbols with a threshold to generate a decoding decision. Another embodiment is a method and apparatus to decode a signal using averaging. A channel estimator provides a channel estimate. A multiplier multiplies a quantized output of a demodulator with the channel estimate to produce N symbols of a signal corresponding to a carrier. A de-interleaver de-interleaves the N symbols. An averager averages the N de-interleaved symbols to generate a channel response at a carrier.Type: GrantFiled: October 23, 2012Date of Patent: November 12, 2013Assignee: Maxim Integrated Products, Inc.Inventors: Kaveh Razazian, Maher Umari, Amir Hosein Kamalizad
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Patent number: 8572461Abstract: A method of feedback in a wireless transmit receive unit includes providing a precoding matrix index (PMI), error checking the (PMI) to produce an error check (EC) bit, coding the PMI and the EC bit and transmitting the coded PMI and EC bit.Type: GrantFiled: April 2, 2012Date of Patent: October 29, 2013Assignee: Interdigital Technology CorporationInventor: Kyle Jung-Lin Pan
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Publication number: 20130259146Abstract: A completion-detector circuit for detecting completion of the transfer of asynchronous data on a communication channel with signal lines organized according to a delay-insensitive encoding (e.g., dual-rail, m-of-n, Berger encoding) comprises: logic circuitry for detecting the data on the aforesaid signal lines configured for: i) producing a first signal indicating the fact that the asynchronous data on the signal lines are stable; ii) producing a second signal indicating the fact that the signal lines are de-asserted; and an asynchronous finite-state machine supplied with the first signal and the second signal for producing a signal of detection of completion of transfer of the asynchronous data, the detection signal having: a first value, when the first signal is asserted; and a second value, when the second signal is asserted; and being on hold when neither one nor the other of said first signal and said second signal is asserted.Type: ApplicationFiled: April 1, 2013Publication date: October 3, 2013Applicant: STMicroelectronics S.r.l.Inventors: Daniele Mangano, Salvatore Pisasale, Carmelo Pistritto
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Patent number: 8525707Abstract: The present invention is related to systems and methods for applying two or more data decode algorithms to a processing data set.Type: GrantFiled: May 17, 2012Date of Patent: September 3, 2013Assignee: LSI CorporationInventors: Fan Zhang, Chung-Li Wang, Shaohua Yang, Haitao Xia
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Patent number: 8522119Abstract: An embodiment of a method for decoding is disclosed. For this embodiment of the method, a decoder is limited to a set number of iterations for a decoding sequence. The set number of iterations is selected to be less than an optimal number of iterations for an optimal bit error rate (“BER”) resulting in a BER penalty. Inner loop decoding operations are performed within the decoder for the set number of iterations. Reliability information is output from the decoder to a data slicer. A symbol stream is output from the data slicer responsive to the reliability information.Type: GrantFiled: December 7, 2011Date of Patent: August 27, 2013Assignee: XILINX, Inc.Inventors: Christopher H. Dick, Raghavendar M. Rao
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Patent number: 8508391Abstract: Systems, methods, and other embodiments associated with an encoder. In one embodiment, a system includes an encoder having a code word generator and an appending logic. The code word generator is configured to generate code words based on input data and identify one or more short code words. A short code word has a length less than a length of a full code word. The appending logic is configured to append at least one dummy value to at least one of the short code words to convert the at least one short code word to a full code word. The encoder may further be configured to encode the converted full code word and store the converted full code word without the at least one dummy value in a storage medium.Type: GrantFiled: January 13, 2012Date of Patent: August 13, 2013Assignee: Marvell International LtdInventors: Shu Li, Panu Chaichanavong, Jun Gao
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Patent number: 8502711Abstract: This invention relates to a coding circuit for generating a swap tolerant code. The coding circuit comprises a first and second input (540, 541), an odd parity pair detector (535), a memory (533), and an output circuit (536, 537, 551; 736, 737, 751). Each of the first and second inputs (540, 541) receive a stream of serial data. The odd parity pair detector (535) outputs an odd parity pair signal if the bits received at said first and second inputs (540, 541) have different logical values and therefore constitute an odd parity pair. The memory (533) stores information on a previous odd parity pair. The output circuit outputs the previous odd parity pair, if said first input (540) provides a logical 1 and said second input (541) provides a logical 0. The output circuit outputs the inverted previous odd parity pair, if said first input (540) provides a logical 0 and said second input (541) provides a logical 1. The invention further provides a corresponding decoding circuit, and coding and decoding methods.Type: GrantFiled: May 3, 2010Date of Patent: August 6, 2013Assignee: Cisco Technology, Inc.Inventor: Thomas Bellingrath
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Patent number: 8504847Abstract: A data element can be encoded into multiple encoded data elements using an encoding algorithm that includes an encoding function and one or more encoder constant. The encoded data elements can be organized into multiple pillars, each having a respective pillar number. Each of the pillars is sent to a different storage unit of a distributed storage network. To recover the original data element, the encoded data elements are retrieved from storage, and the encoder constant is recovered using multiple encoded data elements. Recovering the encoder constant allows the encoding algorithm originally used to encode the data elements to be determined, and used to recover the original data element. The security of the stored data is enhanced, because an encoded data element from a single pillar is insufficient to identify the encoder constant.Type: GrantFiled: April 18, 2010Date of Patent: August 6, 2013Assignee: Cleversafe, Inc.Inventors: Jason K. Resch, Wesley Leggette
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Patent number: 8497787Abstract: Systems and methods for decoding data using a hybrid decoder are provided. A data signal that includes a codeword is received. A signal quality indicator for the data signal is computed. One of a plurality of decoders is selected based on the computed signal quality indicator. Each of the plurality of decoders is configured to decode information based on a different decoding technique. The codeword included in the data signal is decoded using the selected one of the plurality of decoders.Type: GrantFiled: November 7, 2011Date of Patent: July 30, 2013Assignee: Marvell World Trade Ltd.Inventor: Xueshi Yang
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Patent number: 8472479Abstract: A data transmission apparatus for sequentially transmitting data in units of packets each containing transmission data to the receiving end. The apparatus including a reception unit receiving the transmission data as an input signal, a packet formation unit receiving the transmission data, and forming an uncompressed packet in which predetermined transmission data is stored as uncompressed data, and a compressed packet in which at least a portion of transmission data that follows the predetermined transmission data is compressed and stored as compressed data. The apparatus also including a reference information management unit holding and managing as reference information related to the uncompressed packet, and a transmission unit transmitting the packets formed by the packet formation unit. The packet formation unit forming compressed data to be stored in a compressed packet, based on the transmission data of the uncompressed packet and the reference information.Type: GrantFiled: March 13, 2012Date of Patent: June 25, 2013Assignee: Panasonic CorporationInventors: Akihiro Miyazaki, Hideaki Fukushima, Carsten Burmeister, Rolf Hakenberg
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Publication number: 20130147645Abstract: A data encoding circuit and a corresponding method is provided. The data encoding circuit includes a first data formatter in communication with an encoder section. The first data formatter is configured to receive blocks of source data in serial and output parallel two dimensional source data. The encoder receives the parallel two dimensional source data and that computes a plurality of serial row parity bits and a plurality of parallel column parity bits of an error correcting code from the parallel two dimensional source data. A second data formatter communicates with the encoder section and receives the parallel column parity bits and outputs serial column parity bits. A multiplexer section multiplexes the blocks of source data, the serial row parity bits, and the serial column parity bits into an output stream including the blocks of source data encoded by the error correcting code.Type: ApplicationFiled: December 13, 2011Publication date: June 13, 2013Applicant: BROADCOM CORPORATIONInventor: Zhongfeng Wang
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Patent number: 8462857Abstract: In a method for decoding digital information, a bit-stream signal comprising binary information is received at a digital receiver utilizing wired communication. The received bit-stream signal is sampled for each binary value at least two different sampling points within an eye pattern associated with the related binary value in order to obtain a hard-bit value for each sampling point. A single soft-bit value for each binary value based on the hard-bit values of the relevant binary value is generated and the bit value of the binary value is determined by subjecting the soft-bit values to a soft-decision algorithm.Type: GrantFiled: January 22, 2010Date of Patent: June 11, 2013Assignee: Nokia Siemens Networks GmbH & Co. KGInventor: Christoph Werner
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Publication number: 20130120169Abstract: Various embodiments of the present invention provide systems and methods for data processing. For example, a data processing system is disclosed that includes a data encoder circuit. The data encoder circuit is operable to apply an encoding algorithm to an input data set in accordance with a multi-layer code structure including a first row and a last row to yield an encoded data set. The last row of the multi-layer code structure represented in the encoded data set conforms to an identity matrix.Type: ApplicationFiled: November 14, 2011Publication date: May 16, 2013Inventors: Zongwang Li, Lei Chen, Chung-Li Wang
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Patent number: 8432304Abstract: A thermometer coded line is configured to convert a time interval to a digital code for subsequent processing in order to output a value representative of said time interval. A digital peak detector is coupled to receive output from the thermometer coded line, the detector operating for correction of an undesired code of said digital code in order to ensure a valid output of said value. A majority logic circuit is coupled between the thermometer coded line and the digital peak detector, the logic circuit operating for correction of undesired code of said digital code in order to ensure the valid output of said value. The detector functions to correct any undesired code not corrected by, or introduced by, the logic circuit.Type: GrantFiled: September 23, 2011Date of Patent: April 30, 2013Assignee: STMicroelectronics (Research & Development) LtdInventor: Neale Dutton
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Patent number: 8400338Abstract: Automatic test equipment (ATE) includes circuitry configured to pass a signal in a channel of the ATE, and memory configured to store a first and second correction values. A first correction value is based on a first version of the signal, where the first correction value is for use in correcting static non-linearity associated with the channel. A second correction value is based on a second version of the signal, where the second correction value is for use in correcting dynamic non-linearity associated with the channel. Digital signal processing logic is configured to use the first correction value, the second correction value, and the signal in order to compensate for harmonic distortion from the channel.Type: GrantFiled: March 16, 2011Date of Patent: March 19, 2013Assignee: Teradyne, Inc.Inventor: David O'Brien
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Publication number: 20120274487Abstract: According to one embodiment, an apparatus for encoding and decoding includes an encoder configured to generate integrated parity data for data obtained by combining first data with second data. The encoder includes a first generator, a second generator, and a third generator. The first generator generates parity data for the first data using a first check matrix with a predetermined regularity. The second generator generates parity data for the second data using a second check matrix with a regularity that is exclusive and different from the first check matrix. The third generator generates the integrated parity data by integrating the parity data generated by the first generator with the parity data generated by the second generator.Type: ApplicationFiled: January 17, 2012Publication date: November 1, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventor: Yosuke Kondo
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Publication number: 20120249346Abstract: A method for wireless communication is disclosed that includes selecting a plurality of probabilities for a symbol based on a bit-to-symbol mapping; calculating a conditional mean of the symbol based on the plurality of probabilities; and, generating a signal representative of the symbol based on the conditional mean of the symbol. An apparatus for performing the method is also disclosed.Type: ApplicationFiled: June 11, 2012Publication date: October 4, 2012Applicant: QUALCOMM IncorporatedInventors: Atul A. Salvekar, Young Geun Cho, Jia Tang, Shantanu Khare, Ming-Chieh Kuo, Iwen Yao
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Publication number: 20120119928Abstract: Systems and methods for decoding data using a hybrid decoder are provided. A data signal that includes a codeword is received. A signal quality indicator for the data signal is computed. One of a plurality of decoders is selected based on the computed signal quality indicator. Each of the plurality of decoders is configured to decode information based on a different decoding technique. The codeword included in the data signal is decoded using the selected one of the plurality of decoders.Type: ApplicationFiled: November 7, 2011Publication date: May 17, 2012Inventor: Xueshi Yang
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Patent number: 8171372Abstract: A method of feedback in a wireless transmit receive unit includes providing a precoding matrix index (PMI), error checking the (PMI) to produce an error check (EC) bit, coding the PMI and the EC bit and transmitting the coded PMI and EC bit.Type: GrantFiled: April 30, 2008Date of Patent: May 1, 2012Assignee: InterDigital Technology CorporationInventor: Kyle Jung-Lin Pan
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Patent number: 8160107Abstract: A data transmission apparatus for sequentially transmitting data in units of packets each containing transmission data to the receiving end. The apparatus including a reception unit receiving the transmission data as an input signal, a packet formation unit receiving the transmission data, and forming an uncompressed packet in which predetermined transmission data is stored as uncompressed data, and a compressed packet in which at least a portion of transmission data that follows the predetermined transmission data is compressed and stored as compressed data. The apparatus also including a reference information management unit holding and managing as reference information related to the uncompressed packet, and a transmission unit transmitting the packets formed by the packet formation unit. The packet formation unit forming compressed data to be stored in a compressed packet, based on the transmission data of the uncompressed packet and the reference information.Type: GrantFiled: September 8, 2008Date of Patent: April 17, 2012Assignee: Panasonic CorporationInventors: Akihiro Miyazaki, Hideaki Fukushima, Carsten Burmeister, Rolf Hakenberg
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Patent number: 8144812Abstract: A communications node can receive a plurality of communication signals, each including a block of data estimates with respective quality metrics. Each block of data estimates can be derived from an original block of data sent over different wireless paths, or from a derived block of data estimates sent over a different wireless path. A data combining circuit can be used to combines the blocks of data estimates as a function of the respective quality metrics to produce an output set of data estimates with a derived quality metric.Type: GrantFiled: February 8, 2008Date of Patent: March 27, 2012Assignee: QUALCOMM IncorporatedInventor: Dilip Krishnaswamy
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Patent number: 8135234Abstract: There are provided methods and apparatus for edge-based spatio-temporal filtering. An apparatus for filtering a sequence of pictures includes a spatial filter, a motion compensator, a deblocking filter, and a temporal filter. The spatial filter is for spatially filtering a picture in the sequence and at least one reference picture selected from among previous pictures and subsequent pictures in the sequence with respect to the picture. The motion compensator, in signal communication with the spatial filter, is for forming, subsequent to spatial filtering, multiple temporal predictions for the picture from the at least one reference picture. The deblocking filter, in signal communication with the motion compensator, is for deblock filtering the multiple temporal predictions. The temporal filter, in signal communication with the deblocking filter, is for temporally filtering the multiple temporal predictions and combining the multiple temporal predictions to generate a noise reduced version of the picture.Type: GrantFiled: January 30, 2007Date of Patent: March 13, 2012Assignee: Thomson LicensingInventors: Alexandros Tourapis, Jill MacDonald Boyce
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Publication number: 20120056764Abstract: A system and method for preserving neighborhoods in codes are provided. A method for transmitting information includes receiving an information string to transmit, generating a first address and a second address from the information string, encoding the first address and the second address with a layered code encoder, thereby producing a codeword and transmitting the codeword. The generating is based on a linear block code.Type: ApplicationFiled: September 3, 2010Publication date: March 8, 2012Applicant: FutureWei Technologies, Inc.Inventors: Lizhong Zheng, Yufei Blankenship
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Publication number: 20120044098Abstract: This invention relates to a coding circuit for generating a swap tolerant code. The coding circuit comprises a first and second input (540, 541), an odd parity pair detector (535), a memory (533), and an output circuit (536, 537, 551; 736, 737, 751). Each of the first and second inputs (540, 541) receive a stream of serial data. The odd parity pair detector (535) outputs an odd parity pair signal if the bits received at said first and second inputs (540, 541) have different logical values and therefore constitute an odd parity pair. The memory (533) stores information on a previous odd parity pair. The output circuit outputs the previous odd parity pair, if said first input (540) provides a logical 1 and said second input (541) provides a logical 0. The output circuit outputs the inverted previous odd parity pair, if said first input (540) provides a logical 0 and said second input (541) provides a logical 1. The invention further provides a corresponding decoding circuit, and coding and decoding methods.Type: ApplicationFiled: May 3, 2010Publication date: February 23, 2012Applicant: CISCO TECHNOLOGY, INC.Inventor: Thomas Bellingrath
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Publication number: 20120026022Abstract: A method of searching for candidate codewords for a telecommunications system, the method comprising receiving a sequence of constellation points, producing a received FEC vector comprised of bits from the received constellation points, comparing the received FEC vector with a plurality of candidate codewords within a Dorsch decoding process using an ordered pattern, and terminating the search when a candidate codeword from among the plurality of candidate codewords is found residing within a predetermined range of a specified distance of the received FEC vector.Type: ApplicationFiled: October 7, 2011Publication date: February 2, 2012Applicant: Comtech EF Data Corp.Inventors: Brian A. Banister, Patrick Owsley, Sean M. Collison
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Publication number: 20120008666Abstract: A scheme of enhanced block coding based on small size block code is provided. Such is achieved by obtaining extended basis sequences for a (32, O) code with O=1, 2, . . . 12; selecting an offset starting value that produces maximum error correction capability in each O value; and generating basis sequences for a (48, O) code based on the obtained extended basis sequences for the (32, O) code with the offset starting value selected based on the selecting step. The offset starting value could be selected as 18, which results in the largest sum of distances.Type: ApplicationFiled: May 9, 2011Publication date: January 12, 2012Applicant: LG ELECTRONICS INC.Inventors: Dongwook ROH, Joonkui AHN, Mingyu KIM, Daewon LEE, Suckchel YANG, Kijun KIM, Dongyoun SEO
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Publication number: 20120001778Abstract: A system and method for decoding multi-dimensional encoded data. A set of multi-dimensional encoded data may be received encoding each input bit in a set of input bits by multiple different component codes in multiple different encoding dimensions. The multi-dimensional data may potentially have errors. A map may be used to locate each set of intersection bits that encode the same input bit by multiple unsolved component codes. The unsolved component codes may be decoded using one or a plurality of tested error correction hypotheses that yields a decoding success, where each hypothesis correcting a different set of intersection bits for a different input bit. The successful hypothesis may be applied for correcting the multi-dimensional encoded data.Type: ApplicationFiled: June 28, 2011Publication date: January 5, 2012Inventors: Avi STEINER, Erez SABBAG, Avigdor SEGAL, Ilan BAR, Eli STERIN
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Publication number: 20110309958Abstract: Methods and apparatuses for encoding and decoding data. The method for encoding data includes: receiving data; determining one quantizer from among a plurality of quantizers having a same quantization step size and different offset values; and transmitting an indicator and a quantized coefficient related to the determined quantizer. The method for decoding data includes: receiving an indicator and a quantized coefficient related to a quantizer; determining one de-quantizer from among a plurality of de-quantizers by using the indicator; and acquiring reconstructed data by de-quantizing the quantized coefficient by using the determined de-quantizer.Type: ApplicationFiled: May 4, 2011Publication date: December 22, 2011Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Ki-won YOO, Chang-su HAN, Yong-hoon YU
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Patent number: 8060810Abstract: A margin decoding communications system includes a circuit receiving a message encoded by an iterative code and processing the message into scores. A normalization process module receives the scores and iteratively approximates log-map normalization factors of the scores to generate approximation normalization factors. An element receives the message and the approximation normalization factors and decodes the received message based on the approximation normalization factors.Type: GrantFiled: April 6, 2007Date of Patent: November 15, 2011Assignee: Board of Trustees of Michigan State UniversityInventor: Shantanu Chakrabartty
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Patent number: 8049648Abstract: A high-rate constrained code is provided to encode/decode channel data. A transformer translates binary channel data into an arbitrary alphabet size. The transformer selects an indicator word and makes forbidden prefix substitutions in the data to be transformed. A finite-state encoder imposes some user-defined constraint on the transformed data before the data is transferred to the channel. The high-rate constrained coding technique may be used to produce high-rate DC-limited and run-length-limited codes. The high-rate code can be used in tandem with error-correcting codes.Type: GrantFiled: May 3, 2010Date of Patent: November 1, 2011Assignee: Marvell International Ltd.Inventor: Panu Chaichanavong
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Patent number: 8045635Abstract: An inter-symbol interference cancellation method for an orthogonal frequency division multiple access system is provided. The inter-symbol interference cancellation method includes transmitting, at a base station, an OFDMA symbol having a first half part and a second half part divided in time; receiving, at a mobile station, the OFDMA symbol; and restoring the OFDMA symbol by repeating one of the first half part or the second half part. The ISI cancellation method for an OFDMA communication system of the present invention uses an OFDMA symbol having two identical parts sequentially arranged in time, whereby it is possible to recover a transmitted OFDMA symbol if at least one of the two parts is successfully received.Type: GrantFiled: August 23, 2007Date of Patent: October 25, 2011Assignee: Samsung Electronics Co., LtdInventors: Seong Yun Ko, Seong Kyu Song, Myeon Kee Youn
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Patent number: 8044787Abstract: A set of inputs each selectively provides a discrete signal, whereby the sensor inputs together provide a plurality of discrete signals. A memory includes instructions executable by a processor for receiving the discrete signals, identifying a bit pattern from the discrete signals, and determining a position of a physical member according to the bit pattern and an error condition detected from the discrete signals.Type: GrantFiled: October 7, 2008Date of Patent: October 25, 2011Assignee: Eaton CorporationInventors: Kerfegar Khurshed Katrak, Todd William Fritz, Richard Earl Zuppann
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Publication number: 20110254714Abstract: A method for wireless communication is disclosed that includes selecting a plurality of probabilities for a symbol based on a bit-to-symbol mapping; calculating a conditional mean of the symbol based on the plurality of probabilities; and, generating a signal representative of the symbol based on the conditional mean of the symbol. An apparatus for performing the method is also disclosed.Type: ApplicationFiled: April 20, 2010Publication date: October 20, 2011Applicant: QUALCOMM IncorporatedInventors: Atul A. Salvekar, Young Geun Cho, Jia Tang, Shantanu Khare, Ming-Chieh Kuo, Iwen Yao
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Patent number: 8022854Abstract: Examples of systems and methods are provided for generating an output signal having an output code having less number of bits compared to an input signal having a thermometer code representation. The system may partition the input code bits into non-overlapping clusters. The system may generate a control signal for each of the clusters based on, at least in part, a logical OR operation over all bits in a corresponding one of the clusters. The system may determine a transition cluster comprising a 1/0 transition in the input code bits. The system may determine output code bits based on, at least in part, an input code bit pattern in the transition cluster and an identity of the transition cluster.Type: GrantFiled: August 31, 2009Date of Patent: September 20, 2011Assignee: Semtech CorporationInventors: Kevin William Glass, C. Gary Nilsson, Leo Ghazikhanian, Michael Terry Nilsson
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Patent number: 7986252Abstract: A bit stream is received and each bit corresponding to the bit stream is over-sampled to generate a first set of data samples. Each data sample from the first set of data samples is compared with a corresponding immediate previous data sample to generate a second set of data samples. The second set of data samples is compared with bit masks, and accordingly, some of the data samples in the first set of data samples are identified for replacement. Further, a substitute data sample is selected from the first set of data samples based on a predefined criterion and some of the data samples in the first set of data samples are replaced with the substitute data sample.Type: GrantFiled: January 17, 2010Date of Patent: July 26, 2011Assignee: Freescale Semiconductor, Inc.Inventors: Asif Iqbal, Girraj K. Agrawal, Ankit Pal
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Publication number: 20110175758Abstract: A bit stream is received and each bit corresponding to the bit stream is over-sampled to generate a first set of data samples. Each data sample from the first set of data samples is compared with a corresponding immediate previous data sample to generate a second set of data samples. The second set of data samples is compared with bit masks, and accordingly, some of the data samples in the first set of data samples are identified for replacement. Further, a substitute data sample is selected from the first set of data samples based on a predefined criterion and some of the data samples in the first set of data samples are replaced with the substitute data sample.Type: ApplicationFiled: January 17, 2010Publication date: July 21, 2011Applicant: FREESCALE SEMICONDUCTOR, INCInventors: Asif Iqbal, Girraj K. Agrawal, Ankit Pal
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Patent number: 7978100Abstract: Systems, apparatuses, and methods for encoding and decoding using generalized concatenated codes (GCC) are described. The methods include receiving data; encoding the received data to obtain first encoded data; encoding the first encoded data until a GCC encoding reaches an intermediate level; and terminating the GCC encoding at the intermediate level.Type: GrantFiled: August 23, 2010Date of Patent: July 12, 2011Assignee: Marvell World Trade Ltd.Inventors: Xueshi Yang, Gregory Burd, Heng Tang, Panu Chaichanavong, Zining Wu
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Patent number: 7974162Abstract: A digital data demodulator which can reduce a loss of decodable digital data, and increase capability of reproducing digital data inputted through a transmission line even when an error occurs in the transmission line. In the digital data demodulator, a specific pattern detector (113) detects a specific pattern to be included in a modulation code, from a bit string inputted through a transmission line (104). A modulation code identifying unit (117) generates a demodulation data strobe signal (119) according to a phase of the modulation code including the specific pattern. An error corrector (121) samples demodulation data (109) in response to the demodulation data strobe signal (119) and reproduces the data to the original digital data.Type: GrantFiled: June 18, 2008Date of Patent: July 5, 2011Assignee: Panasonic CorporationInventors: Makoto Okazaki, Yasushi Ueda
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Patent number: 7956772Abstract: A method of encoding data for transmission from a source to a destination over a communications channel is provided. A plurality of encoded symbols are generated from a set of input symbols including source symbols and redundant symbols, wherein the input symbols are organized such that at least one of the input symbols is not used for a first encoding process, so that it is permanently inactivated for the purposes of scheduling a decoding process. A method of decoding data is also provided, wherein encoded symbols generated from a set of input symbols are used to recover source symbols, wherein the input symbols are organized such that at least one of the input symbols is not used for a first decoding process, so that it is permanently inactivated for the purpose of scheduling the decoding process.Type: GrantFiled: October 23, 2009Date of Patent: June 7, 2011Assignee: QUALCOMM IncorporatedInventors: Mohammad Amin Shokrollahi, Michael Luby
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Publication number: 20110115655Abstract: Disclosed herein is a coding method including the step of: coding an information sequence in such a manner that upon performing error correction coding after carrying out RLL coding of the information sequence, the maximum number of consecutive 1-bits or 0-bits is ??? or less in an RLL code word over a range from bit p?? to bit p+??1 of the RLL code word and that a ?-bit error correcting code parity sequence is inserted between bit p?1 and bit p of the RLL code word, where ? is a number larger than 1 representing the maximum number of consecutive 0-bits or 1-bits in an n-bit RLL code word and where p is a natural number.Type: ApplicationFiled: October 12, 2010Publication date: May 19, 2011Applicant: SONY CORPORATIONInventor: Makoto NODA
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Patent number: 7908140Abstract: The invention concerns a method and apparatus for performing packet loss or Frame Erasure Concealment (FEC) for a speech coder that does not have a built-in or standard FEC process. A receiver with a decoder receives encoded frames of compressed speech information transmitted from an encoder. A lost frame detector at the receiver determines if an encoded frame has been lost or corrupted in transmission, or erased. If the encoded frame is not erased, the encoded frame is decoded by a decoder and a temporary memory is updated with the decoder's output. A predetermined delay period is applied and the audio frame is then output. If the lost frame detector determines that the encoded frame is erased, a FEC module applies a frame concealment process to the signal. The FEC processing produces natural sounding synthetic speech for the erased frames.Type: GrantFiled: February 20, 2009Date of Patent: March 15, 2011Assignee: AT&T Intellectual Property II, L.P.Inventor: David A. Kapilow
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Publication number: 20110050468Abstract: Examples of systems and methods are provided for generating an output signal having an output code having less number of bits compared to an input signal having a thermometer code representation. The system may partition the input code bits into non-overlapping clusters. The system may generate a control signal for each of the clusters based on, at least in part, a logical OR operation over all bits in a corresponding one of the clusters. The system may determine a transition cluster comprising a 1/0 transition in the input code bits. The system may determine output code bits based on, at least in part, an input code bit pattern in the transition cluster and an identity of the transition cluster.Type: ApplicationFiled: August 31, 2009Publication date: March 3, 2011Applicant: SIERRA MONOLIGHTICS, INC.Inventors: Kevin William Glass, C. Gary Nilsson, Leo Ghazikhanian, Michael Terry Nilsson
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Publication number: 20110043390Abstract: Systems, apparatuses, and methods for encoding and decoding using generalized concatenated codes (GCC) are described. The methods include receiving data; encoding the received data to obtain first encoded data; encoding the first encoded data until a GCC encoding reaches an intermediate level; and terminating the GCC encoding at the intermediate level.Type: ApplicationFiled: August 23, 2010Publication date: February 24, 2011Inventors: Xueshi Yang, Gregory Burd, Heng Tang, Panu Chaichanavong, Zining Wu
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Patent number: 7876243Abstract: A transmission device configured to transmit a transmission bit string which is an arrangement of a unit bit string of multiple N bits includes: a conversion unit configured to convert the unit bit string into a converted bit string in accordance with a conversion table obtained by obtaining an error rate wherein a k'th bit out of the N bits is in error; obtaining an error expectancy which is an expectancy that a significant bit of the N bits in the unit bit string will err; and creating a conversion table that correlates the unit bit string and a converted bit string obtained by converting the insignificant bit of the unit bit string to a smallest error expectancy bit pattern which is a bit pattern that minimizes the error expectancy of the multiple bit patterns; and a transmission unit configured to transmit the converted bit string.Type: GrantFiled: December 9, 2008Date of Patent: January 25, 2011Assignee: Sony CorporationInventors: Shunsuke Mochizuki, Masato Kikuchi, Masahiro Yoshioka, Ryosuke Araki, Masaki Handa, Takashi Nakanishi, Hiroshi Ichiki, Tetsujiro Kondo