Abstract: A system and method of generating white light for a projection system in a compact form factor using laser diodes, a reflection system, and a phosphor target. Light emitted from the laser diodes can be directed towards a region of the phosphor target, where the phosphor target is excited and emits light in a desired spectrum in all directions. Some emitted light is collected by a collection lens. The emitted light collected by the collection lens can be combined with light from the original laser diodes to create white light for use in the projection system. Light emitted in a direction away from the collection lens can be redirected to the collection lens by the reflection system that employs a curved reflector on one side of the phosphor target and a flat reflector on the opposite side of the phosphor target.

Abstract: A display method of a display panel, a display device, and a server are disclosed. The display method divides an initial image into a plurality of sub-frame images having a same frequency, and the frequency of the sub-frame images is a multiple of a frequency of the initial image. The sub-frame images are input into the display panel in sequence and are combined to obtain a target image. The target image is used to drive the display panel to display the initial image, thereby reducing a refresh rate of the display panel for inputting data. Therefore, the display panel can realize low frequency input and prevent frame loss.

Abstract: Provided is a display device.

Abstract: A display substrate and a display device are provided. The display substrate includes a plurality of driving circuits, wherein each of the driving circuits includes: a first sub-circuit, respectively coupled to a gate signal terminal, a data signal terminal and a light-emitting power source terminal, and configured to store a drive voltage based on a voltage at the data signal terminal when the gate signal terminal receives a gate drive signal, and output a drive current to a light-emitting device based on the stored drive voltage under power supply provided by the light-emitting power source terminal; and a second sub-circuit, configured to regulate an equivalent resistance value of the second sub-circuit in an output path through which the drive current is output to the light-emitting device, based on a voltage division control signal received by the voltage division control signal terminal.

Abstract: A display device includes: a pixel component including pixels; a timing controller configured to calculate a load variation between previous input grayscale values corresponding to a previous frame and current input grayscale values corresponding to a current frame; a current sensor configured to sense a current flowing through the pixels during the current frame and generate a global current value for the sensed current, store time points at which the global current value becomes equal to preset threshold current values, respectively, and generate a global current variation rate corresponding to a section between the stored time points of the current frame; and a scale factor provider configured to control a scale factor in a period of the current frame in the case where the load variation is equal to or more than a reference load variation.

Abstract: A display device includes a display panel, a data driver, a scan driver, and a driving controller. The display panel includes a first display area and a second display area, which operate at different frequencies from each other in a multi-frequency mode. The driving controller controls the data driver and the scan driver. The driving controller generates boundary compensation data by compensating for boundary image signals, which are input to correspond to a boundary area of the first display area in the multi-frequency mode and drives the data driver based on a compensation image signal including the boundary compensation data.

Abstract: Methods and systems to improve a visual perception of dark scenes in video. An example device includes one or more processors to receive a frame of video segmented into a plurality of sub-regions. A local luminance histogram is generated for each sub-region. A global luminance histogram is generated for the entire frame of video and a global tone mapping curve is generated based on the global luminance histogram. A tone mapping LUT is generated for each sub-region based on the global tone mapping curve and the corresponding local luminance histogram for the sub-region. The frame of video is then modified using the tone mapping LUTs generated for each sub-region and sent to an output device.

Abstract: Provided are a virtual reality display device, a host device, a system and a data processing method. The virtual reality display device includes a display panel and a drive chip, wherein the drive chip includes a first processing module and a drive module; the first processing module is configured to decode an image to be decoded with a third color depth sent by a second processing module in a virtual reality host device to obtain a first image with a first color depth and a second image with a second color depth, the third color depth is greater than or equal to the first color depth, and the second color depth is less than the first color depth; the drive module is configured to generate a first data voltage corresponding to the first image and a second data voltage corresponding to the second image.

Abstract: The present disclosure provides a display panel and a display device. The display panel includes source driver chips. The source driver chips include charging compensation modules, and each of the charging compensation modules includes: a plurality of shift registers cascadely connected and configured to time-divisionally output a plurality of pulse signals, and a plurality of level shift circuits time-divisionally conducted in response to the plurality of the pulse signals to prevent the plurality of the level shift circuits in the source driver chips from outputting and generating a plurality electron currents at a same time, which would result in a superposition of current peaks and cause electromagnetic interference problems.

Abstract: A screen is manipulated to display content whose reflection is not captured by a sensor. In an embodiment, the screen inserts a black frame between screen content frames, displaying the black frame during a particular time. A sensor captures a video frame during the particular time. The video frame does not include a screen reflection and is considered a clean frame. In another embodiment, the screen displays screen content with a particular polarization during a particular time. A sensor captures a video frame with another polarization during the same time. The polarizations are selected such that the sensor is unable to capture screen reflections. The video frame is considered a clean frame. The clean frame is used to generate a masking frame, which is applied to target video frames to remove screen reflection. A modified target video, including the reflection-removed target video frame, and/or the clean frame itself, is generated.

Abstract: A system for facilitating a cardiac rhythm disorder diagnosis is provided. A download station is adapted to retrieve cutaneous action potentials of a patient recorded as ECG data. A plot of R-R interval data is generated based on the ECG data and displayed. A presentation of the R-R interval data in the display is changed by identifying a section of the R-R interval data and removing portions of the R-R interval data associated with an earlier recordation time than the R-R interval data in the section and a later recordation time than the R-R interval data in the section. The R-R interval data remaining in the display is provided in greater detail. Report strips are generated from the remaining R-R interval data and classified with a cardiac condition of the patient.

Abstract: In a liquid crystal device, a first pixel area is provided in a pixel area of a first substrate, and a second pixel area is provided between the first pixel area and a seal material. The first pixel area has a first pixel electrode to which an image signal is applied, the image signal having a potential alternately switching between a positive polarity and a negative polarity with reference to a first central potential. The second pixel area includes a second pixel electrode to which a first driving potential is applied, the first driving potential having a potential alternately switching between a positive polarity and a negative polarity with reference to a second central potential, the first central potential and the second central potential having a potential difference set therebetween. Therefore, ionic impurities can be efficiently swept from the first pixel area to the second pixel area.

Abstract: Provided are a display panel and a display device. The display panel includes rows of pixels and a gate driver circuit; where a pixel among the plurality of rows of pixels includes a pixel circuit and the pixel circuit includes a light emission control terminal and a first scan drive terminal; the gate driver circuit includes stages of light emission drive devices, where each of the plurality of stages of light emission drive devices is disposed in correspondence to at least one row of pixel circuits and configured to provide a light emission control signal to the light emission control terminal of the pixel circuit; and the gate driver circuit further includes at least one stage of first scan drive device, where an input terminal of the first scan drive device is connected to an output terminal of the light emission drive device.

Abstract: A hybrid gate driver circuit includes a field effect transistor (FET) drive terminal, a switching node terminal, a transistor, and a capacitor. The transistor includes a first terminal coupled to the FET drive terminal, and a second terminal coupled to ground. The capacitor includes a first terminal coupled to the switching node terminal, and a second terminal coupled to a third terminal of the transistor.

Abstract: A method for driving electro-optic displays so as to reduce visible artifacts are described. Such methods include driving extra pixels where the boundary between a driven and undriven area would otherwise lead to artifact by providing paired sets of driving instructions, allowing the undriven area to be driven while maintain the desired (undriven) optical state.

Abstract: The present disclosure relates to a display panel. The display panel may include a first substrate, a second substrate opposite the first substrate, and a frame supporting structure between the first substrate and the second substrate in a frame area of the display panel. The frame area of the display panel may surround a display area of the display panel. The frame supporting structure may include a first frame supporting portion on at least one part of a circumference of the display area, the first frame supporting portion comprises an elastic material, and an elastic recovery rate of the elastic material is above about 80%.

Abstract: A correlated double sampling (CDS) circuit, an operating method thereof, and an image sensor including the CDS circuit are disclosed. The CDS circuit includes a first comparator configured to operate based on a first bias current, and compare, with a ramp signal, a pixel voltage that is output from a pixel, during a first period and a fourth period during which the pixel operates in a low conversion gain (LCG) mode, a second comparator configured to operate based on a second bias current, and compare, with the ramp signal, the pixel voltage output from the pixel, during a second period and a third period during which the pixel operates in a high conversion gain (HCG) mode, the second period being after the first period, the third period being after the second period, and the fourth period being after the third period.

Abstract: Provided is a display panel including n pixel sets. Each pixel set includes 2m pixel rows arranged along a first direction, where n and m are positive integers. Each pixel row includes pixel circuits arranged along a second direction, and the second direction intersects with the first direction. Each pixel circuit includes: a driving transistor; a first reset module configured to transmit, in response to a first scan signal provided by a first scan signal line, a first reset signal provided by a first reset signal line to a gate electrode of the driving transistor, the first reset signal including alternating high and low levels; and a second reset module configured to transmit, in response to a second scan signal provided by a second scan signal line, a second reset signal provided by a second reset signal line to an anode of an organic light-emitting element.

Abstract: A display control system and a display device. The display control system (1) comprises a control unit for controlling a light source (2) to be in a bright field and a dark field alternately in the same frame of data, and controlling the status switching of a light valve of a spatial light modulator (3) to be within the time of the dark field of the light source. The display device comprises the display control system (1). The control unit controls the bright field and the dark field of the light source, so that the light valve of the spatial light modulator (3) has a relatively long switching time, thereby increasing the switching speed of the light valve, reducing the difficulty for manufacturing the spatial light modulator (3), and improving the accuracy for the spatial light modulator (3) to modulate the light source.

Abstract: A display apparatus comprises a display panel including a pixel area in which a plurality of pixels is disposed and a peripheral area outside the pixel area; a transmissive light source disposed in a first area of the pixel area; and a timing controller which controls the transmissive light source not to emit light when pixels disposed corresponding to the first area of the pixel area among the plurality of pixels are present in at least one of an image data input period and a pixel light emission period.

Abstract: A display device includes a display panel including a plurality of pixels, a display panel driver, and a zone compensating circuit which divides the display panel into a plurality of unit blocks, obtains load values of input image data for the unit blocks, and generates corrected image data by correcting the input image data based on the load values. Each of the load values corresponds to one of the unit blocks. The display panel driver generates a data signal for displaying an image on the display panel based on the corrected image data. When grayscale values included in the input image data are the same, a luminance of the image displayed on the display panel is decreased moving away from a center of a reference block having a largest load value among the unit blocks based on the corrected image data.

Abstract: A pixel circuit and a driving method thereof, and a display device, the pixel circuit being configured to drive a light-emitting element and including: a node control sub-circuit, which is configured to provide a first node with a signal of a data signal end and provide a second node with a signal of a control signal end under the control of a first scanning end; a driving sub-circuit, which is configured to provide the second node with a driving current under the control of the first node and the second node; a storage sub-circuit, which is configured to store electric charge between the first node and the second node; a reading sub-circuit, and the light-emitting element, which is electrically connected to the second node and a second power supply end, respectively.

Abstract: The present disclosure provides a shift register unit, a driving method thereof, and a gate driving circuit. The shift register unit includes: an input circuit configured to receive an input signal from an input signal terminal and output the input signal to a voltage stabilizer node; a voltage-stabilizing circuit configured to input potential of the voltage stabilizer node to a pull-up node and control potential of the voltage stabilizer node under control of potential of the pull-up node; an output circuit configured to receive a clock signal from a clock signal terminal and provide an output signal to an output signal terminal based on the clock signal received under control of the potential of the pull-up node; and a control circuit configured to control potential of the output signal terminal under control of the potential of the pull-up node.

Abstract: A gate driver is constituted of a first gate driver including a first shift register that is configured by bistable circuits corresponding to gate bus lines on odd-numbered lines arranged on one side of a display portion, and a second gate driver including a second shift register that is configured by bistable circuits corresponding to gate bus lines on even-numbered lines arranged on another side of the display portion. A first buffer circuit is provided on one end side of each gate bus line, and a second buffer circuit is provided on another end side of each gate bus line. A control signal for controlling the scanning order of the gate bus line is given to the bistable circuit and the second buffer circuit.

Abstract: The present disclosure provides a gate driver on array (GOA) circuit driving system and a display panel. The GOA circuit driving system includes a power chip including a plurality of output pins, a plurality of filter units respectively corresponding to the plurality of output pins, and a GOA circuit including a plurality of signal input terminals respectively corresponding to the plurality of output pins, wherein each of the plurality of output pins is electrically connected to the corresponding signal input terminal through the corresponding filter unit, and each of the plurality of filter units is configured to filter an electrostatic voltage transmitted from the corresponding signal input terminal to the corresponding output pin, therefore solving a problem that the power chip cannot work normally due to a release of static electricity from the GOA circuit to the power chip during an ESD test.

Abstract: A GOA circuit is provided according to implementations of the disclosure. The GOA circuit includes multiple cascaded GOA units. Each GOA unit includes a first pull-down control module, a second pull-down control module, and a pull-down holding module. A type of at least one thin film transistor (TFT) in at least one of the first pull-down control module or the second pull-down control module is different from that of a TFT in the pull-down holding module. A display panel and an electronic device are further provided according to implementations of the disclosure.

Abstract: The present disclosure provides a display substrate, a method for preparing the same, and a display device. The method for preparing the display substrate includes a step of preparing a pixel driving circuit on a substrate, the step specifically includes: preparing a first active layer of an oxide transistor on the substrate; preparing a barrier layer on a surface of the first active layer away from the substrate, an orthogonal projection of the barrier layer on the substrate covering an orthogonal projection of the first active layer on the substrate; preparing a low-temperature polysilicon transistor is on the substrate; and preparing a first gate insulating layer, a first gate electrode, a first input electrode, and a first output electrode of the oxide transistor on the substrate.

Abstract: The present disclosure relates to a driving method of a head mounted display apparatus. The driving method may include: acquiring posture information of a head mounted display apparatus in real time using a posture detector; acquiring data of a first image, determining first posture information corresponding to the first image and second posture information corresponding to a second image based on the posture information provided by the posture detector, and determining data of the second image based on the data of the first image, the first posture information and the second posture information, wherein the data of the first image is provided by a main processor, and the second image is an interpolated frame image obtained by rendering the first image; and displaying the first image and the second image sequentially using a display device.

Abstract: A display device including a display unit which has a plurality of pixels and a plurality of driving lines for driving the plurality of pixels; a driving circuit which drives the plurality of pixels through the plurality of driving lines; and a control unit which adjusts a driving capability of the driving circuit according to the number of simultaneous driving lines of the driving circuit.

Abstract: A method of driving a display panel includes dividing an input image into a plurality of segments, generating a flicker value of a segment of the plurality of segments, determining whether to compensate the flicker value of the segment or not according to a segment size, compensating the flicker value of the segment based on the segment size, determining a frame rate of the display panel based on the flicker value of the segment and outputting a data voltage to the display panel in the frame rate. The flicker value of the segment is compensated based on the flicker value of the segment and flicker values of segments that are adjacent to the segment.

Abstract: A test and measurement instrument, comprising a display and one or more processors configured to display a waveform viewing area, receive a selection of a viewing mode. When an overlay viewing mode is selected, display two or more waveforms overlaid in a single graticule in the waveform viewing area, and when a stacked viewing mode is selected, display a first waveform in a first slice having a first graticule in the waveform viewing area and display a second waveform in a second slice having a second graticule below the first slice in the waveform viewing area.

Abstract: A display device and a method of driving same in which the display device includes: a display panel including first and second display areas; a processor to generate first image data corresponding to the first and second display areas in a first mode, and generate second image data corresponding to the first display area in a second mode; and a display driver to control the display panel to display an image corresponding to the first image data in the first and second display areas according to a first frame period in the first mode, and to display an image corresponding to the second image data in the first display area according to a second frame period in the second mode. The second frame period is shorter than the first frame period.

Abstract: A driving method includes: determining a starting luminance LS of a to-be-adjusted frame image; determining an average luminance LAVE(n) of the to-be-adjusted frame image during a nth duty period; determining a reference luminance flow rate ?L that indicates a current change rate of a storage capacitor storing a data signal for a display element; determining a time length TF of a reference frame image; determining a number k of black strips in the to-be-adjusted frame image; calculating a duty ratio of a pulse driving signal of the to-be-adjusted frame image during the nth duty period based on the starting luminance LS, the average luminance LAVE(n), the reference luminance flow rate ?L, the time length TF, and the number k of the black strips; and driving to display the to-be-adjusted frame image by the adjusted pulse driving signal.

Abstract: A display device and a method of driving the same are described. The display device includes: an over driver to overdrive current frame data included in input image data to output overdriving frame data; a data driver to generate a data signal for the current frame data based on the overdriving frame data; and a display panel including a plurality of pixels to receive the data signal, the over driver may calculate a temporal change rate or a spatial change rate of the input image data, and output the overdriving frame data utilizing a reference formula having a first main parameter determined according to the calculated result. Therefore, overdriving may be performed dynamically according to the spatial change rate or the temporal change rate of the input image data.

Abstract: A drive control method, an assembly and a display device, belonging to the field of panel manufacturing, for signal drive control of a display panel. The drive control method is applied to a time sequence controller, the time sequence controller is connected through a first signal line to a plurality of source drivers which are connected in parallel. The drive control method includes generating a broadcast configuration instruction, the broadcast configuration instruction being used for instructing a plurality of source drivers to perform driver configuration according to the broadcast configuration instruction, and sending the broadcast configuration instruction through the first signal line.

Abstract: The display device includes, on a substrate, a plurality of pixel electrodes, M (M is a natural number equal to or greater than three) counter electrodes disposed opposite the plurality of pixel electrodes, M counter electrode wiring lines connected with M counter electrodes, and N (N is a natural number and 2?N<M) common voltage wiring lines connected to the M counter electrode wiring lines. Counter electrode wiring lines connected to counter electrodes adjacent to each other are connected to common voltage wiring lines that are different from each other.

Abstract: A scan driver includes scan stages, an n-th scan stage of the scan stages includes a first driving circuit, a second driving circuit, and an output circuit. The first driving circuit controls a voltage of a first driving node, based on an input signal and a voltage of a second driving node. The second driving circuit controls the voltage of the second driving node, based on a second clock signal and a first voltage. The output circuit outputs a first clock signal as a scan signal and a carry signal, and outputs a second voltage as the scan signal and the carry signal. The first driving circuit includes a first transistor including a gate electrode electrically connected to the second driving node, one electrode electrically connected to an input line that provides the input signal, and another electrode electrically connected to the first driving node.

Abstract: A shift register unit, a gate driving circuit, a display device, and a driving method are provided. The shift register unit includes an input circuit, an output circuit, and a first node control circuit. The input circuit is configured to charge a first node in response to an input signal; the output circuit is configured to output an output signal at an output terminal under control of a level signal of the first node; and the first node control circuit is configured to receive a precharge control signal from a precharge control terminal and charge the first node in response to the precharge control signal before the output terminal outputs the output signal.

Abstract: A driving method and device for a GOA circuit, and a display device. The driving method includes: reducing a clock signal frequency of the GOA circuit to 1/M of an original clock signal frequency, in a case where data signals of one frame of image satisfy a frequency reduction condition. The frequency reduction condition includes that the data signals of the one frame of image is capable of being equally divided into M parts in time sequence, data signals of each of the M parts are the same, and M is an integer and M?2.

Abstract: The present application discloses a method and apparatus for processing a data sequence. A specific implementation of the method includes: receiving an inputted to-be-processed data sequence; copying a weight matrix in a recurrent neural network model to an embedded block random access memory (RAM) of a field-programmable gate array (FPGA); processing sequentially each piece of to-be-processed data in the to-be-processed data sequence by using an activation function in the recurrent neural network model and the weight matrix stored in the embedded block RAM; and outputting a processed data sequence corresponding to the to-be-processed data sequence. This implementation improves the data sequence processing efficiency of the recurrent neural network model.

Abstract: The present invention provides a method for transmitting data from a timing controller to a source driver, wherein the method includes the steps of: applying a plurality of data rates to a discrete data rate setting; and transmitting image data of a plurality of frames by using a plurality of modulated data rates, respectively; wherein the plurality of modulated data rates are generated by performing spread-spectrum clocking (SSC) upon the plurality of data rates, respectively; and for each of the frames, its corresponding image data is transmitting by using only one of the modulated data rates.

Abstract: Disclosed are a display device, an electronic device, and a toggling circuit, which can reduce or prevent a motion blur phenomenon without a significant change in the performance of an interface, a controller, or a source-driving circuit by toggling driving voltages and individually executing driving voltage lines.

Abstract: A display apparatus is disclosed. The display apparatus according to one embodiment comprises: a display panel comprising a plurality of pixels arranged in a matrix, a plurality of scanning lines, and a plurality of data lines; a timing control unit to generate a scanning line clock signal in which a level transition is repeated; a plurality of scanning line drive units to successively output a scanning line signal based on the scanning line clock signal to the scanning lines; and a signal correcting unit to correct either one of the scanning line clock signal and the scanning line signal such that time differences between a timing of one level transition of the scanning line clock signal and a timing of a level transition of the scanning line signal based on the one level transition substantially match among the scanning line signals output by respective scanning line drive units.

Abstract: A source driving sub-circuit includes a shift register circuit and a latch circuit. The latch circuit includes a resetter and a latch. The resetter is coupled to an enabling signal terminal, a reset signal terminal and the latch. The latch is coupled to the shift register circuit and a data signal terminal. The latch is configured to receive signals output from the shift register circuit and at least in response to the signals output from the shift register circuit. And the resetter is configured to receive a signal provided from the enabling signal terminal and a signal provided from the reset terminal, and reset the at least one data signal latched by the latch in response to the signal provided from the enabling signal terminal.

Abstract: Disclosed is a display device which is capable of increasing a lifespan of a gate driver by maintaining a deterioration balance among a plurality of pull-down transistors, wherein the display device may include a display panel for displaying an image, a gate driver for supplying a gate signal to the display panel, and a timing controller for supplying a gate driver control signal to the gate driver, wherein the timing controller is set in such a way that it is turned-off until after a predetermined one among the plurality of pull-down transistors inside the gate driver is driven by the use of reset signal supplied from a reset integrated circuit.

Abstract: Disclosed are a display panel, a driving method and a display device. The display panel includes a strobe circuit, a pixel driving circuit and a light-emitting element; the pixel driving circuit includes a first initialization unit, a driving module, and a first light-emitting control unit; the strobe circuit is electrically connected to an initialization signal end; and the first initialization unit is electrically connected between the initialization signal end and an anode of the light-emitting element; in a write frame, the first initialization unit is configured to provide a first initialization voltage signal Vref1 to the anode of the light-emitting element under the control of a first scan signal; and in a hold frame, the first initialization unit is configured to provide a second initialization voltage signal Vref2 to the anode of the light-emitting element under the control of the first scan signal.

Abstract: To prevent a decrease in display quality caused when a display apparatus performs pause driving. One end of the n-th scanning signal line (GLn) is connected to the n-th stage circuit (UCn) of a driver circuit. The other end of the n-th scanning signal line is connected to a waveform adjusting circuit (HKn) which adjusts the waveform of the pulse signal of the n-th scanning signal line (GLn) by using a clock signal (CKA) and the pulse signal of the m-th scanning signal line (GLn?1) scanned prior to the n-th scanning signal line.

Abstract: A data driver for driving a display panel includes a first driving channel coupled to a polarity inversion circuit and configured to generate a first data voltage signal having a positive polarity output to the display panel according to a plurality of first pixel data; a second driving channel coupled to the polarity inversion circuit and configured to generate a second data voltage signal having a negative polarity output to the display panel according to a plurality of second pixel data; wherein the first data voltage signal is output to first output node through the polarity inversion circuit during a first line period and the second data voltage signal is output to the first output node through the polarity inversion circuit during a second line period after the first line period, and the first line period and the second line period respectively belong to two consecutive frame periods.

Abstract: The present disclosure relates to the field of display technologies and provides a shift register unit. The shift register unit includes an input circuit, a pull-up circuit, an output circuit, an auxiliary circuit, a pull-down circuit, a first storage capacitor, and a second storage capacitor. The auxiliary circuit is coupled to a first clock signal terminal, a second clock signal terminal, an input terminal and a first output terminal. The second storage capacitor is coupled between a first node and a pull-up node.

Abstract: A video displaying method. The method includes applying a first frequency modulation in time domain on an original video thereby obtaining a first modulated video; applying a second frequency modulation in spatial domain on the first modulated video thereby obtaining a second modulated video including a first invisible-light image; and displaying the second modulating video with a corresponding frame rate. A time-domain frequency of the first invisible-light image is in a first range unrecognizable by a naked eye and recognizable by a video recorder. A spatial-domain frequency of the first invisible-light image is in a second range unrecognizable by the naked eye and recognizable by a video recorder.