Interline Readout Patents (Class 348/322)
  • Patent number: 5926215
    Abstract: In a color image sensor having alternating rows of photosensitive pixels of first and second patterns of spectral sensitivity to one or more of first, second, and third colors, the method of reading out the sensor comprising the steps of:reading out a group of three sequential rows of pixels, by combining the two rows having pixels of the same pattern of spectral sensitivity into a single read-out row of pixels and dumping the row of pixels having the different pattern of spectral sensitivity; andrepeating the readout step until the sensor is completely read out so that sequential readout rows of pixels read out from the sensor have alternating rows of pixels of first and second patterns of spectral sensitivity to one or more of the first, second and third colors, the sensor thereby being read out at a faster frame rate while preserving the color pixel pattern of the sensor.
    Type: Grant
    Filed: October 17, 1996
    Date of Patent: July 20, 1999
    Assignee: Eastman Kodak Company
    Inventors: William Gregory Whipple, Gregory James Martin
  • Patent number: 5786852
    Abstract: An image pick-up apparatus includes an image sensing device which converts an optical image into an electrical signal, the image sensing device including a photoelectric conversion part and a vertical transfer part. A mode switching device switches an operation mode between a frame mode and field mode. Also included is a control device which controls the bias level and/or timing of a vertical transfer pulse depending on the operation mode selected via the mode switching device. The control device provides a predetermined amount of shift to an intermediate level of a transfer pulse used to drive a vertical transfer part adjacent to a photoelectric conversion part. The control means also provides the same amount of shift to intermediate levels of transfer pulses used to drive other vertical transfer parts.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: July 28, 1998
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masao Suzuki, Kenichi Kondo
  • Patent number: 5703640
    Abstract: A color linear image sensor apparatus includes a wiring conductor formed of a first level polysilicon film which is provided on a channel stopper in photocell arrays and which is connected to a first transfer gate electrode of a CCD register. The first transfer gate electrode is also connected to a second transfer gate electrode through a contact hole. Thus, even if the wiring conductor is formed on the channel stopper in the photocell array, a dead zone for locating a wiring conductor for the driving clocks becomes unnecessary, and accordingly, the distance between photocell arrays can be shortened to two thirds to a half of the distance in the conventional examples.
    Type: Grant
    Filed: October 28, 1996
    Date of Patent: December 30, 1997
    Assignee: NEC Corporation
    Inventor: Kazuo Miwada
  • Patent number: 5625414
    Abstract: A charge transfer imager useful for charge summing includes a photosensitive area for producing image charge, a floating diffusion for converting the image charge to a voltage, an output register for transferring the image charge to the floating diffusion, and an output circuit including the floating diffusion for producing an output signal that contains image information as a function of the difference between a predetermined reference level and an image level, both levels characterized by respective relatively constant pedestal regions. The imager is part of an imaging device that includes a clock generator for generating a reset signal of predetermined frequency that resets the voltage level of the floating diffusion, and for generating a transport signal that is applied to the output register for shifting the image charge to the floating diffusion at a multiple of the reset clock frequency.
    Type: Grant
    Filed: January 30, 1995
    Date of Patent: April 29, 1997
    Assignee: Eastman Kodak Company
    Inventor: Thomas J. Manning
  • Patent number: 5579047
    Abstract: An image signal processing apparatus comprises an image pick-up device driven in an interlaced manner, a color filter having portions for passing luminance components located in an offset manner and a memory for storing the signal read out from the image pick-up device without sub-sampling it.
    Type: Grant
    Filed: August 2, 1994
    Date of Patent: November 26, 1996
    Assignee: Canon Kabushiki Kaisha
    Inventors: Taku Yamagami, Takashi Sasaki, Akira Suga
  • Patent number: 5546127
    Abstract: A solid-state imaging apparatus capable of changing a vertical resolution (MTF) without damaging the dynamic resolution. A CCD drive circuit 6 for driving a CCD image sensor 2 of an imaging section 3 is controlled by a control section 7 to independently vary effective charge storage periods of respective photoelectric conversion of the CCD image sensor 2 with respect to photoelectric conversion of odd columns and photoelectric conversion elements of even columns and to add and mix, every field, image pick-up charges obtained by respective adjacent photoelectric conversion elements of odd and even columns to read them out. A CCD drive circuit 6 for driving a CCD image sensor 2 of an imaging section 3 may also be controlled by a control section 7 to carry out control of the electronic shutter function of the CCD image sensor 2, and to control the effective charge storage periods of respective photoelectric conversion elements in a manner caused to interlock with the electronic shutter function.
    Type: Grant
    Filed: April 24, 1995
    Date of Patent: August 13, 1996
    Assignee: Sony Corporation
    Inventors: Masahiro Yamashita, Norihiko Kawada, Satoshi Nakamura
  • Patent number: 5530475
    Abstract: A method and apparatus for generating timing signals within the sensor in an imaging system by making provisions internally within a sensor that allows the sensor to generate the timing signals which are then output to the system to control the image sensor timing This alleviates the system from the responsibility of counting pixels and lines. The sensor will give at predetermined times, outputs which have the same wave form as the normal video output but with a much higher amplitude than the maximum video output recognized by the image processing system. These output signals will identify the end of the line and likewise will identify the end of the frame (or field). The resulting sensor can maintain its own timing sequence accurately tracking the time for lines and frame readout.
    Type: Grant
    Filed: November 30, 1994
    Date of Patent: June 25, 1996
    Assignee: Eastman Kodak Company
    Inventors: Ram Kannegundla, Charles V. Stancampiano
  • Patent number: 5528291
    Abstract: In a monitor mode, the saturated electric charge amount of a plurality of first, second, third, and fourth types of photoelectric conversion elements disposed in matrix form on a semiconductor substrate is set to one half a saturated electric charge amount during a still mode. In the monitor mode, electric charges stored by two of the four types of photoelectric conversion elements are transferred to vertical CCDs, mixed and vertically transferred to a horizontal CCD. In the still mode, electric charges of one of the four types of photoelectric conversion elements at a time for a 1 V period (where V is a vertical scan period) are transferred to vertical CCDs and vertically transferred to the horizontal CCD. Furthermore, in the still mode, initially, the electric charges in the photoelectric conversion elements are cleared out for 4n * V periods, where n is a positive integer. Thereafter, smear electric charges are swept out from the vertical CCDs during a 1 V period.
    Type: Grant
    Filed: September 24, 1992
    Date of Patent: June 18, 1996
    Assignee: Fuji Photo Film Co., Ltd.
    Inventor: Kazuya Oda
  • Patent number: 5517244
    Abstract: A 3-phase charge-coupled imaging device is operated in the interlace mode. During integration, voltages are applied to the clock electrodes such that charge is integrated below the same set of electrodes each time. The signal charges of the first field are formed in that 3/4 portion of the charge in each picture element is augmented by 1/4 portion of the charge of the preceding picture element, while the signal charges of the second field are formed in that the 3/4 portion is augmented by 1/4 portion of the charge generated in the following picture element. These summations may be carried out in the sensor itself in that the charge packages are shifted to the left and right during integration. The flicker which is usually the result of interlacing is very strongly reduced in this way.
    Type: Grant
    Filed: September 27, 1994
    Date of Patent: May 14, 1996
    Assignee: U.S. Philips Corporation
    Inventors: Michael A. W. Stekelenburg, Hermanus L. Peek, Colm J. Sweeney, Alouisius W. M. Korthout
  • Patent number: 5506618
    Abstract: A solid state image pickup device having a high luminance signal resolution in both horizontal and vertical directions using only one CCD is realized. It is so arranged as to make light incident upon and passed through a fixed complementary color filter array subjected to a photoelectric conversion with an all-pixel concurrent readout photoelectric conversion means and fed to a luminance signal processing unit and a chrominance signal processing unit through an H memory unit to develop a luminance signal together with a first and a second chrominance signals at output terminals.
    Type: Grant
    Filed: May 13, 1993
    Date of Patent: April 9, 1996
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Masayuki Yoneyama, Yasutoshi Yamamoto, Norio Suzuki, Hiroaki Okayama, Syusuke Ono
  • Patent number: 5495289
    Abstract: An FIT solid state image sensor including an image section having an array of photosensitive elements, a storage section for temporarily storing signal charges transferred thereto from the image section, a plurality of vertical shift registers provided for respective vertical lines of the array, and a horizontal shift register for horizontally transferring the signal charges transferred vertically through the vertical shift registers. Clock pulses are applied to the vertical transfer registers during a line shift transfer period of transferring the signal charges from the storage section to the horizontal shift register. The voltage levels of the clock pulses are set to provide the same potential between the photosensitive elements arranged in odd horizontal lines of the array and the photosensitive elements arranged in even horizontal line of the array.
    Type: Grant
    Filed: January 5, 1995
    Date of Patent: February 27, 1996
    Assignee: Sony Corporation
    Inventor: Tetsuro Kumesawa
  • Patent number: 5489945
    Abstract: A timing logic system which includes a generic television-standard timing generator selectably provides precisely timed horizontal and vertical control signals for controlling the operation of a high resolution charge coupled device (CCD) image sensor of the type having two line pixel registers in a high resolution mode of picture imaging. Alternatively, the timing logic system selectably provides precisely timed horizontal and vertical control signals, and a precisely timed display field control signal applied to a switch mechanism, for controlling the operation of the high resolution CCD image sensor in a television resolution mode of picture imaging in accordance with a television standard, for example, the NTSC standard. The timing logic system also provides sync and control signals to a television-standard display in the television mode of operation.
    Type: Grant
    Filed: September 13, 1994
    Date of Patent: February 6, 1996
    Assignee: Eastman Kodak Company
    Inventors: Ram Kannegundla, Win-Chyi Chang
  • Patent number: 5485207
    Abstract: A single-output CCD image sensor selectively transfers a normal or a mirror image without changing the combination of clock signals needed by the HCCD. The CCD image sensor comprises VCCD's arrayed in each row, photodiodes connected to the VCCD's through transfer gates, and an upper HCCD connected to one end of the VCCD's. A rotating part for connecting one end of the upper and lower HCCD's as used for one of the normal or mirror image serial transfers. A control gate formed in parallel between the upper and the lower HCCD is used for the other of the normal or mirror image serial transfers, and operates in parallel. An output circuit is connected to the other end of the lower HCCD.
    Type: Grant
    Filed: May 24, 1993
    Date of Patent: January 16, 1996
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jung H. Nam
  • Patent number: 5471246
    Abstract: A method for determining a charge/voltage conversion ratio of a solid state image pickup element with an electronic shutter function which is capable of transferring signal charge accumulated in a photosensitive portion to a substrate. A voltage of a predetermined first level is applied to the substrate to measure an output voltage at an output portion, and then a voltage of a second level higher than that of the first level is applied to the substrate to measure a current flowing through the substrate, thereby obtaining a charge/voltage conversion ratio in accordance with a ratio between the measured output voltage and the measured current.
    Type: Grant
    Filed: April 21, 1994
    Date of Patent: November 28, 1995
    Assignee: Sony Corporation
    Inventors: Osamu Nishima, Tomoyuki Suzuki, Kazuhiko Nishibori
  • Patent number: 5463421
    Abstract: There is disclosed a solid-state image pick-up apparatus provide with a solid-state image sensor such as a CCD image sensor, etc.
    Type: Grant
    Filed: May 26, 1993
    Date of Patent: October 31, 1995
    Assignee: Sony Corporation
    Inventors: Hiroaki Deguchi, Masahiro Yamashita, Yukihiro Masuda
  • Patent number: 5459510
    Abstract: A CCD imager is used in a television camera which generates signals for use with a particular television standard, such as the proposed U.S. HDTV production standard. The imager includes a light-sensitive A register which generates signal in the form of charge during an integrating interval, a B charge storage register into which the charge is transferred during a pull-down interval, and a horizontal shift register coupled to the last row of the B register, into which the charges are simultaneously coupled, and serially read. The video signals produced by the imager are subject to distortion caused by incomplete charge transfer in the pull-down interval and crosstalk noise resulting from gating the clock signals to the horizontal shift register on and off. Vertical transfer distortion is reduced by reading the horizontal lines from the horizontal shift register with reduced intervals between the active portions, which allows the pull-down interval to be increased.
    Type: Grant
    Filed: July 8, 1994
    Date of Patent: October 17, 1995
    Assignee: Panasonic Technologies, Inc.
    Inventor: Kaarlo J. Hamalainen
  • Patent number: 5459509
    Abstract: In the method of transferring charges generated by signal charge generating sections in response to light, a signal charge existing under some transfer electrode of the plural charge transfer sections arranged in parallel to each other is transferred through one of a plurality of connecting sections formed under the transfer electrode corresponding to another charge transfer section among the plural connecting sections formed between the plural charge transfer sections, on the basis of a predetermined drive pulse; and when the charge is transferred to the other charge transfer section, a charge remaining at the primary charge transfer section is transferred from the primary charge transfer section to the other charge transfer section, through the other connecting section among the plural connecting sections, to combine the remaining charge with the signal charge previously transferred.
    Type: Grant
    Filed: January 29, 1993
    Date of Patent: October 17, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Makoto Monoi
  • Patent number: 5446493
    Abstract: A solid state image sensor has a photosensing region formed on a substrate. The photosensing region has a plurality of photocells for receiving an incident image. The photosensing region is capable of changing image sampling modes by relatively shifting image sampling points for the incident image. In the photosensing region, a plurality of first transfer elements are formed and the first transfer elements receive the signal charges from adjoining photocells and transfer them out. Further, a temporary storage region is formed on the substrate having a plurality of second transfer elements therein for each of the first transfer elements. Each of the second transfer elements has a capacity to accommodate all of the signal charges of a corresponding first transfer elements which are read out from the photocells at the same time. A plurality of gate elements are respectively formed between each of the first transfer elements and their corresponding plurality of second transfer elements.
    Type: Grant
    Filed: March 9, 1994
    Date of Patent: August 29, 1995
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Yukio Endo, Nozomu Harada, Hidenori Shibata, Yoshiyuki Matsunaga
  • Patent number: 5442396
    Abstract: In a solid-state image pickup device comprising a plurality of photoelectric converting sections, vertical charge transfer sections each comprising first and second vertical charge transfer electrodes (26a, 26b) and a vertical charge transfer region (23), and power feeding sections, each of the power feeding sections is divided into first through fourth metal wires (28a, 28b, 28c, 28d). The first through the third metal wires (28a, 28b, 28c) are formed in a first layer of a conductive film. The fourth metal wire (28d) is formed in a second layer of the conductive film. The first and the third metal wires (28a, 28c) are alternately connected to the first vertical charge transfer electrodes (26a) via contact holes (27). The second and the fourth metal wires (28b, 28d) are alternately connected to the second vertical charge transfer electrodes (26b) via contact holes (27). The first through the fourth metal wires (28a, 28b, 28c, 28d) are applied with first through fourth clock pulse signals (.phi.1, .phi.2, .
    Type: Grant
    Filed: August 16, 1994
    Date of Patent: August 15, 1995
    Assignee: NEC Corporation
    Inventor: Yasutaka Nakashiba
  • Patent number: 5440343
    Abstract: An electronic imaging system is provided that records both motion and still video images. In a motion mode of operation, the electronic imaging system records NTSC resolution images at a standard thirty frame per second rate. In a still mode of operation, the electronic imaging system records megapixel resolution still images at a much lower frame rate. The electronic imaging system utilizes an electronic image sensor that incorporates column selective "charge clearing" structures and column selective "charge parking" structures. The charge clearing structures are used to selectively discard the signal charge from certain color pixels. The charge parking structures are used to sum the charge from multiple vertical pixels. The architecture of the electronic image sensor also allows different image aspect ratios to be provided for the motion and still modes described above.
    Type: Grant
    Filed: February 28, 1994
    Date of Patent: August 8, 1995
    Assignee: Eastman Kodak Company
    Inventors: Kenneth A. Parulski, Eric G. Stevens, Robert H. Hibbard
  • Patent number: 5430481
    Abstract: The imager includes a frame transfer image array 22 having a plurality of image cells, the image cells accumulating charge in response to input light and arranged in a plurality of image rows and image columns, odd numbered ones of the image rows constituting a first field and even numbered ones of the image rows constituting a second field; and a memory array 24 having a plurality of memory cells arranged in a plurality of memory rows and memory columns for storing charge from the image array 22, wherein, in a first mode, charge in the first field and the second field is transferred to the memory array 24 from the image array, and, in a second mode, charge in the first field is summed with charge in the second field in the image array 22 before being transferred to the memory array 24.
    Type: Grant
    Filed: March 30, 1994
    Date of Patent: July 4, 1995
    Assignee: Texas Instruments Incorporated
    Inventor: Jaroslav Hynecek
  • Patent number: 5414467
    Abstract: The present invention is directed to a charge transfer device formed on a semiconductor substrate which comprises a channel region formed on the semiconductor substrate, at least a set of transfer gate electrodes formed adjacent to each other and insulated from each other, the set of transfer gate electrode formed over the channel region through an insulating film, clock means for providing the transfer gate electrode with multiple clock pulses, and a plurality of resistors provided between each of the transfer gate electrodes and the clock means, the resistors having respective values corresponding to capacitances of the transfer gate electrodes. Therefore, a transfer efficiency of signal charges can be improved without reducing a maximum amount of signal charges handled by a vertical register.
    Type: Grant
    Filed: August 17, 1994
    Date of Patent: May 9, 1995
    Assignee: Sony Corporation
    Inventor: Eiji Komatsu
  • Patent number: 5402173
    Abstract: An image pickup section includes the number of pixels in the vertical direction which is decreased one-half less than the number of scan lines. A signal containing image components is outputted every one horizontal line. The horizontal line containing the image components in an odd field is offset from that in an even field by one line. In both the odd and even fields, leach of these image signals are multiplexed on a signal delayed by one horizontal scan period to form an image signal which contains the same image components for each two horizontal lines. This image signal is then displayed in the non-interlace manner.
    Type: Grant
    Filed: February 22, 1994
    Date of Patent: March 28, 1995
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yoshimitsu Noguchi, Tomomichi Nakai, Yoshihito Higashitsutsumi
  • Patent number: 5398063
    Abstract: A focusing position detecting device of this invention comprises a CCD image sensor including a light receiving section in which an image of a subject which is formed by an image forming optical system and is an object of focusing position detection is projected on a plurality of picture elements, a shift register for transferring charges read out from the picture elements in synchronism with a charge transfer clock, and an output section for sequentially storing charges transferred by the shift register, a picture element readout circuit for supplying a picture element readout signal to the CCD image sensor and reading out charges stored in the picture elements to the shift register, a sampling circuit for sampling the charges stored in the output section to derive a luminance signal for each of the picture elements, a focusing position deriving circuit for deriving the focusing position of the image forming optical system from the luminance signal sampled by the sampling circuit, and a reset circuit for res
    Type: Grant
    Filed: July 2, 1992
    Date of Patent: March 14, 1995
    Assignee: Olympus Optical Co., Ltd.
    Inventor: Motokazu Yamana
  • Patent number: 5396290
    Abstract: Apparatus and method for controlling a high resolution charge coupled device (CCD) image sensor operate in accordance with a television standard to provide horizontal, vertical, and other CCD control signals to obtain a purely sequential high resolution mode of operation on the one hand. Alternatively, there is a modified mode of operation which provides interlaced even and odd groups of video signals to be viewed directly on a television viewfinder display. The apparatus includes a frequency generator, a standard timing generator, a pixel clock generator, and a small number of additional timers and logic units which are driven by signals from the generators to selectably generate the vertical, horizontal, and other CCD control signals for the alternate modes of operation.
    Type: Grant
    Filed: March 19, 1993
    Date of Patent: March 7, 1995
    Assignee: Eastman Kodak Company
    Inventors: Ram Kannegundla, Win-Chyi Chang
  • Patent number: 5396121
    Abstract: A method for driving a solid-state imaging device which includes the steps of (1) reading a signal from an i-th pixel in the pixel portion into a vertical charge transfer portion over k bit portions thereof starting from the i-th bit portion thereof; (2) transferring the read signal corresponding to k bits of the vertical charge transfer portion in the vertical direction during one horizontal blanking period; (3) reading a signal from an (i+1)-th pixel of the n pixels arranged in the pixel portion into the vertical charge transfer portion over k bit portions thereof starting from the (i+1)-th bit portion thereof after the completion of the transfer of signal portions corresponding to the (k-1) bits of the read signal corresponding to the k bits of the vertical charge transfer portion; (4) repeating the steps (1) through (3) for the pixels arranged in the pixel portion starting from the first pixel nearest to a horizontal charge transfer portion to a pixel farther therefrom; and (5) repeating the step (2) afte
    Type: Grant
    Filed: October 20, 1993
    Date of Patent: March 7, 1995
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Takashi Watanabe
  • Patent number: 5394187
    Abstract: A sequential video imaging system uses a video sensor having interline architecture whereby image data is moved from sensor elements to adjacent interlined storage elements. The object being viewed is sequentially illuminated with colored light sources to produce luminance and chrominance video signals. Binning of image data corresponding to low level color signals is carried out in the sensor. A digital signal processor includes data buffering and averaging circuits whereby the camera head and base unit can be operated asynchronously.
    Type: Grant
    Filed: November 22, 1993
    Date of Patent: February 28, 1995
    Assignee: Apollo Camera, L.L.C.
    Inventor: John I. Shipp
  • Patent number: 5387935
    Abstract: A solid state imaging device having a horizontal transfer register formed of a plurality of transfer sections for alternately transferring a signal charge of the same pixel in the horizontal direction wherein a signal charge can be distributed between respective transfer sections in consideration of the amount of signal charges handled by the respective transfer section. In a first horizontal transfer register (4) having transfer sections (4a) and (4b), a control gate section (5) that distributes signal charges between the respective transfer sections (4a) and (4b) has on its one region a potential barrier section (13) formed along the horizontal transfer direction.
    Type: Grant
    Filed: September 21, 1993
    Date of Patent: February 7, 1995
    Assignee: Sony Corporation
    Inventor: Atsushi Kobayashi
  • Patent number: 5379068
    Abstract: Solid state imaging devices include an image sensor having a two-dimensional matrix of picture elements arranged horizontally and vertically. A vertical scanning circuit selects horizontal lines of picture elements within the two-dimensional matrix in a predetermined order for reading the picture elements. A horizontal scanning circuit coupled with a plurality of vertical lines joining vertically spaced ones of the picture elements serves to select picture elements in the horizontal lines selected by the vertical scanning circuit to output image signals therefrom. The horizontal scanning circuit is operative to scan the picture elements of the selected horizontal lines through one side of the two-dimensional matrix in a first horizontal direction to output a normal image signal.
    Type: Grant
    Filed: April 28, 1993
    Date of Patent: January 3, 1995
    Assignee: Sony Corporation
    Inventor: Masaharu Hamasaki
  • Patent number: 5353057
    Abstract: A method for driving an interline transfer type CCD imager by reading out a signal charge accumulated in one of first and second light receiving pixels to corresponding one of first and second accumulation regions. Part of the signal charge is transferred to the other one of the first and second accumulation regions which is disposed adjacently to the one of the accumulated regions. Another signal charge accumulated in the other one of the first and second light receiving pixels is read out so as to add the other signal charge to the part of the signal charge. Thereafter, the remaining part of the signal charge is transferred to the adjacent other one of the first and second accumulation regions.
    Type: Grant
    Filed: December 7, 1993
    Date of Patent: October 4, 1994
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Takashi Watanabe
  • Patent number: 5321509
    Abstract: Apparatus and method for controlling a charge coupled device (CCD) image sensor provides, in accordance with a television standard, horizontal and vertical CCD control signals to obtain a purely sequential mode of operation on the one hand, and alternatively a modified mode of operation to permit image signals to be viewed directly on a standard viewfinder display. The apparatus includes a frequency generator, a standard timing generator, a pixel clock generator, and a small number of additional timers and logic units which are driven by signals from the generators to selectably generate the vertical and horizontal CCD control signals for the alternate modes of operation. The method includes generating a plurality of precisely timed pulses referenced to television standard synchronizing and control signals, and logically combining these pulses and standard signals to generate the vertical and horizontal CCD control signals.
    Type: Grant
    Filed: January 15, 1993
    Date of Patent: June 14, 1994
    Assignee: Eastman Kodak Company
    Inventor: Ram Kannegundla
  • Patent number: 5305096
    Abstract: An image signal processing apparatus comprises an image pick-up device driven in an interlaced manner, a color filter having portions for passing luminance components located in an offset manner and a memory for storing the signal read out from the image pick-up device without sub-sampling it.
    Type: Grant
    Filed: July 25, 1991
    Date of Patent: April 19, 1994
    Assignee: Canon Kabushiki Kaisha
    Inventors: Taku Yamagami, Takashi Sasaki, Akira Suga
  • Patent number: 5298734
    Abstract: A solid-state image pickup apparatus employing a frame interline transfer type solid-state image sensor. The operation of a driving circuit is controlled by a controller in such a manner that image pickup charges produced by photosensitive elements are drained in a charge draining section at a drain timing during a vertical blanking period, and image pickup charges produced by the photosensitive elements in an image pickup unit after lapse of a predetermined light exposure period since the drain timing are transferred to a vertical transfer register so as to be transferred by high speed transfer from the image pickup unit to a storage unit during the next vertical blanking period so that the image pickup charges are read out line sequentially during the imaging period via horizontal transfer registers. The apparatus maintains a constant start timing of the effective light exposure period and produces video signals synchronized with external synchronization signals.
    Type: Grant
    Filed: February 16, 1993
    Date of Patent: March 29, 1994
    Assignee: Sony Corporation
    Inventor: Yuji Kokubo
  • Patent number: 5286990
    Abstract: A virtual phase image sensor has majority carriers supplied to a virtual gate 24 by a conductor 32 overlying the image sensor, the virtual gate 24 and the conductor 32 each in contact with a conductive channel stop region 30.
    Type: Grant
    Filed: July 1, 1992
    Date of Patent: February 15, 1994
    Assignee: Texas Instruments Incorporated
    Inventor: Jaroslav Hynecek