Abstract: The present invention relates to a method of playing a set of multimedia applications (A), each multimedia application including a list of tasks (TTD). The method includes the steps of creating a common scheduler (SCH) at a start time, in order to provide a target time, registering the tasks into the scheduler, and controlling the execution of the tasks as a function of the target time. The method also includes a step of giving a priority level to the task and the scheduler is adapted to control the execution of the tasks as a function of the target time and the priority level. The method further includes a step of computing a local time for a task from the target time provided by the scheduler and timing information associated with said task. With such a mechanism, each task has its own time reference, thus ensuring a correct operation of the overall application, while a global notion of schedule is maintained.

Abstract: A method and apparatus for compensating for time base or phase errors in video and audio signals that are separately stored or processed. A ring oscillator provides a plurality of clock signals, each having a same frequency and slightly different phase. Each of the clock signals is applied to a multiplexor for allowing an appropriate one of the clock signals to be selected. By selecting appropriate ones of the clock signals in a sequence, the frequency and phase of an output clock signal formed by the multiplexor can be continuously and precisely controlled. Sync pulses separated from a video signal having a varying time base are applied to a video timing generator circuit which generates a series of digital values representative of timing differences between an expected occurrence of a sync pulse and an actual occurrence of the sync pulse. A phase accumulator accumulates the digital values over time for generating appropriate addresses for the multiplexor.

Abstract: A circuit for providing a sufficiently accurate clock signal for reconstruction of an image from a video signal can function with or without receiving an incoming video signal containing clock data. In this way, a clock signal for supporting an on-screen display can be created in the absence of an incoming video signal. Control data used to control a voltage controlled oscillator generating a clock signal is recorded when the control logic of the oscillator is locked to the timing data in an incoming video signal. In the absence of an incoming video signal, the recorded control data is retrieved and resubmitted to the control logic so that the oscillator can be made to output an appropriate clock signal even in the absence of an input video signal.

Abstract: A clock generating device for use in a digital video apparatus generates display clock matching an input video format. The clock generating device generates a clock of a frequency which is a predetermined number of times greater than the clock necessary for displaying video signals having a respectively different format, frequency-divides the generated clock, phase-locks the obtained stable frequency and supplies corresponding display clock. Video signals of a respectively different format can be displayed into a single display format, to thereby provide an effect of displaying a video signal without degeneration of a picture quality.

Abstract: An information processing apparatus includes an address generation circuit for generating an address signal. A memory operates for storing an information signal containing a video signal in response to the address signal. The address signal is periodically updated. A compression processing circuit operates for reading out the information signal from the memory, and subjecting the readout information signal to a compressively encoding process. A head of every frame represented by the information signal is detected. A state of the address signal is stored which corresponds to the detected frame head. Detection is made as to whether or not the information signal becomes discontinuous. The updating of the address signal and also the operation of the compression processing circuit are suspended when it is detected that the information signal becomes discontinuous. Detection is made as to whether or not the information signal returns to a normally continuous state after the information signal becomes discontinuous.

Abstract: For an optimal adjustment of the filter frequency of a signal filter, independently of external influences, process spreads and temperature fluctuations, a filter circuit for filtering at least one sound carrier in a composite video signal by at least one signal filter (24) having at least one filter frequency which is adjustable in dependence upon a control signal, is characterized in that the filter circuit (1) includes a reference filter (11) whose filter frequency is adjustable in dependence upon the control signal and which shifts the phase of a reference signal applied thereto by a defined value when tuning the filter frequency to the frequency of said reference signal, in that a phase comparator (14) is provided which receives the output signal of the reference filter (11) and the reference signal, in that the control signal is derived from the output signal of the phase comparator (14) in such a way that the reference filter (11) is tuned to the frequency of the reference signal, and in that an output

Abstract: The object of this invention is to realize the correct and prompt synchronization of data in decoding and reproducing multiplexed coded data multiplexed with a plurality of media coded data in the unit of packet without regard to the configuration or characteristics of the apparatus. To achieve a data decoder that can synchronize the video and audio data correctly, the timing controller obtains a buffering time indicated by the time difference between the decoding end time and the specified presentation time contained in the data, and data buffering is performed by buffer memory. The video decoding end time is latched from the system time counter according to a timing pulse generated by the video decoder when the first decoded data is output from video decoder after the data decoder is activated.

Abstract: An aural carrier signal is corrected in a common amplifier system wherein the correction serves to reduce cross-modulation distortion of the aural carrier signal caused by non-linearities of the common amplifier system. An aural corrector receives a modulated visual carrier signal comprised of a visual carrier signal modulated by a video baseband signal and a phase corrected aural carrier signal and provides therefrom a combined corrected aural carrier signal. The visual carrier signal is combined with the combined corrected aural carrier signal to provide a corrected output carrier signal.

Abstract: A system and method of coordinating a visual display with audio advertisements broadcast over a communications network such as the Internet is provided. A run-time procedure in which the visual display is retrieved and concurrently displayed at about the time the audio advertisement is broadcast is described. In addition, a set-up procedure, in which scheduled broadcast times for the audio advertisements are captured and provided for use in scheduling the broadcasts of the corresponding visual displays, is also described. The system and method can be beneficially employed in other environments, such as the case in which a first audio, visual, or audiovisual segment or stream is coordinated with a predetermined second audio, visual, or audiovisual segment or stream, and a selected one of the first and second segments or streams includes or comprises advertising material.

Abstract: In a method and apparatus for delaying propagation time of an external synchronizing signal transmitted from a receiver to transmitters which transmit a video signal to the receiver, each transmitter has an adjustable propagation delay timer which delays propagation of the external synchronizing signal. The receiver includes a detection circuit for detecting a time coincidence or a time difference between the external synchronizing signal and a sync portion of a video signal selected by a selector to be transmitted to the receiver, and a circuit which modifies the external synchronizing signal to produce a fluctuated external synchronizing signal when the detection circuit detects the time difference between the external synchronizing signal and the sync portion of the selected video signal.

Abstract: In a signal transmitter and a signal receiver according to the present invention, a multiplexing part (102) multiplexes a video signal and a time-base-compressed audio signal on the basis of a multiplexing control signal to transmit the multiplexed signal through a data line (106) in the signal transmitter, and a demultiplexing part (103) demultiplexes a video/audio multiplexed signal received through the data line (106) into the original video signal and audio signal by a demultiplexing control signal in the signal receiver. Further, a horizontal synchronizing signal or vertical synchronizing signal of the video signal is employed as the multiplexing control signal and the demultiplexing control signal, and the audio signal is time-base-compressed at the transmitting end, to multiplex the audio signal in a blank of the video signal, and the multiplexed audio signal is time-base decompressed at the receiving end.

Abstract: This television tuner comprises a mixer 1c for frequency converting each of a television signal and an FM broadcasting signal into an intermediate signal, a local oscillator for outputting a local oscillation signal to the mixer, and a PLL circuit for setting the frequency of the local oscillation signal in correspondence with the frequency of the television signal or the frequency of the FM broadcasting signal. The step frequency of the PLL circuit in the event of receiving the television signal and that in the event of receiving the FM broadcasting signal are made different. The step frequency in the event of receiving the television signal is set to 31.25 kHz and that in the event of receiving the FM broadcasting signal is set to 50 kHz.

Abstract: The inventive system mainly includes a synchronization marker at a transmitting site and a synchronization forcer at a receiving site connecting to each other via computer networks. The synchronization marker performs the sequential mark marking of frames per every marking interval. The synchronization forcer regulates the play time of the audio signals and their corresponding video signals according to their sequential marks. The inventive system can determine precisely about the minimum marking interval yielding a bounded skew requirement. Consequently, the invention satisfies any given skew requirement under various buffer size and traffic arrivals while imposing minimal overhead.

Abstract: This invention enables coded audio data to be reliably decoded even if an audio signal coded in blocks not in synchronism with the frames or fields of a video signal is decoded on the basis of these frames of fields. By filling an integral number of coded audio blocks in the period of time corresponding to one frame or field of the video signal, this invention forms an array of coded audio blocks in synchronism with the frames or fields of the video signal before transmission. This avoids separating a coded block in transmitted data at a frame or field boundary, and enables the coded audio data to be reliably decoded so as to prevent the occurrence of a period of time in which decoded data is missing even if a switching operation is carried out on the basis of the frames or fields of the video signal.

Abstract: A method for displaying closed-captioning with audio programs. The audio signal data is located and sent to an audio signal processor for conversion into an audio program. The closed-captioning data is located and decoded to produce a textual display synchronized with the audio program. The closed-captioning data is displayed on a remote device, either as part of a consumer electronics system, or as a stand alone network device. The invention also includes one example of an apparatus that receives and decodes the components of a complex audio signal to produce both the audio program and the closed-captioning on the remote device.

Abstract: When an OSD data storage area for storing OSD data needs to be reserved, an area of a frame storage apparatus that should store macroblocks corresponding to an invisible area on a screen is allocated as the OSD data storage area. There is no degradation in picture quality. When doing so, the data reduction control unit 64 receives an instruction to reserve the OSD data storage area and discards the corresponding macroblocks. The OSD data access unit 63 writes the OSD data into an area of the frame storage apparatus that was assigned to store the discarded macroblocks.

Abstract: A method and apparatus for synchronization of an audio/visual bitstream is transmitted by an encoder and received by a decoder by employing duplication or elimination of audio samples and video pixels. The invention enables clock synchronization between the encoder and a decoder with an unregulated clock oscillator so as to control the data reader by skipping ahead (eliminating a data element) or to pause (duplicating a data element) depending on whether the encoder clock is faster or slower than the decoder clock.

Abstract: Systems and methods create high quality audio-centric, image-centric, and integrated audio-visual summaries by seamlessly integrating image, audio, and text features extracted from input video. Integrated summarization may be employed when strict synchronization of audio and image content is not required. Video programming which requires synchronization of the audio content and the image content may be summarized using either an audio-centric or an image-centric approach. Both a machine learning-based approach and an alternative, heuristics-based approach are disclosed. Numerous probabilistic methods may be employed with the machine learning-based learning approach, such as naïve Bayes, decision tree, neural networks, and maximum entropy. To create an integrated audio-visual summary using the alternative, heuristics-based approach, a maximum-bipartite-matching approach is disclosed by way of example.

Abstract: A digital phase synchronizing apparatus delays sequentially a clock signal output from an oscillator, generates a plurality of delayed clock signals, selects a delayed clock signal that is synchronized with horizontal synchronizing signal HS from among the delayed clock signals using a change point detection circuit, and selects the output signal. Meanwhile, fine delay circuit further delays sequentially the selected delayed clock signal, generates a plurality of delayed clock signals, and selects a delayed clock signal that corresponds to the setting of a rotary dip switch as the system clock, thereby to efficiently acquire phase synchronization of the clock signal with the input signal without being affected by the signal characteristics of the input signal.

Abstract: This invention is a method and apparatus for delaying video type signals along with one or more secondary signals having a timing relationship to the video type signal. The delay maintains the timing relationship between the video type signal nd secondary signals. Operation to mute or otherwise modify the secondary signals upon the loss or corruption of the video type signal is shown. The selection of one of a plurality of reference signal candidates is shown along with the use of the input signal to provide a fixed delay.

Abstract: Control information is processed in synchronism with audio and video data according to a protocol such as RTP (Real-time Transfer Protocol). In one embodiment, a payload handler receives incoming data packets and forwards them to either a data control filter or an audio packet handler. The data control filter determines whether the data payload contains video data or control information and forwards video data to a video data packet handler and data control information to a data handler. The data control information can include an action identifier field (e.g., containing a “display” command) and a data object field (e.g., identifying a file location in a memory) so that the data control filter can display the identified file with the presentation of the other video and audio data.

Abstract: A digital video logging system including a logging apparatus able to synchronize at least two digitally formatted video input and digital storage apparatus to store the digitally formatted input is provided.

Abstract: A video signal transmission apparatus has the encoding means 2, operative when a predetermined unit of video signal is compressively encoded, for multiplexing identification data unique to this video signal in a user data region within an encoded bit stream, and the storing/decoding means 4 for storing the encoded bit stream data having the unique identification data multiplexed therein, and, when transmission is requested from the outside, for decoding the encoded bit stream data and simultaneously reading the multiplexed unique identification data to verify whether it is unique identification data of a video signal to be transmitted.

Abstract: An apparatus and method for MPEG decoding are disclosed which control decoding without reference to the system time clock for a predetermined time period during a discontinuity of system time clock. Thus, an error caused by inconsistency between the system time clock and the time stamp due to delay of the video buffer is eliminated, thereby allowing normal decoding with A/V lip-synchronization.

Abstract: A timing recovery apparatus and method for a digital TV is disclosed. The timing recovery apparatus includes: a symbol synchronization unit for determining the bandwidth of a timing recovery loop in a plurality of steps according to a convergence degree; and a timing lock detector for detecting a lock using a reference value calculated by the envelope of a timing error, whereby the envelope of the timing error calculated according to a channel state is used as a reference value for thereby preventing a lock error and assuring a rapid and accurate convergence characteristic.

Abstract: A delay tracker for a signal processing system, which delay tracker utilizes a special code or pulse on the active portion of the tracked signal with the system including a pulse detector later in the system subsequently recognizing the special code or pulse in order to identify such signal and ascertain any delays associated with the signal for use by the system including possible resynchronization of the tracked signal with another signal associated therewith.

Abstract: The present invention provides a method and apparatus for providing video output phase control in a decoder. In particular, the present invention provides a decoder that precisely aligns output of video display data with a time stamp associated with the video display data and thereby allows for efficient usage of compressed video buffer memory in the decoder. In one embodiment, the decoder includes a video output processor for displaying video data and a timer connected to the video output processor for providing video output phase control. A method is also provided for providing video output phase control in the decoder.

Abstract: A system and method for distributing high definition television (HDTV) and standard definition television (SDTV) signals via satellite is disclosed. At the transmission station an MPEG-2 video encoder compresses a video signal and a digital encoder encodes an audio signal. The compressed video and the encoded audio are coupled to PES packetizers, which generate video and audio packetized elementary data streams having PES headers and PES payloads. Within each PES header is a presentation time stamp (PTS), which is representative of the time at which the payload is to be displayed to the user. The packetized elementary data streams are multiplexed together by a transport multiplexer and repacketizer and broadcast to receiver stations, via satellite. The receiver stations receive the PES information and obtain the PTS. A receiver station multiplies the PTS by 300 and compares its local clock reference to that time.

Abstract: A clock recovery circuit in a digital display unit for recovering a time reference signal associated with analog display data. The clock recovery circuit includes a phase-locked loop (PLL) implemented in digital domain and an analog filter to eliminate any undesirable frequencies from the output signal of the PLL. The PLL includes independent control loops to track long term frequency drifts of the time reference signal and the transient phase differences respectively. By providing such independent control loops, the generated clock can be better synchronized with the time reference signal.

Abstract: When short MPEG2 data transfer streams, such as those used for commercials, are sequentially distributed within a short period of time, a decoder method synchronizes the transfer and prevents accumulation of data in a buffer and data losses. The synchronization method extracts sync data originating at the transmission source from a received data stream; acquires sync data for a decoder based on a reference clock; compares the sync data originating at the transmission source with the sync data for the decoder in order to sequentially obtain control values, sequentially updates the frequency of the reference clock for transfer synchronization for the received data stream; determines whether or not a data stream that differs from the received data stream has been received; and employs, when a different data stream has been received, the reference clock obtained when the received data stream has been received, to initiate transfer synchronization for the different data stream.

Abstract: This invention is an apparatus and method for processing television signals and in particular high quality video type signals in analog or digital form. The preferred embodiments utilizes digital storage along with oversampling, interpolation and various filtering in recursive and nonrecursive form to provide fixed or variably delayed output video signals wherein the artifacts and distortion of the video is kept to low levels.

Abstract: A video signal mixing apparatus and a method thereof, which is capable of minimizing timing jitter caused when onsynchronized video signals are digitally mixed. A signal subtractor subtracts a second video signal synchronized with a clock signal from a first video signal which is not synchronized with the clock signal, and a weighted value extractor divides one period of the clock signal into N intervals, detects the interval where a digital selection signal is generated, among the N divided intervals, and outputs a predetermined value (where 0≦predetermined value≦1) allocated to the detected interval as a weighted value. A multiplier multiplies the weighted value with the output of the signal subtractor and outputs the multiplication result, and a signal mixer mixes the multiplication result with the second video signal and outputs the mixed result as a mixed video signal. Therefore, error causing timing jitter is reduced to 1/N, thereby minimizing dot crawling of the mixed image.

Abstract: A coded signal synchronizing device includes a first and a second signal synchronizing circuit. The first and second signal synchronizing circuits respectively feed a first and a second coded signal to a coded signal processor while synchronizing them to each other in accordance with a reference synchronizing signal. A synchronization control circuit compares the phases of frame synchronizing signals output by the decoding of the coded signals and the phase of the reference synchronizing signal. So long as a phase difference between either one of the frame synchronizing signals and the reference synchronizing signal lies in a preselected range, the synchronization control circuit reads the coded signal sequentially stored. If the phase difference is smaller than a first preselected value, the synchronization control circuit repeatedly reads an I (Intra-coded) picture two times.

Abstract: For TV broadcasting purposes encoding systems with related video encoders and audio encoders are used. The audio and video delay are aligned before multiplexing and transmitting the audio and video streams. According to a time stamping mechanism input time stamps are generated which become linked with data to be encoded, and are replaced before output by output time stamps, which are derived from the input time stamps by using a data delay constant. The input time stamps are used to control the delay of the encoding process and the output time stamps are indicating the output time. In order to allow a switchable output delay the data delay constant can be changed. Already assigned output time stamps remained unchanged. For data for which output time stamps are not already assigned, the output time stamps are calculated using the new delay constant.

Abstract: A system for dynamically determining and introducing time delay values for synchronizing different data signals. For transmitting the data signals, encoding time delay is measured in one encoder, a target encoder time delay value is determined, and the target encoder time delay value is utilized in another encoder to delay transmission of one data signal relative to the transmission of the other data signal. When encoded data signals are received and processed for presentation, the time required to decode a first data signal in a first decoder is measured, a target decoder time delay value is determined based on the time required to decode the first data signal, and the target decoder time delay value is utilized to delay presentation of a second data signal relative to the presentation of the first data signal.

Abstract: An apparatus for performing a generator locking for a video signal including a first video processing circuit for processing an input video signal, an expansion module having a second video processing circuit and a delay circuit having a delay time introduced by said second video processing circuit, a synchronizing signal separating circuit for separating a synchronizing signal from an external reference signal, and a phase-lock loop circuit for generating a reference control signal for said first video processing circuit as well as a phase comparison signal. Said phase comparison signal is fed-back to the phase-lock loop circuit by means of said delay circuit. Although the expansion module is connected to the expansion slot, a phase of a finally obtained video signal is remained in a same fixed relationship as a phase relationship when a connection board is connected to the expansion slot.

Abstract: An audio and video multiplexed transmission and/or reception system is provided, in which audio and video information are digitized, coded, multiplexed, and transmitted, and the transmitted audio and video information is demultiplexed, decoded, and converted into analog signals. The audio and video multiplexed transmission and reception system includes a coding controller for providing time control data to an audio encoder and a video encoder, and a timer for outputting time data to an audio analog-to-digital converter, a video analog-to-digital converter and the coding controller. Also, the audio and video multiplexed transmission and reception system includes an encapsulator for converting a data stream, including multiplexed video and audio signals, into a data frame, and a decapsulator for converting the data frame into a data stream.

Abstract: Disclosed are methods and apparatuses for stitching a first and second audiovisual segment together. By way of example, each audiovisual segment has a multiplicity of audio frames including a first audio frame, a second audio frame that sequentially follows the first audio frame and a last audio frame. The audiovisual segment further includes a multiplicity of video frames having a first video frame and a last video frame. The method includes the step of aligning an initial audio frame in the first audiovisual segment with the first video frame in the first audiovisual segment. The first audio frame from the first audiovisual segment is designated as the initial audio frame when a tab error associated with the first audio frame from the first audiovisual segment is less than about half a frame.

Abstract: A method and apparatus for phase-locking a plurality of display devices and multi-level driver for use therewith. Each of the display devices displays an image under the control of a distinct clock having a distinct clock rate. Each of the images contains a predetermined periodic indexing event. One of the clocks is designated as a master clock. The times of occurrence of the indexing events are compared, and the times of occurrence are caused to fall within a predetermined amount of time of one another so that each of the other clocks is phase-locked with the master clock.

Abstract: A system for playing video data ahead of corresponding audio data in order to help maintain synchronization between the audio data and the video data. Two software objects or filters are used to process the video data. An initial start time of the video data is determined and, if possible, the frame of video data is decoded or else it is selectively dropped in order to help maintain synchronization. An adaptive offset time is applied to the initial start time of a decoded frame of video data in order to produce an adjusted start time for the decoded frame. The offset time can be adapted to include a refresh offset related to sweep delays in computer monitors, a target offset which helps to build in a play-ahead margin for future late frames, and an earliness offset which is diminishing over time to help smooth transitions due to changing apparent video processing power. Additionally, the playing of video data can be slowed down in response to a low condition of the audio buffer.

Abstract: An apparatus and method for detecting a synchronizing signal in a digital TV receiver which adopts a VSB mode is disclosed. The apparatus includes a correlation unit for obtaining a correlation value between a received signal for each unit of symbols and a preset reference field synchronizing signal, a maximum value detector for detecting a location of the symbol having a maximum correlation value while performing counting operation for a unit of a variable constant added to the number of symbols corresponding to one field, a synchronizing lock signal generator for generating a synchronizing lock signal by testing reliability of the symbol location detected by the maximum value detector, and a synchronizing location controller for calculating a relative location of the symbol location having a maximum value to generate a corresponding synchronizing signal if the synchronizing lock signal is generated by the synchronizing lock signal generator.

Abstract: A method in a data processing system for locating a correct synchronization point in a data stream containing a plurality of video data packets and a plurality of audio data packets. A data stream is monitored for an audio synchronization factor within an audio data packet and for a video synchronization factor within a video data packet. In response to detecting a video synchronization factor in the video data packet, a first audio data packet from the plurality of audio data packets after the video data packet is examined to determine whether the first audio data packet contains an audio synchronization factor. In response to detecting an audio synchronization factor in the audio data packet, a data packet immediately following the audio data packet is examined to determine whether the data packet is a video data packet containing a video synchronization factor.

Abstract: An A/V signal pickup unit receives an audio digital data stream. A CPU carries out a decode process, and adds tag data indicating the attribute of audio sample data to provide the same to an audio signal converter unit. The audio signal converter unit controls the timing of the output operation of sample data according to the tag data.

Abstract: A method and system for updating clock references in a digital data stream is proposed, wherein all clock references present in the data stream are updated by means of a single system clock. A time recovery unit compares time tpcr transported in the clock reference (PCR) with the time of the system clock tclock and stamps the difference (tclock−tpcr) of the two times into the clock reference. After remultiplexing, a stamping unit reads out the time difference (tclock−tpcr) of the two times from the time stamp, subtracts it from the actual time in the system clock and stamps the value (tpcr+d) into the clock reference. Due to similarities in operation, the time recovery unit and stamping unit may share common circuitry.

Abstract: A method of generating a pulse input to a voltage controlled oscillator of a digital decoder. The decoder has a system time clock (STC) counter and a Pulse Control Register. The method of generating the pulse input starts from the output of the STC counter and the output of the Pulse Control Register. These two outputs are logically combined and latched.

Abstract: A method and apparatus for synchronizing unrelated reference signals originating from two or more sources at different locations, which signals may be in different signal formats and/or subject to different delays at the receiving station. A master generator having an absolute time input from a highly stable time source generates a master reference signal having a frequency that is a common multiple of the frequencies of the unrelated reference signals. A counter is implemented from an arbitrary initial time point and the time elapsed from the initial time point to a synchronizing event is periodically encoded into the master reference signal as time code data. A slave generator associated with each information signal is genlocked to the master reference signal, and the time code data is encoded into the slave reference outputs.

Abstract: A system and method (40) of altering the audio portion of a live television broadcast signal substantially in real time. The system is used to enhance the effects of live video insertion systems. The broadcast signal is received and separated into a pattern recognition unit (72) in order to recognize predetermined events. The broadcast audio is then altered based on the occurrence of said events. Alterations (68, 70) include modifications to attributes such as volume, tone, pitch, synchronization, echo, reverberation, and frequency profile. Once altered, the audio is re-synchronized (80) with the video channel which has undergone its own modification.

Abstract: A method and system for synchronizing modules associated with audiovisual devices, generally for use with a digital non-linear editor. A logical clock communicates information, including time and state (clock operating mode) information, to hardware and software modules through a synchronization port. The synchronization ports convert the time information into values recognizable by the module, and offset the time as needed to maintain synchronization. The state information may effect module commands for controlling audiovisual devices, such as rewind, playback and capture commands to tape players, timed such that various devices having different preparatory timing requirements are synchronized. State information, such as information indicating that a device is ready, may be returned by the modules. Video editing features such as scrubbing, looping and frame-stepping are supported by the mode information that is communicated between the clock and the synchronization ports.

Abstract: A system for phase-locking a clock to a digital audio signal embedded within a digital video signal uses an audio extractor, frequency dividers, and an adjusted bandwidth loop filter to prevent phase jitter associated with the digital audio signal preventing the functionality of the phase-lock loop or having unacceptable effects on the generated audio sample frequency signal. Extracted audio samples are divided down and input to a phase detector. The signal is then filtered using a series of loop filters, one of which has an adjusted bandwidth to reject phase jitter. A clock then outputs the generated synthesized audio sample frequency using the output from the series of loop filters, and the synthesized frequency signal is looped back through a second frequency divider to the phase detector.

Abstract: The video and audio synchronization controller sets a system clock reference (SCR) included in the frame header portion of the coded video and audio data into a system time counter to set a timing of a system time clock (STC), immediately after a video and audio reproducing device has been powered on. The video and audio reproducing device decodes and displays a first arriving video data synchronous with a display system frame pulse, which is the closest to the value of a video time stamp included in a frame header of the first video frame on the time axis of the set STC. The video and audio synchronization controller sets again the value of the time stamp included in the first video frame to the system time counter to update the STC.