Abstract: An endoscope system includes a measurement support device and an endoscope. The measurement support device includes a head emitting measurement auxiliary light, an imaging unit capturing an image of a subject on which a spot is formed by the measurement auxiliary light via an imaging optical system, and a processor measuring a position of the spot and displaying an indicator figure. The endoscope includes a memory, an insertion part and an operating part. In a case where the measurement auxiliary light is projected on a plane including an optical axis of the imaging optical system, the measurement auxiliary light has an inclination angle and crosses an angle of view of the imaging optical system. In a case where the indicator figure is displayed in a vicinity of the measured position, the indicator figure is displayed in different aspects according to measurement of the specific region is effective or not.

Abstract: Multiple image capture devices may individually generate time information and capture images. Individual image captures devices may receive time information of other image capture device(s). Individual image capture devices may transmit its time information to other image capture device(s) independent of reception of the time information of other image capture device(s). Individual image capture devices may generate time synchronization information for the captured images based on its time information and the received time information of other image capture device(s). Images captured by different image capture devices may be time-synchronized based on at least one of generated time-synchronization information.

Abstract: Multiple image capture devices may individually generate time information and capture images. Individual image captures devices may receive time information of other image capture device(s). Individual image capture devices may transmit its time information to other image capture device(s) independent of reception of the time information of other image capture device(s). Individual image capture devices may generate time synchronization information for the captured images based on its time information and the received time information of other image capture device(s). Images captured by different image capture devices may be time-synchronized based on at least one of generated time-synchronization information.

Abstract: Methods and apparatus for processing and displaying caption information associated with a video program are provided. The caption information is extracted from a video signal and different captions are rendered in sequence for different segments of the video program. A plurality of the different captions is blended in a form for simultaneous display superimposed on video images during one of the different segments of the video program. The different captions may be the latest caption corresponding to the current segment of video and a previous caption corresponding to a previous video segment. These different captions can be displayed such that they overlie each other and such that their opacity is different. In this manner, a viewer is able to have a prolonged period of time to read captions and can readily distinguish the current caption from the previous caption.

Abstract: A method for detecting motion in video fields of video data, comprises the steps of: calculating texture information for a pixel in the video fields; determining a threshold value as a function of the calculated texture information; calculating a differential value for the pixel; and detecting motion in the video fields as a function of the determined threshold value and the calculated differential value.

Abstract: Audio data and video data are processed to determine one or more audible events and visual events, respectively. Contemporaneous presentation of the video data with audio data may be synchronized based at least in part on the audible events and the visual events. Audio processing functions, such as filtering, may be initiated for audio data based at least in part on the visual events.

Abstract: Digital television channels are preemptively cached based on a modeling of a user to reduce delays while switching channels. A current television channel is selected using a first tuner. A future television channel selection of the user is then predicted based on a modeling of the user. The recorded content of the predicted future television channel is preemptively cached using a second tuner. A buffer of the recorded content of the predicted future television channel is displayed when the user switches from the current television channel to the predicted future television channel. The modeling of the user is updated and stored in storage.

Abstract: An apparatus configured to match an input frame rate of a video stream with an output frame rate of an output stream, the apparatus comprising, at least one memory buffer, an output frame generator, and a threshold measurement unit, the threshold measurement unit configured to generate a control feedback, wherein the box is configured to analyze the control feedback to monitor a state of the at least one memory buffer, the threshold measurement unit further configured analyze the control feedback to regulate between two or more different settings, wherein the two or more different settings include slowing down or speeding up the output frame, wherein the two or more different settings further include slowing down or speeding up of the line rate of the output stream.

Abstract: A method for identifying state of macro block of de-interlacing computing and an image processing apparatus are provided, the method is as follows. A video frame is divided into a plurality of regions, where each of the regions includes a plurality of macro blocks. Then, a basic threshold corresponding to each of the regions is provided according to a position of each of the regions in the video frame, and a first macro block is identified to be a first type macro block or a second type macro block according to the basic threshold corresponding to one of the regions where the first macro block of the macro blocks locates. Then, a corresponding de-interlacing computing step is performed on the first macro block according to an result that the first macro block is identified as the first type macro block or the second type macro block.

Abstract: A memory space configuration method applied in a video signal processing apparatus is provided. The method includes: arranging a first memory space and a second memory space in a memory, the first and second memory spaces being partially overlapped; determining a type of a signal source; when the signal source is a first video signal source, enabling a first processing circuit and buffering data associated with the first video signal source by using the first memory space; and, when the signal source is a second video signal source, enabling a second processing circuit and buffering data associated with the second video signal source by using the second memory space. The second processing circuit is disabled when the first processing circuit is enabled; the first processing circuit is disabled when the second processing circuit is enabled.

Abstract: A shift time monitoring section of a host terminal monitors a shift between the input timing of frame data from an imaging device and the ideal input timing for the frame data, the ideal input timing being obtained from the output frequency of a display. An operation cycle adjusting section transmits a request signal for adjusting the operation cycle per frame in the imaging device according to the magnitude of the shift in the input timing. An H-counter section of the imaging device counts the outputting of the horizontal synchronizing signal with a vertical synchronizing signal in the imaging device as a starting point, and generates a signal at a predetermined scanning line. A VSync adjusting counter section counts a pixel clock with the signal from the H-counter section as a starting point, and generates a vertical synchronization signal at a value set to the pixel clock.

Abstract: A method for converting a sink device and an apparatus for providing a content using the same are provided. The method for converting the sink device includes receiving a sink device conversion command from a first sink device, transmitting the content to a second sink device if a conversion approval of the sink device is received from the second sink device, and transmitting a control authority related to a content provision from the first sink device to the second sink device.

Abstract: A display apparatus includes a signal input unit through which an image signal is input, the image signal comprising a synchronization signal and an active signal; an adjustment signal generating unit that generates an adjustment signal; a signal processing unit that receives the adjustment signal and adjusts the image signal based on the received adjustment signal; and a controller which analyzes the input signal and controls the adjustment signal generating unit to change characteristics of the adjustment signal if the adjustment signal does not lie within a blanking interval between the synchronization signal and the active signal. With this configuration, even when an image signal having a reduced blanking interval between the synchronization signal and the active signal is input, the adjustment signal can be generated within the blanking interval of the image signal, not within the active signal interval.

Abstract: In a device for separating a synchronous signal in a video signal, a capacitor receives the video signal to obtain a coupling signal, a level determining circuit receives the coupling signal and compares a voltage level of the coupling signal with a number of reference voltages. The reference voltages define several reference voltage ranges, one of which is a predetermined reference voltage range. The level determining circuit outputs an adjusting signal according to a reference voltage range corresponding to a minimum voltage level of the coupling signal within a predetermined time period. A level adjusting circuit has several current sources for receiving the adjusting signal and thus controls the current sources to adjust a DC level of the coupling signal. A synchronous signal separating circuit separates the synchronous signal from the coupling signal when the minimum voltage level of the coupling signal is substantially within the predetermined reference voltage range.

Abstract: A synchronizing signal control circuit includes: a phase detecting section configured to detect a phase difference between a display synchronizing signal and an input synchronizing signal; an adding section configured to add a set value for setting a synchronization compensation period and the detected phase difference; a synchronization phase correcting section configured to correct the phase of the input synchronizing signal on the basis of the output signal of the adding section; a gate signal generating section configured to generate a gate signal representing the synchronization compensation period based on the display synchronizing signal; a synchronization determining section configured to determine whether the synchronization can be effected, by detecting whether the input synchronizing signal exists within the synchronization compensation period; and a selecting section configured to perform switching to the corrected input synchronizing signal on the basis of the determination result of the synchron

Abstract: Systems and methods that facilitate the elimination of interference of an IR signal emitted from an IR blaster by the IR signal emitted from a remote control unit. In a preferred embodiment in which an AV device coupled to a television receives IR signals repeated and transmitted by the television over an IR blaster cable, a right hand polarizer lens is positioned on the front of the remote control unit in front of the IR emitter and a left hand polarizer lens is positioned on the AV device in front of its IR detector. In operation, the IR beam emitted from the remote control unit is right hand polarized and is blocked by the left hand polarizer lens. The IR beam emitted from the IR blaster is randomly polarized and passes through the left hand polarizer lens with only a slight attenuation.

Abstract: A signal generator for use in producing a video top-of-frame signal based upon an input video signal with an input video frame including one or more input video fields and having an input video frame rate for an output video signal with an output video frame having a plurality of output video frame lines, each with a plurality of output video pixels, and an output video frame rate.

Abstract: A video synchronization signal generating circuit includes a sample and hold circuit, a voltage divider and an amplifier. The voltage divider produces an adaptive voltage level based at least in part on an output of the sample and hold circuit. The amplifier, which receives a video signal, is connectable by switches in different configurations. In a first configuration the amplifier acts as a comparator to compare the adaptive voltage level with the video signal. An output of the amplifier in the first configuration is an output of the video synchronization signal generating circuit. In a second configuration the amplifier forms part of the sample and hold circuit.

Abstract: An integrated video clock signal generator in which a master phase-locked loop (PLL) control circuit uses an off-chip voltage-controlled oscillator (VCO) to produce an on-chip oscillator signal in synchronization with a horizontal reference signal related to a horizontal video synchronization signal. This on-chip oscillator signal drives one or more slave PLL circuits which provide respective one or more on-chip PLL signals synchronized with the on-chip oscillator signal. In accordance with a preferred embodiment, each on-chip PLL signal is a pixel clock signal with a plurality of clock signal pulses which is synchronized with a vertical reference signal related to a vertical video synchronization signal.

Abstract: A horizontal register transfer pulse generator includes: phase adjuster generating an output signal, from reference signal; and horizontal blanking period generator based on output signal, reference signal, and horizontal blanking pulse, wherein horizontal blanking period generator includes: delay masking pulse generator generating delay masking pulse delayed by predetermined phase relative to masking pulse generated on horizontal blanking pulse inputted into horizontal blanking period generator; and determination means determining phase difference between output signal and reference signal, when phase difference between output signal and reference signal is less than predetermined phase, horizontal blanking period generator combines masking pulse with output signal to generate horizontal register transfer pulse with horizontal blanking period, and when phase difference between output signal and reference signal is equal to or greater than predetermined phase, horizontal blanking period generator combines del

Abstract: A method for synchronizing the recordings of two video cameras which are operated in parallel for the three-dimensional representation of an image sequence includes fading a light signal into the image area of the two cameras and simultaneously recording the light signal by both cameras. Playback of the recordings are synchronized using the recorded signals. The two video cameras may be two digitally recording video recorders.

Abstract: A multiplexer 106 conducts time division multiplexing on various data trains input from a digital broadcast reception tuner 103 and various interfaces 104 and 105 while adding packet arrival time correction information. A demultiplexer 109 demultiplexes time division multiplexed data multiplexed by the multiplexer 106, corrects packet arrival time on the basis of the packet arrival time correction information. A PCR correction section 110 corrects a system clock on the basis of the packet arrival time correction information added by the multiplexer 106. As a result, it becomes possible to transfer an MPEG2 stream and other data in concurrent while maintaining program synchronization.

Abstract: A circuit for generating video synchronization timing signals includes a negative peak detector (FIG. 5) for following variations of a composite video signal (FIG. 1), rather than clamping the most negative voltage of the composite video signal. The negative peak detector provides a voltage level VTIP representative of the voltage at the synchronization tip of the composite video signal. A sample and hold circuit (700,702,704) is used to add an offset VSLICE to VTIP, VSLICE being a voltage level of the breezeway, color burst, or back porch segments of the composite video signal, or a combination of these segments.

Abstract: A circuit for generating video synchronization timing signals includes a negative peak detector (FIG. 5) for following variations of a composite video signal (FIG. 1), rather than clamping the most negative voltage of the composite video signal. The negative peak detector provides a voltage level VTIP representative of the voltage at the synchronization tip of the composite video signal. A sample and hold circuit (700, 702, 704) is used to add an offset VSLICE to VTIP, VSLICE being a voltage level of the breezeway, color burst, or back porch segments of the composite video signal, or a combination of these segments. The sample and hold circuit generates a signal VREF, and is connected by a resistor divider (708,710) to the negative peak detector to form the signal VTIP+VSLICE provided to an amplifier (606) functioning as a comparator. The signal VSLICE+VTIP is compared in comparator (606) with the composite video signal to provide an overall circuit output.

Abstract: The present invention has multiple AV/S terminals, an RF modulator, a S/AV signal converter and multiple switches. The switches connect the AV/S terminals with the RF outputs to allow the AV/S signal from the special AV/S terminal input into the RF modulator to be converted to an RF-signal input to the ANT terminal of the TV. Besides, the present invention further has an ANT input with an electronic switch and a detecting unit having a driver, which decides whether the electronic switch turns on. If the detecting unit detects no AV-signal or S-signal input from the AV/S terminals, the detecting unit first cuts off the power to the RF modulator and then makes the electronic switch turn on. The RF-signal from the ANT input is output to the RF output.

Abstract: A system includes a digital phase lock loop (PLL) constructed from an all digital circuit implementation and standard cell construction. The digital PLL includes a digital frequency synthesizer and a digital phase detector. The digital frequency synthesizer includes a digital DLL including a plurality of delay chains, each of the delay chains including at least one digitally programmable delay element for configuring the plurality of delay chains to achieve a phase lock with an input reference signal.

Abstract: A circuit for generating video synchronization timing signals includes a negative peak detector (FIG. 5) for following variations of a composite video signal (FIG. 1), rather than clamping the most negative voltage of the composite video signal. The negative peak detector provides a voltage level VTIP representative of the voltage at the synchronization tip of the composite video signal. A sample and hold circuit (700, 702, 704) is used to add an offset VSLICE to VTIP, VSLICE being a voltage level of the breezeway, color burst, or back porch segments of the composite video signal, or a combination of these segments. The sample and hold circuit generates a signal VREF, and is connected by a resistor divider (708,710) to the negative peak detector to form the signal VTIP+VSLICE provided to an amplifier (606) functioning as a comparator. The signal VSLICE+VTIP is compared in comparator (606) with the composite video signal to provide an overall circuit output.

Abstract: The present invention relate to method and apparatus for processing a video signal to decode data previously encoded into the video signal. One aspect of the invention relates to a method for detecting a first line of a data sequence encoded in a digital video signal by scanning a digital video signal by line to look for an intelligent signal detect word. If the detect word is not found, a counter is incremented. Scanning continues until the intelligent signal detect word is found, and once found flagging that line as a first data line. Another aspect of the invention is a decoding apparatus that searches the plurality of horizontal scan lines in a video signal for the presence of a data start key, and when such a data start key is found, the line containing the data start key is identified as the first line of the encoded data.

Abstract: In the remote control device a receiver receives a signal corresponding to a command issued from a remote controller group to a control object appliance. A command string analyzing section registers in a database in a nonvolatile memory a plurality of commands received by the receiver as a command string. When a command is issued from the remote controller group, then a command issuing section retrieves a command string containing this command from the database, estimates the issued command based on the retrieval result, and issues the command. A transmitter transmits the issued command to the control object appliance as a command signal.

Abstract: An electronic camera and method of operating an electronic camera which detects whether an external device such as a personal computer is properly connected to the camera and in a state which permits communication. The camera monitors a data terminal ready (DTR) signal of an RS-232 connection in order to determine that the external device is properly connected and in a state which permits communication. Once the proper connection is detected, the camera can either transmit or receive images and/or audio from the external device. Accordingly, a specific switch which places the camera in a communication mode can be eliminated. Further, a single switch may be utilized for both controlling whether the camera records or plays images when there is no device connected, and which controls whether the camera transmits or receives images and/or audio when an external device is determined to be connected.

Abstract: A multimedia computer and television apparatus (10) includes a dual mode monitor portion (20) adapted to display either or both a TV broadcast signal or computer (data) signal, connected to a computer portion (30) configured for both Internet access and television broadcast reception, and a remote control portion (40) adapted to control the computer portion (30) and monitor portion (20).

Abstract: A sync signal generator with a signal discriminator comprising an input terminal supplied with a fist signal or a second signal of a higher frequency; a clock signal generating circuit; a first counter reset by the first or second signal received from an input terminal, and caused to halt counting the clock signal when the count thereof has reached a predetermined value MC4; a first detector for outputting a detection signal relative to the first or second signal during the counting action of the first counter; a second counter reset when the count of the first counter has reached a predetermined value MC1, and caused to halt counting the clock signal when the count of the first counter has reached a predetermined value MC2 (MC2<MC4), and to output a detection signal (SMAX) when the count thereof has reached another predetermined value SC1 (SC1<MC2); a second detector for outputting a detection signal relative to the second signal in response to the detection signal (SMAX) from the second counter; and a

Abstract: A method and video camera for generating time varying video images. A first capture signal is received from a video processing system by a video camera, which captures a first set of one or more video frames in response to the first capture signal and transmits the first set of one or more video frames to the video processing system.

Abstract: To interface a video/graphic controller, which produces conventional, ana video output signals, suitable mostly for CRT type displays, to a matrix display, one of the video output signals, for example the horizontal sync signal, is encoded with the clock frequency and phase information used in generating the original video output signals. The encoded information is decoded at the display end, by extracting from it the clock information and synthesizing a clock signal which has the identical frequency and phase as the original clock used at the video/graphic controller. The replicated clock signal is used as a clock input to the matrix display, to assure that the video output signals are displayed at the correct pixel locations of the matrix display, preventing picture jitter and/or loss of video/graphics data.

Abstract: A system for synthesizing an image signal for a main scene with a plurality of image signals from image pickup devices for taking inset scenes displays the inset scenes over the main scene on a single screen. The system forms a signal representative of a drive timing for a TV inset scene camera, from a synchronizing signal in an image signal for one main scene. The TV inset scene camera is actuated by the drive timing to provide an inset scene image signal synchronizing with the synchronizing signal of the main scene. The drive timing serves to switch the main scene image signal and the inset scene image signal from one to another to synthesize another image signal. If a plurality of image pickup devices are provided remotely from each other, these image pickup devices are connected with each other through a communication line.

Abstract: A timing logic system which includes a generic television-standard timing generator selectably provides precisely timed horizontal and vertical control signals for controlling the operation of a high resolution charge coupled device (CCD) image sensor of the type having two line pixel registers in a high resolution mode of picture imaging. Alternatively, the timing logic system selectably provides precisely timed horizontal and vertical control signals, and a precisely timed display field control signal applied to a switch mechanism, for controlling the operation of the high resolution CCD image sensor in a television resolution mode of picture imaging in accordance with a television standard, for example, the NTSC standard. The timing logic system also provides sync and control signals to a television-standard display in the television mode of operation.

Abstract: A video camera in which an output signal from a solid-state image sensor is converted into the corresponding digital signal at the horizontal reading cycle of the output signal, and the digital signal is digital-processed with a first predetermined clock (fs) synchronous with the reading cycle to provide a luminance signal and a color difference signal.

Abstract: Apparatus and a method for formatting executable codes and data, defining interactive applications, with video and audio program material, for reliable and convenient access includes compressing (18, 21) audio and video programs according to a protocol such as MPEG. The compressed audio and video (A/V) programs are formed (19, 22) into transport packets. Interactive application programs associated with A/V programs are compiled (10) into functional modules, condensed and formed into transport packets. A module may be executable software or data. Further modules designated "Signal modules", are generated to condition respective receivers to suspend or resume execution of an interactive application. Video packets, audio packets and application packets are time division multiplexed (16) for transmission. Signal modules are multiplexed in the packet stream to appropriately reprogram respective receivers on the occurrence of such changes in received signal components.

Abstract: An audio-visual dummy including a rigid anthropomorphic structure with, instead of a head, a monitor for delivering an audiovisual message. The monitor is connected to a message reader system. The rigid structures can be placed on a base. The base includes a storage space. The power cords to the monitor are positioned in the lower part of the monitor so as to be concealed from observers. The rigid structure is made of a plastic or resinous material.

Abstract: An image signal processing device for processing an image signal is arranged to temporarily store the image signal inputted and a reference signal generated, and, after that, to read out the signals stored. This arrangement enables the signal processing device to accurately add the reference signal to the image signal without deteriorating the reference signal.

Abstract: Apparatus and method for controlling a charge coupled device (CCD) image sensor provides, in accordance with a television standard, horizontal and vertical CCD control signals to obtain a purely sequential mode of operation on the one hand, and alternatively a modified mode of operation to permit image signals to be viewed directly on a standard viewfinder display. The apparatus includes a frequency generator, a standard timing generator, a pixel clock generator, and a small number of additional timers and logic units which are driven by signals from the generators to selectably generate the vertical and horizontal CCD control signals for the alternate modes of operation. The method includes generating a plurality of precisely timed pulses referenced to television standard synchronizing and control signals, and logically combining these pulses and standard signals to generate the vertical and horizontal CCD control signals.

Abstract: A horizontal synchronization circuit uses a standard decoder to generate a stable first signal locked in frequency and phase to horizontal synchronizing pulses in a composite video signal. A waveshaping circuit reshapes the first signal to generate a second signal for input to a synchronizing circuit. The synchronizing circuit generates a higher-frequency third signal. A timing generator divides the frequency of the third signal to generate a fourth signal having the same frequency as the first and second signals, and a fifth signal having a higher frequency. The fourth signal is fed back to the synchronizing circuit, and can also be used for synchronization of video signal processing. The fifth signal can be used for horizontal scanning at a rate higher than the standard horizontal frequency.