Memory Patents (Class 348/567)
  • Patent number: 7626637
    Abstract: An apparatus for capturing full-screen frames, which are displayed by a display unit having a first display buffer and a second display buffer, in real time. The display unit selects one of the first and second display buffers as a front buffer for displaying the full-screen frames. The apparatus includes a capture unit, and a display driver unit for driving the display unit. When data in the front buffer is updated, the display driver unit generates image data and saves the image data in a temporary buffer. Then, the display driver unit copies the image data to a share buffer. The capture unit reads the image data from the share buffer and generates a video bitstream accordingly.
    Type: Grant
    Filed: February 22, 2006
    Date of Patent: December 1, 2009
    Assignee: Asustek Computer Inc.
    Inventors: Kao-Yi Chiu, Yu-Hsuan Lai
  • Patent number: 7583324
    Abstract: A video processing method utilized in a video data processing device for processing video data is disclosed. The video data includes at least a first video data set, and the video data processing device has a memory and a video decoder. The method includes utilizing the video decoder to decode the video data for generating a display data set, driving the video decoder to select a specific video data set from the first video data set wherein the display data set does not have display data corresponding to the specific video data set, and utilizing the memory to store the display data.
    Type: Grant
    Filed: August 17, 2005
    Date of Patent: September 1, 2009
    Assignee: Realtek Semiconductor Corp.
    Inventors: Ming-Jane Hsieh, Yi-Shu Chang, Te-Ming Kuo, Shi-Wei Chen
  • Patent number: 7573938
    Abstract: Methods and apparatus for implementing a reduced cost HDTV/SDTV video decoder are disclosed. The described joint video decoder is capable of decoding HDTV pictures at approximately the resolution of standard definition television pictures and can be used to decode HDTV and/or SDTV pictures. The described video decoder may be used as part of a picture-in-picture decoder circuit for providing picture-in-picture capability without providing multiple full resolution video decoders. The reduction in decoder circuit complexity is achieved through the use of a plurality of data reduction techniques including the use of a preparser, downsampling, and truncating pixel values.
    Type: Grant
    Filed: August 15, 2007
    Date of Patent: August 11, 2009
    Assignee: Hitachi America, Ltd.
    Inventors: Jill MacDonald Boyce, Larry Pearlstein
  • Patent number: 7532253
    Abstract: We describe and claim television channel change picture-in-picture circuit and method. The circuit includes means for displaying a first channel on a primary portion of a screen, means for changing from the first channel to a second channel, and means for displaying the second channel on a secondary portion of the screen responsive to the means for changing from the first to the second channel while continuing to display the first channel on the primary portion of the screen.
    Type: Grant
    Filed: July 26, 2005
    Date of Patent: May 12, 2009
    Assignee: Pixelworks, Inc.
    Inventor: Robert Y. Greenberg
  • Patent number: 7528889
    Abstract: A system and method for displaying frames with dynamically changing display parameters is described herein. The display engine stores new display parameters detected by the decoder in one buffer of a ping pong buffer, while continuing to use another set of display parameters stored in the other ping pong buffer. The display engine switches the buffers when the first frame for which the new display parameters are applicable is to be presented.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: May 5, 2009
    Assignee: Broadcom Corporation
    Inventors: Sandeep Bhatia, Srilakshmi D, Srinivasa Mpr, Mahadhevan Sivagupnaman
  • Patent number: 7526186
    Abstract: A method for scaling subpicture data comprises receiving a video data stream and a subpicture data stream; pre-parsing the subpicture data stream to obtain line information of subpicture data, the subpicture data containing both top field pixel data and bottom field pixel data; calculating the number of lines contained in the top field pixel data and the bottom field pixel data from the pre-parsed line information; interlacing the top field pixel data and the bottom field pixel data; scaling the top and bottom field pixel data together in interlaced form for adjusting the number of lines contained in the top field pixel data and the bottom field pixel data; separating the scaled pixel data into updated top field pixel data and updated bottom field pixel data; and separately storing the updated top field pixel data and the updated bottom field pixel data in a memory.
    Type: Grant
    Filed: April 13, 2005
    Date of Patent: April 28, 2009
    Assignee: Mediatek Incorporation
    Inventor: Yu-Ching Hsieh
  • Patent number: 7505081
    Abstract: A system and method permits time-shifting or recording for any tuner input, regardless of whether the tuner input is being used for POP (or PIP) or main viewing window. This allows POP (or PIP) video modes and recording to an external recording device to be carried out simultaneously. In one example system and method, a switch is controlled in accordance with a control program of the television to dynamically select which inputs are routed to the main and sub viewing windows.
    Type: Grant
    Filed: May 17, 2005
    Date of Patent: March 17, 2009
    Assignee: Toshiba America Consumer Products, L.L.C.
    Inventor: Matthew A. Eshleman
  • Patent number: 7483037
    Abstract: A system which utilizes the processing capabilities of the graphics processing unit (GPU) in the graphics controller. Each frame of each video stream is decoded. After decoding the compressed image is separated into an image representing the luminance and an image representing the chroma. The chroma image is resampled as appropriate using the GPU to provide chroma values corresponding to each luminance value at the proper locations. The resampled chroma image and the luminance image are properly combined to produce a 4:4:4 image, preferably in the RGB color space, and provided to the frame buffer for final display. Each of these operations is done in real time for each frame of the video.
    Type: Grant
    Filed: October 27, 2005
    Date of Patent: January 27, 2009
    Assignee: Apple, Inc.
    Inventor: Sean Matthew Gies
  • Patent number: 7460135
    Abstract: In a method and system for controlling rotation of a color image stored as sub-sampled image data in a memory, a controller includes a finite state machine (FSM) operable to fetch the sub-sampled image data and provide the sub-sampled data as a plurality of pixels to form the color image having a predefined angle of rotation. The FSM provides a predefined address of sub-sampled image data describing the color image stored in the memory to an addressing unit. The addressing unit is operable to read twice the sub-sampled image data located at the predefined address. A memory device is operable to push each read instance of the sub-sampled image data. A pipeline controlled by the FSM is operable to pull and selectively read the sub-sampled image data from the memory device for generating the plurality of pixels.
    Type: Grant
    Filed: April 10, 2006
    Date of Patent: December 2, 2008
    Assignee: Texas Instruments Incorporated
    Inventors: Thomas Joseph Shepherd, Donald Richard Tillery, Jr., Nishanth Rajan
  • Publication number: 20080170156
    Abstract: A digital broadcasting apparatus and a method for providing a service thereof are provided. In the digital broadcasting apparatus, a storage unit stores a designated target mode between a picture in picture (PIP) mode and an application mode running a downloaded application program, an embodiment unit provides a PIP function corresponding to the PIP mode and an application function corresponding to the application mode, and a control unit controls the embodiment unit to provide at least any one of the application function and the PIP function, based on the stored target mode, when the PIP function is activated at present.
    Type: Application
    Filed: July 9, 2007
    Publication date: July 17, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventor: Mun-seok KIM
  • Patent number: 7385649
    Abstract: In a video display apparatus and method, video data of video being displayed on a display unit are sequentially updated and temporality stored in a storage unit. The video data stored in the storage unit is written into an external storage medium according to a first external operation, and is read from the external storage medium according to a second external operation. Video based on the video data read from the external storage medium is displayed on the display unit.
    Type: Grant
    Filed: April 14, 2004
    Date of Patent: June 10, 2008
    Assignee: Sony Corporation
    Inventor: Akihiro Yamada
  • Patent number: 7362337
    Abstract: A method for transforming an original image to a new image is provided. The original image includes M rows of original data; the new image includes Q rows of new data. The method first generates a (2i?1)th row and a (2i)th row of intermediate data respectively based on the (2i?1)th row and the (2i)th row of original data. Then, the method generates a (2i+1)th row and a (2i+2)th row of intermediate data respectively based on the (2i+1)th row and the (2i+2)th row of original data. During the process of generating the (2i+1)th row of intermediate data, the (2j?1)th row of new data is simultaneously generated based on the (2i?1)th row and the (2i+1)th row of intermediate data. During the process of generating the (2i+2)th row of intermediate data, the (2j)th row of new data is simultaneously generated based on the (2i)th row and the (2i+2)th row of intermediate data.
    Type: Grant
    Filed: March 30, 2006
    Date of Patent: April 22, 2008
    Assignee: Ali Corporation
    Inventor: Fu-Chung Chi
  • Patent number: 7324161
    Abstract: A display apparatus having a display main body including a screen and a rear cover formed with an accommodation space between the screen and the rear cover, and a supporting part supporting the display main body, further comprising: a display processor receiving data pertaining to a display and displaying the received data on the screen; an input unit specifying a popup time of a popup window including an executer performing functions requested by a user; a timer measuring a time to notify the popup time specified by and transferred from the input unit; and a controller controlling the display processor to display the popup window on the screen upon receiving the signal notifying the popup time by the timer.
    Type: Grant
    Filed: March 8, 2004
    Date of Patent: January 29, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Soon-hoon Hwang
  • Patent number: 7321371
    Abstract: The data conversion device of the present invention includes: a coding section for replacing (i) one or more components constituting the display data of each pixel and other one or more components constituting display data of a pixel existing around that pixel on a screen with (ii) one or more average values of both the components so as to reduce an amount of data; and a decoding section for reading out compressed data from a frame memory and then allotting the average value as display data for each corresponding pixel. Therefore, unlike a case of adopting a conventional general data compression method, the data conversion device of the present invention can prevent deviation between original display data and display data obtained by a compression/restoration process from becoming large.
    Type: Grant
    Filed: July 7, 2005
    Date of Patent: January 22, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Daiichi Sawabe
  • Patent number: 7307667
    Abstract: A method and an apparatus for an integrated high definition television controller are described. The integrated high definition digital television controller includes two or more the following functions in a single chip: MPEG2 Transport, Audio and Video Decoders, Video input capture and converter, flexible video scan rate converter, de-interlace processor, display controller and video D/A converters, graphics controller, a unified local bus, N-plane alpha blending, a warping engine, audio digital signal processor, disk drive interface, peripheral bus interfaces, such as PCI bus and local bus interfaces, various I/O peripherals, a bus bridge with a partitioned chip, and a CPU with caches. The integrated controller, in one embodiment, is designed to handle multiple television standards (for example ATSC, ARIB, DVB, AES, SMPTE, ITU) and designed to be deployed in various countries in the world.
    Type: Grant
    Filed: June 28, 2004
    Date of Patent: December 11, 2007
    Assignee: Zoran Corporation
    Inventors: Gerard Yeh, David Auld, Jackson F. Lee, Joseph Cesana, Hsiang O-Yang, Xianliang Zha, Zeljko Markovic
  • Patent number: 7307669
    Abstract: A system and method for displaying frames with dynamically changing display parameters is described herein. The display engine stores new display parameters detected by the decoder in one buffer of a ping pong buffer, while continuing to use another set of display parameters stored in the other ping pong buffer. The display engine switches the buffers when the first frame for which the new display parameters are applicable is to be presented.
    Type: Grant
    Filed: June 24, 2003
    Date of Patent: December 11, 2007
    Assignee: Broadcom Corporation
    Inventors: Sandeep Bhatia, Srilakshmi Dorarajulu, Srinivasa MPR, Mahadhevan Sivagururaman
  • Patent number: 7242438
    Abstract: An image displayer with a facilitated channel setting process, in which the channels are set based on a pre-stored channel information. The image displayer includes a channel information storing unit for storing the channel information, an OSD (On Screen Display) processing unit for displaying an OSD menu which is configured based on the channel information stored in the channel information storing unit, and a controlling unit for looking up menu items displayed in the OSD menu and updating the channel information stored in the channel information storing unit based on a changed channel information. According to the image displayer, since the channel setting based on the ATM (Auto Tuning Management) table is completed by simply selecting desired broadcasting channels in the OSD menu, the process of setting the channels can be simplified.
    Type: Grant
    Filed: October 1, 2003
    Date of Patent: July 10, 2007
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hyun-chul Song
  • Patent number: 7142252
    Abstract: An apparatus and method for implementing picture-in-picture with frame rate conversion includes an input buffer unit, a data synchronizing unit, first through third memories, and a memory control unit. The input buffer unit buffers input data and outputs buffered data as first data and first data enabling signals. The data synchronizing unit synchronizes the first data output with an output clock signal and outputs synchronized data as second data and second data enabling signals. The first memory multiplexes the second data and outputs stored data in response to a first memory enabling signal. The second memory writes and reads data output from the first memory in response to a frame buffer control signal. The third memory outputs stored data as a display signal. The memory control unit controls data flow between the memories and frame rates of the input data.
    Type: Grant
    Filed: January 10, 2002
    Date of Patent: November 28, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Suk-beom Song
  • Patent number: 7106384
    Abstract: The invention relates to a method and a device for simultaneously representing at least a first and a second sequence of pictures (M, S) in an overall picture. The inventive method is characterised in that picture data belonging to a picture of the first sequence of pictures (M) is stored in the form of a first picture data signal in a first picture memory (SPM). Picture data belonging to a picture of the second sequence of pictures (S) is stored in the form of a second picture data signal in a second picture memory (SPS). The picture data of the first and second picture data memory is read out according to a periodic screen signal (RS), whereby phase shift (SHIFTM, SHIFTS, tx) of the screen signal (RS) can be adjusted according to the first and/or second picture data signal.
    Type: Grant
    Filed: February 1, 2000
    Date of Patent: September 12, 2006
    Assignee: Micronas GmbH
    Inventor: Günter Scheffler
  • Patent number: 7057669
    Abstract: A language displaying apparatus for a digital TV and a method for the same notices all kinds of languages included in broadcasting signals and enables a user to recognize them and select the preferable language easily and accurately. To achieve this, the method according to the present invention comprises the steps of abstracting and storing all kinds of languages included in broadcasting signals, displaying the stored kinds of languages or outputting in the form of an audio and outputting the audio signals corresponding to the language selected by the user among the kinds of languages.
    Type: Grant
    Filed: October 9, 2001
    Date of Patent: June 6, 2006
    Assignee: LG Electronics Inc.
    Inventor: Hwal Rim Lee
  • Patent number: 7034891
    Abstract: An interfacing method and system for a stream source apparatus and a display device, which includes a stream source apparatus receiving analog/digital signals from external analog/digital equipments to generate a plurality of transmission packet streams corresponding to the analog/digital signals, the stream source apparatus synthesizing a plurality of the transmission packet streams into a single synthesized transmission packet stream to transmit the synthesized transmission packet stream by wireless, a display apparatus receiving the synthesized transmission packet stream transmitted from the stream source apparatus, the display apparatus separating the synthesized transmission packet stream into a transmission packet stream corresponding to a main screen and a transmission packet stream corresponding to a sub-screen, the display apparatus decoding the transmission packet streams corresponding to the main screen and the sub-screen respectively to generate digital video/audio signals to display on a display
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: April 25, 2006
    Assignee: LG Electronics Inc.
    Inventors: Chul Yong Joung, Yong Ho Cho, Nam Seok Cho
  • Patent number: 6975324
    Abstract: A video and graphics system includes a data transport processor for receiving compressed data streams, a video transport processor for extracting video data, and an audio decode processor for extracting audio data. The data transport processor provides PCRs to the video transport processor and the audio decode processor. The video transport-processor stores the video data in external memory and generates a start code table to index the video data stored the external memory. In the start code table SLICEs of the video data are aligned to a suitable boundary. The compressed data streams may include MPEG Transport streams, and the video data may include SDTV or HDTV data. The video and graphics system may be implemented on an integrated circuit chip.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: December 13, 2005
    Assignee: Broadcom Corporation
    Inventors: Ramanujan K. Valmiki, Sandeep Bhatia
  • Patent number: 6943845
    Abstract: A technology is disclosed to enable a transfer to be made quickly and easily to a screen layout and an audio output mode preferred by a user when there is a change in an input source. Past viewing and listening history information regarding the attribute and the output state of an input source is stored beforehand, for example, which input source was viewed and listened to in what screen and audio structure, or which multi-window displaying a transfer was made to when an interrupt input source came in, depending on a relationship with a video being viewed and listened to at the time. Then, when an image regarding the input source is displayed, a screen layout and an audio output state are determined, and controlled based on the viewing and listening history information.
    Type: Grant
    Filed: December 14, 2001
    Date of Patent: September 13, 2005
    Assignee: Canon Kabushiki Kaisha
    Inventors: Atsushi Mizutome, Akio Saito, Tomoyuki Ohno
  • Patent number: 6873370
    Abstract: A method and a circuit arrangement for picture-in-picture insertion are described, in which, in order to prevent a write operation from being overtaken by a read operation and also to avoid the associated picture disturbances, a field is stored under an address which precedes a previous field by a number of N lines. A read address is then shifted to the same line of the older field in the event of a minimum distance to a write address being undershot.
    Type: Grant
    Filed: April 3, 2000
    Date of Patent: March 29, 2005
    Assignee: Infineon Technologies AG
    Inventors: Maik Brett, Marko Hahn
  • Patent number: 6870572
    Abstract: A method for picture-in-picture insertion is described, which is distinguished in particular by the fact that the inset pictures are written to a memory device (2) in a circulating manner under continuously incremented write addresses, the first and last address of each written-in inset picture is stored, an overtake signal is formed by comparing the instantaneous address with the previously stored address, said signal indicating whether a previous address has been reached again and, consequently, the corresponding picture content has been overwritten, by evaluation of the overtake signal, the current or preceding segment is selected for read-out depending on whether or not overtaking took place before the start of the read-out, and the inset picture stored in the selected segment is read out with continuously incremented read addresses and is inserted into the main picture. A corresponding circuit arrangement is also described.
    Type: Grant
    Filed: March 3, 2000
    Date of Patent: March 22, 2005
    Assignee: Infineon Technologies AG
    Inventors: Maik Brett, Marko Hahn
  • Patent number: 6850286
    Abstract: A control device (32; 35) for controlling at least a first receiving device (1) so as to achieve that television channel information (FKI) stored in correlation with program position information (PPI) is stored in a second receiving device (2; 33), includes an encoding stage (29; 38) for encoding program position information (PPI) applied to the encoding stage (29; 38) and for supplying a corresponding control signal (SS1, SS2), and a transmitting stage (30) for transmitting the control signal (SS1, SS2) to the first receiving device (1) so as to achieve that a television signal (FS1) is supplied from the first receiving device (1) to the second receiving device (2; 33), the television signal (FS1) being identified by television channel information (FKI) stored in the first receiving device (1) in correlation with this program position information (PPI), expiry control means (31; 41) being provided, which are adapted to supply further program position information (PPI) in an ascending or descending order afte
    Type: Grant
    Filed: December 20, 2000
    Date of Patent: February 1, 2005
    Assignee: Koninklijke Philips Electronics N.V.
    Inventor: Berndt Burghard
  • Patent number: 6845182
    Abstract: A CPU detects the available space A of a first recording medium, the available space B of a second recording medium and a preprogrammed image information amount C necessary for preprogrammed recording by first and second recording medium space managing portions and the contents of preprogrammed recording input from an operation portion by the user. When the preprogrammed image information amount C is larger than the available space A of the first recording medium, an amount of shortage in recording space for preprogrammed information D is obtained from the CPU by subtracting the available space A of the first recording medium from the preprogrammed image information amount C. A larger amount of image information than the recording space shortage D is selected from the image information stored on the first recording medium, and the selected image information is moved to the second recording medium.
    Type: Grant
    Filed: November 12, 2001
    Date of Patent: January 18, 2005
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Toshihisa Matsuo
  • Patent number: 6768496
    Abstract: In a system and a method for generating an image that contains superimposed or fused image data, a first system acquires an image dataset from a subject and a second system obtains a video image of the subject. The positions of the first, the second systems in the acquisition of the image datasets are determined with the an arrangement for position determination, such as a navigation system, with reference to which the position of the image dataset acquired with the first system and the position of the video image dataset can be determined in space, so that the two image datasets can be superimposed or fused with one another. An arrangement also can be provided for generating a video image expanded with image data of the image dataset acquired with the first system.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: July 27, 2004
    Assignee: Siemens Aktiengesellschaft
    Inventors: Johannes Bieger, Rainer Graumann, Norbert Rahn
  • Patent number: 6747656
    Abstract: An image processing apparatus and method, and a display apparatus capable of preventing field tearing caused by memory overrun even when performing a read operation and a write operation of input/output images with respect to a single image memory, wherein a system microcomputer (MC) is used for generating and supplying output delay data for delaying an image output timing based on the write speed to the image memory, the read speed from the image memory, and the read area so that the timing of access to the read end address address and the timing for performing a write operation to the same address match and of a scan converter for receiving the output delay data supplied by the system MC and delaying the image output timing so that the timing of access to the read end address and the timing for performing a write operation to the same address match.
    Type: Grant
    Filed: April 4, 2001
    Date of Patent: June 8, 2004
    Assignee: Sony Corporation
    Inventor: Shinichi Matsushita
  • Patent number: 6741294
    Abstract: A digital signal processing apparatus for parallel executing a plurality of data processes with a single common command is disclosed, that comprises a plurality of input storing means, each of which is composed of a plurality of storing elements, an input controlling means for controlling the input storing means, a calculating means, having a plurality of element calculating means corresponding to the plurality of the storing elements of the input storing means, for parallel calculating data stored in each storing element of the input storing means, a data storing means, having a plurality of storing elements corresponding to the plurality of element calculating means of the calculating means, for storing calculated result data of the element calculating means corresponding to the storing elements, a plurality of output storing means, each of which is composed of a plurality of storing elements corresponding to the plurality of element calculating means of the calculating means, for storing the calculated res
    Type: Grant
    Filed: August 6, 1999
    Date of Patent: May 25, 2004
    Assignee: Sony Corporation
    Inventor: Takashi Izawa
  • Patent number: 6697124
    Abstract: In a television receiver having Picture-In-Picture (PIP), a controller analyzes the content of a video signal forming a main picture, and automatically adjusts the size and position of a PIP image to correspond to regions of the main picture exhibiting the least amount of motion, texture, and/or a repeating texture. The controller also prevents the PIP image from being positioned over text or faces or other important objects in the main picture.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: February 24, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Nevenka Dimitrova, Angel Janevski
  • Patent number: 6697123
    Abstract: In a television receiver having Picture-In-Picture (PIP), a controller analyzes the content of an auxiliary video signal forming a PIP image, and automatically adjusts the shape and transparency of the PIP image in accordance with the content of the auxiliary video signal.
    Type: Grant
    Filed: March 30, 2001
    Date of Patent: February 24, 2004
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Angel Janevski, Nevenka Dimitrova
  • Patent number: 6680754
    Abstract: A digital broadcasting receiver for realizing a picture-in-picture (PIP) screen using a plurality of decoders is provided. The digital broadcasting receiver includes a first decoder 30 and a second decoder 80 for decoding each of a plurality of broadcasting signals, and outputs two broadcasting signals on a PIP screen. That is, each of the broadcasting signals which are input simultaneously is decoded in the first decoder 30 and the second decoder 80, and the decoded image signals are output on the PIP screen. Thus, the digital broadcasting receiver provides an effect of performing a PIP screen function in which a plurality of decoders decode each of the broadcasting signals.
    Type: Grant
    Filed: June 26, 2000
    Date of Patent: January 20, 2004
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Myung-Sik Yim
  • Patent number: 6678006
    Abstract: A method and apparatus for processing DVD video data and sub-picture data is accomplished by storing a line of DVD video data and at least a partially decoded portion of DVD sub-picture data. The partially decoded DVD sub-picture data is still in an encoded format, which may be two bits per pixel, but line information has been decoded from the DVD subpicture data stream. Once stored, the DVD video data is retrieved from the memory and scaled to produce scaled video data. Similarly, the partially decoded sub-picture data is retrieved from memory, further decoded, and scaled to produce scaled sub-picture data. The scaled video data is blended with the scaled sub-picture data to produce a video output.
    Type: Grant
    Filed: January 7, 1998
    Date of Patent: January 13, 2004
    Assignee: ATI Technologies, Inc.
    Inventors: Robertson Velez, David Yeh, Philip L. Swan, David Glen
  • Publication number: 20030231259
    Abstract: There is provided a multi-screen synthesis apparatus that can execute display of video data and update of an OSD image without causing a user to feel a visual sense of incongruity, and reduce system costs. Periodic video source data and a periodic OSD image data are written into a unified memory reserved for planes. The video source data and the OSD image data are read from the unified memory, based on a synthesis layout, for simultaneous display on a single display in a synthesized state. Video data to be written into the unified memory is decimated in units of a frame on an input video source-by-input video source basis. The decimation of the data is controlled based on display priority of the video data determined based on a multi-screen display layout.
    Type: Application
    Filed: April 1, 2003
    Publication date: December 18, 2003
    Inventors: Hideaki Yui, Takashi Tsunoda
  • Patent number: 6563876
    Abstract: Methods and apparatus for implementing a reduced cost HDTV/SDTV video decoder are disclosed. The described joint video decoder is capable of decoding HDTV pictures at approximately the resolution of standard definition television pictures and can be used to decode HDTV and/or SDTV pictures. The described video decoder may be used as part of a picture-in-picture decoder circuit for providing picture-in-picture capability without providing multiple full resolution video decoders. The reduction in decoder circuit complexity is achieved through the use of a plurality of data reduction techniques including the use of a preparser, downsampling, and truncating pixel values.
    Type: Grant
    Filed: May 10, 2001
    Date of Patent: May 13, 2003
    Assignee: Hitachi America, Ltd.
    Inventors: Jill MacDonald Boyce, Larry Pearlstein
  • Patent number: 6559896
    Abstract: In a method of controlling a memory (5) to allow for a display of at least two images, write and read speeds of writing image data into and reading image data from the memory (5) are measured (9-15) to predict a crossing where a write action overtakes a read action or reversely, where a new field of said image data is written (13, 3) into the memory (5) from a same initial position as from which a previous field of the image data was written into the memory (5) if no crossing is predicted, and the new field of said image data is written (13, 3) into the memory (5) from an end position in the memory (5) at which an end of the previous field of the image data was written into the memory (5) if a crossing is indeed predicted, the memory (5) having a size being larger than that needed for one field but less than that needed for two fields of the image data at its largest read-out size.
    Type: Grant
    Filed: July 6, 1999
    Date of Patent: May 6, 2003
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Hendrik T. J. Zwartenkot, Jacob J. Veerhoek
  • Publication number: 20030048383
    Abstract: A circuit capable of handling picture-in-picture, high resolution double window, multi-picture-in-picture with a vertically compressed live main picture and with a live, a long picture-in-picture repay, and scan rate conversion, the circuit comprising first (SUB1) and second (SUB2) field memories for storing and processing a sub video signal (AN SUB, DIG SUB), and an output field memory (MN) for combining outputs of the first (SUB1) and second (SUB2) field memories with a main video signal (AN MN, DIG MN). Preferably, smart switching (LD1, LD2) is used to switch a field memory (SUB2) between compression of the main picture and PIP replay depending on the specification point required.
    Type: Application
    Filed: September 4, 2002
    Publication date: March 13, 2003
    Inventors: Geert Casteleyn, Wim Jef Devriese
  • Patent number: 6512552
    Abstract: A method of operating a digital video processor to continuously demultiplex, store and decode audio and video data streams and play back corresponding frames of audio and video. The processor further continuously demultiplexes, stores and decodes a first subpicture data stream and plays back first subpicture data in synchronization with the playback of frames of video data. PTS values associated with SPU's in the first subpicture data stream are continuously stored. The processor then detects a command instructing a transition from a first subpicture data stream to a second subpicture data stream and stores a PTS value associated with a first complete SPU of the second subpicture data stream so that it follows a PTS value associated with a last complete SPU in the first subpicture data stream. The processor then continuously stores PTS values associated with the SPU's in the second subpicture data stream.
    Type: Grant
    Filed: March 29, 1999
    Date of Patent: January 28, 2003
    Assignees: Sony Corporation, Sony Electronics Inc.
    Inventor: Pattabiraman Subramanian
  • Patent number: 6486921
    Abstract: A method is provided for displaying an OSD on a video image. According to the method, values of pixels of the OSD are stored, and pixels of lines of the OSD that are to be displayed without processing are displayed by making direct use of a color look-up table. Additionally, pixels of lines of the OSD that are to be displayed after processing with a mathematical filter and/or that are required for computations associated with the mathematical filter are processed. In the processing step, the pixels of the lines to be processed are stored in the form of addresses that designate the memory lines of the color look-up table, the values of the pixels of the lines to be processed are obtained by an addressing of the color look-up table, and a mathematical filter is applied to the obtained values of the pixels to be processed.
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: November 26, 2002
    Assignee: STMicroelectronics S.A.
    Inventor: Mark Vos
  • Patent number: 6441863
    Abstract: There is provided delay means for allowing a delay difference to be provided between the timing of image size information which is set into writing side memory control means and the timing of image size information which is set into reading side memory control means in a manner such that the image size when data is written into first and second field memories and the image size when the data is read out from the first and the second field memories coincide. The image size information is set into the writing side memory control means and the reading side memory control means so as to have a delay difference between them. The image size is set by controlling the first and the second field memories in accordance with the image size information by the writing side memory control means and the reading side memory control means.
    Type: Grant
    Filed: August 23, 1999
    Date of Patent: August 27, 2002
    Assignee: Sony Corporation
    Inventors: Shinichiro Miyazaki, Akira Shirahama, Takeshi Ohno
  • Patent number: 6407778
    Abstract: A video signal processing circuit includes an input processor configured to modify an input video signal in accordance with image magnification data and a buffer memory for storing the modified video signal. The processing unit also includes a write control unit configured to control a write function to the buffer memory by generating a write control signal in accordance with the image magnification data. The write control unit includes a calculating circuit configured to calculate image size data on the basis of the write control signal in response to a change in the image magnification data. The write control unit also includes an inhibition circuit configured to inhibit the write function to the buffer memory at least while the calculation circuit calculates the image size data. The processing unit further includes a read control unit for controlling reading from the buffer memory in accordance with the calculated image size data. A method of processing a video signal also is disclosed.
    Type: Grant
    Filed: March 16, 1998
    Date of Patent: June 18, 2002
    Assignee: Sanyo Electric, Co., Ltd.
    Inventors: Yutaka Shimizu, Seiya Ota
  • Patent number: 6384868
    Abstract: When a sub-image (A) and a sub-image (B) are displayed as semi-moving pictures on a multi-screen, the fields of the input sub-images (A) and (B) are determined. By setting the field determination result as one condition for a write to the memory 114, the sub-images (A) and (B) can be stably written to the memory 114 in either odd fields (ODD) or even fields (EVEN), and can be read and displayed on the screen without flickering characters due to line flicker. Furthermore, when video signals are switched for a channel switch or an input switch, the operation remote controller 501 can issue a switch instruction so that a write to the video memory 509 is stopped according to the generated switch signal, and the image is displayed as a still image. In response to a new input video signal, the number of write increase lines or picture elements for a write to the video memory 509 is set to n. The writing operation is performed m times (m is a natural number) for every other field.
    Type: Grant
    Filed: July 9, 1998
    Date of Patent: May 7, 2002
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Tadashi Oguma
  • Patent number: 6380984
    Abstract: A decoder has a DRAM used as a work area in processing such as decompression and an MPEG decoder including an OSD processing unit. The MPEG decoder has a function to decompress data completing MPEG compression and a graphic function to display information such as an EPG (Electronic Program Guide). A control unit generates display data from presentation information conveyed by a digital television broadcast by using the OSD processing unit employed in the MPEG decoder and the DRAM in order to display the presentation information. With such a decoder, it is possible to provide a receiver with a new function to use presentation information conveyed by a digital television broadcast without entailing an increase in cost.
    Type: Grant
    Filed: February 22, 1999
    Date of Patent: April 30, 2002
    Assignee: Sony Corporation
    Inventors: Hajime Inoue, Sunao Furui
  • Patent number: 6377713
    Abstract: A method and apparatus for downsizing a digital video image, such as an image corresponding to the MPEG-2 standard. The system is particularly suitable for providing a reduced image for a picture-in-picture mode on a television. Digital video pixel data that is received from a channel is decompressed to provide pixel data of an original image (e.g., A1, A2, A3, A4). Horizontally adjacent pixel pairs of the original image are averaged to provide horizontally downsized pixel data (e.g., (A1+A2)/2, (A3+A4)/2), which is stored in a first bank of a multi-bank memory. Data from every other pixel of the original image (e.g., A2, A4) is stored in a second bank of the dual-bank memory. To obtain a downsized image, vertically adjacent lines of the horizontally downsized pixel data are retrieved from the first bank, and averaged to provide vertically and horizontally downsized pixel data for display.
    Type: Grant
    Filed: January 27, 1999
    Date of Patent: April 23, 2002
    Assignee: General Instrument Corporation
    Inventor: Bao Vuong
  • Patent number: 6359655
    Abstract: For a possible flexible adaptation to changing ambient conditions, a circuit arrangement comprising an integrated circuit in which a microprocessor is provided which controls an index generator provided in the integrated circuit for teletext and/or on-screen display functions and which performs control functions of a television apparatus by means of a control interface provided in the integrated circuit is characterized in that a storage interface for a read-only memory outside the integrated circuit is provided in the integrated circuit, and in that the read-only memory comprises at least a part of the program code for the microprocessor and at least a font for the teletext function and possible further index functions.
    Type: Grant
    Filed: April 7, 1997
    Date of Patent: March 19, 2002
    Assignee: U.S. Philips Corporation
    Inventors: Ralph Van Vignau, Jürgen Plog
  • Patent number: 6356314
    Abstract: Provided is an image synthesizing device with which a specific display region P of a sub-image is synthesized and displayed within a specific display region Q of a main image displayed on a display 9, wherein this image synthesizing device comprises a frame memory with which the data in the synthesis and display region P out of the sub-image data is continuously stored in the order of input, after which the stored sub-image data is read out when the scanning address of the main image data is an address corresponding to the display region Q, and a selector 4 with which the main image data displayed on the display 9 and the sub-image data continuously and sequentially read out from the frame memory are inputted, and when the scanning address of the main image data is an address corresponding to the display region Q, the selected channel is switched from main image data to the sub-image data and outputted to the display 9 where this sub-image data is displayed, which allows the capacity of the frame memory used
    Type: Grant
    Filed: September 9, 1999
    Date of Patent: March 12, 2002
    Assignee: Komatsu Ltd.
    Inventor: Makoto Takebe
  • Patent number: 6351291
    Abstract: An image processing apparatus comprises an image memory comprising a first storing area for storing first image data for a background and a second storing area for storing second image data for an on-screen-display; a display buffer memory for storing data in a format used for display based on the first and second image data read from the image memory; and a controller for controlling accesses to the image memory and the display buffer memory, the controller reading the first image data from the first storing area in the image memory and writing the first image data into the display buffer memory and reading the second image data from the second storing area in the image memory and writing the second image data into a designated area in the display buffer memory.
    Type: Grant
    Filed: March 29, 2000
    Date of Patent: February 26, 2002
    Assignee: Fuji Photo Film Co., Ltd.
    Inventor: Masanari Asano
  • Patent number: 6351292
    Abstract: An apparatus and concomitant method for generating an OSD message by constructing an OSD bitstream having OSD data defining a plurality of alternate OSD pixel lines. The OSD bitstream contains an OSD header and OSD data. An OSD unit retrieves pixel control information from the OSD header which is programmed by a processor of a decoding/displaying system. The OSD header contains information that is used to program a color palette of the OSD unit and to provide instructions as to the treatment of the OSD data. If the “Line Doubling Mode” is enabled in the OSD header, then the OSD unit will repeat each OSD line on the next line of video for an OSD region.
    Type: Grant
    Filed: March 23, 1999
    Date of Patent: February 26, 2002
    Assignee: Thomson Licensing S.A.
    Inventors: Michael Dwayne Knox, Aaron Hal Dinwiddie
  • Patent number: 6337717
    Abstract: An alternate display content controller provides a technique for controlling a video display separately from and in addition to the content displayed on the operating system monitor. Where the display is a computer monitor, the alternate display content controller interacts with the computer utility operating system and hardware drivers to control allocation of display space and create and control one or more parallel graphical user interfaces adjacent the operating system desktop. An alternate display content controller may be incorporated in either hardware or software. As software, an alternate display content controller may be an application running on the computer operating system, or may include an operating system kernel of varying complexity ranging from dependent on the utility operating system for hardware system services to a parallel system independent of the utility operating system and capable of supporting dedicated applications.
    Type: Grant
    Filed: February 5, 1999
    Date of Patent: January 8, 2002
    Assignee: xSides Corporation
    Inventors: D David Nason, Thomas C O'Rourke, Scott Campbell