Abstract: Disclosed is a reception apparatus including a basic service reception unit to demodulate and channel-decode a signal received through one broadcasting channel among broadcasting channels for a basic service, and to extract a transport stream, an additional service reception unit to demodulate and channel-decode a signal received through a broadcasting channel for an additional service combined with the basic service, and to extract a transport stream, an integrated demultiplexer to respectively demultiplex the transport stream provided for the basic service and the transport stream provided for the additional service in order to extract at least one transport stream, and a source decoder to respectively decode the demultiplexed transport stream provided for the basic service and the demultiplexed transport stream provided for the additional service in order to broadcast at least one of a basic source and an additional source combined with the basic source.

Abstract: In a tuner circuit, an automatic gain control circuit generates an RF-AGC voltage for automatically controlling a gain of an RF-AGC amplifier in accordance with a level of a signal output from an IF amplifier. An emitter follower circuit includes a transistor for current amplification, and varies a drive current of the transistor in accordance with the RF-AGC voltage. Thus, when an interference signal is at a high level, the drive current of the transistor becomes large. Therefore, distortion performance of the emitter follower circuit is improved. On the other hand, in a normal state where the interference signal is at a low level, the drive current of the transistor fails to become large. Therefore, low power consumption is achieved.

Abstract: An apparatus for transmission and reception of video signal using power line is provided. The device include a coupler for receiving a high-frequency composite video signal from an external video signal transmitter, a first amplifier, a first low-pass filter, a second amplifier, a second low-pass filter, an FM demodulator, a video amplifier, an analog-digital converter, an image processor, and a universal serial bus (USB) host for processing a video file from the image processor so as to be adapted to be displayed on the personal computer and outputting to a USB port or storing in a memory.

Abstract: A front-end module for receiving analog and digital broadcast signals is provided. The front-end module includes frequency conversion means, digital satellite demodulation means, intermediate frequency conversion means, analog demodulation means, digital terrestrial demodulation means, filtering means, and a grounding arrangement common to a digital and an analog circuit sections.

Abstract: Systems and methods for processing signals in a communication system are disclosed and may include demodulating a wirelessly received inband signal and a wirelessly received out-of-band signal via a DTV receiver. One or more TV channels may be generated based on the demodulation of the wirelessly received inband signal and a wirelessly received out-of-band signal. The received inband signal may include a VSB signal, a NTSC signal and/or a QAM signal. The processing may also include determining whether the wirelessly received inband signal includes an analog signal or a digital signal. The digital signal may be error corrected, and the error corrected digital signal may be equalized. The analog signal may be decoded, and an audio output may be generated based on the decoding of the analog signal.

Abstract: A multiplexed transport interface (MTSIF) may be utilized during communication between a demodulation module and a video processing system-on-chip (SoC). The MTSIF may enable concurrent demodulation of a plurality of input modulated video streams, via a plurality of demodulator chips within the demodulation module, by multiplexing data generated by the demodulator chips via the MTSIF during communication between the demodulator module and the video processing SoC. The MTSIF may also be utilized for communicating control signals, which may be used in controlling and/or managing operations of the demodulation module, the video processing SoC, and/or the MTSIF. Communication via the MTSIF may be synchronized. Packets communicated via the MTSIF may be timestamped. Timestamp counters may be used in the demodulation module and the video processing SoC to generate and/or track timestamps in communicated packets. The timestamp counter may be synchronized, using control signals communicated via the MTSIF.

Abstract: An interface circuit configured to connect between (a) a broadcast receiver tuner and associated circuitry for the receiving and processing of broadcast radio frequency signals, and (b) a general purpose computer device programmed with software demodulation code configured to engage a general purpose processor in signal demodulation functions, the interface circuit comprising: a data interface comprising a packetisation buffer connected to receive (i) digital signal sample data from a signal path of the tuner and associated circuitry and (ii) indications of control settings which are applied to one or more configurable components during taking of the sample data, said packetisation buffer being operable to construct packets comprising blocks of sample data and header information carrying said control settings indications; a control interface configured to receive control instructions from tuner control code running on the general purpose computer device; and a microcontroller operable to receive the control i

Abstract: A receiver apparatus 3 has a digital circuit portion 13 that converts a compressed digital signal outputted from a digital demodulating portion 12 into digital video and audio signals and a video/audio output circuit 14 that converts the digital video and audio signals outputted from the digital circuit portion 13 into analog video and audio signals. With this configuration, a video/audio processing IC for digital signal processing no longer needs to be mounted on the circuit board of a video display apparatus 4, and thus a receiver system can be realized with a video display apparatus having a simple configuration.

Abstract: Systems and methods for demodulating signals are disclosed. A system in accordance with the present invention comprises a frequency estimator, a tuner, coupled to the frequency estimator, for tuning to a frequency based on an estimate from the frequency estimator, a phase offset estimator for determining an average phase offset, and a demodulator, coupled to the tuner and the phase offset estimator, for demodulating the plurality of symbols, wherein the demodulator corrects a phase offset for a given symbol in the plurality of the symbols based on the average phase offset of symbols prior to the given symbol.

Abstract: In accordance with various aspects of the disclosure, a method and apparatus for receiving multiple channels from a broadcast source and interfacing to multiple demodulators within a common silicon implementation is disclosed. A receiver apparatus is disclosed that may aggregate multiple channels output by multiple tuners into at least one composite signal. The at least one composite signal may be passed to a single ADC. The channels may then be extracted from the at least one composite signal in the digital domain prior to demodulation in separate demodulators.

Abstract: A VSB reception system includes a sequence generator for decoding a symbol corresponding to the supplemental data and generating a predefined sequence included in the supplemental data at VSB transmission system. The reception system also includes a modified legacy VSB receiver for processing the data received from the VSB transmission system in a reverse order of the VSB transmission system by using the sequence, and a demultiplexer for demultiplexing the data from the modified legacy VSB receiver into the MPEG data and the supplemental data. The VSB reception system also includes a supplemental data processor for processing the supplemental data segment from the demultiplexer in a reverse order of the transmission system, to obtain the supplemental data, thereby carrying out the slicer prediction, decoding, and symbol decision more accurately by using the predefined sequence, to improve a performance.

Abstract: A carrier recovery device includes a first carrier recovery unit configured to multiply a baseband signal by a first carrier to obtain a first demodulated signal, and generate the first carrier based on a first phase error in a pilot signal extracted from the first demodulated signal, a second carrier recovery unit configured to multiply the baseband signal by a second carrier to obtain a second demodulated signal, and generate the second carrier based on a second phase error in a pilot signal extracted from the second demodulated signal, and a selector configured to select one of the first and second demodulated signals which has been obtained by one of the first and second carrier recovery units whose carrier recovery operation has reached a predetermined steady state earlier than that of the other, based on the first phase error and the second phase error, and output the selected demodulated signal.

Abstract: A receiver apparatus 3 has a digital circuit portion 13 that converts a compressed digital signal outputted from a digital demodulating portion 12 into digital video and audio signals, a video/audio output circuit 14 that converts the digital video and audio signals outputted from the digital circuit portion 13 into analog video and audio signals, and an intermediate-frequency processing circuit portion 15 that converts an intermediate-frequency signal into an audio intermediate-frequency signal. With this configuration, a video/audio processing IC for digital signal processing no longer needs to be mounted on the circuit board of a video display apparatus 4, and thus a receiver system can be realized with a video display apparatus having a simple configuration.

Abstract: M/H Groups each begin with a respective trellis-initialization of 2/3 trellis coding used as inner convolutional coding of concatenated convolutional coding (CCC). Concluding each M/H Group with another trellis-initialization of 2/3 trellis coding terminates the inner convolutional coding of the CCC properly, facilitating bi-directional decoding thereof. Properly terminating the inner convolutional coding of the CCC also facilitates wrap-around turbo decoding of that M/H Group beginning after the earlier training sequence with known 8VSB symbols and concluding with the trellis-initialization of 2/3 trellis coding before that earlier training sequence. At least one further trellis-initialization of 2/3 trellis coding can be inserted into an M/H Group for splitting it into first and second portions that can be decoded separately and that can be efficiently packed by portions of RS Frames employing transverse Reed-Solomon codes of a standard length.

Abstract: A method for receiving a broadcasting signal and a broadcasting signal receiver are disclosed. Even when a cell is changed while an emergency alert is output, the emergency alert can be continuously output using emergency alert table information included in the broadcasting signal and channel information of the cell. The emergency alert table information may include a cell identifier and the channel information of the cell may include virtual channel information of the cell.

Abstract: A receiver apparatus 3 has a digital circuit portion 13 that converts a compressed digital signal outputted from a digital demodulating portion 12 into digital video and audio signals and a video/audio output circuit 14 that converts the digital video and audio signals outputted from the digital circuit portion 13 into analog video and audio signals. With this configuration, a video/audio processing IC for digital signal processing no longer needs to be mounted on the circuit board of a video display apparatus 4, and thus a receiver system can be realized with a video display apparatus having a simple configuration.

Abstract: A digital broadcast system is disclosed. The digital broadcast system including a transmitter, a receiver, and a method for transmitting and receiving a DTV signal comprising main service data and mobile service data multiplexed with the main service data. The DTV signal results from generating a second data by de-interleaving a first data group by a DTV transmitter.

Abstract: An antenna unit for a TV. The antenna unit, which can be roof-mounted, includes a tuner and a demodulator so that it outputs a baseband signal containing IP packets representing a TV signal, requiring only a twisted pair Ethernet-type connection between the antenna unit and TV.

Abstract: A channel equalizer includes a first transformer, an estimator, an average calculator, a second transformer, a coefficient calculator, a compensator, and a third transformer. The first transformer converts normal data into frequency domain data, where a known data sequence is periodically repeated in the normal data. The estimator estimates channel impulse responses (CIR) during known data intervals adjacent to each normal data block. The average calculator calculates an average value of the CIRs. The second transformer converts the average value into frequency domain data. The coefficient calculator calculates equalization coefficients using the average value, and the compensator compensates channel distortion of each normal data block using the coefficients. The third transformer converts the compensated data block into time domain data.

Abstract: A demodulator comprises a reference voltage generating circuit for generating a reference voltage, a reference resistor for converting the reference voltage to a reference current, a current digital-to-analog converter (IDAC) for receiving a digital code and generating an output signal, a comparison apparatus for comparing the reference voltage with the output signal to generate a comparison output, and a calibration apparatus for updating the digital code according to the comparison output to calibrate the IDAC.

Abstract: A digital broadcast system and method of processing data are disclosed. A channel equalizer includes a frequency domain converter receiving a known data sequence, when the known data sequence is periodically inserted and transmitted in general data, and converting the received data to frequency domain data, a CIR estimator using the data being received during a known data section and known data generated by a receiving system, so as to estimate a CIR, a CIR calculator interpolating or extrapolating the CIR estimated by the CIR estimator in accordance with characteristics of the general data being received, a coefficient calculator converting the CIR being outputted from the CIR calculator to a frequency domain CIR and calculating and outputting an equalization coefficient, and a distortion compensator multiplying the equalization coefficient calculated by the coefficient calculator with the data converted to frequency domain data by the frequency domain converter, thereby compensating channel distortion.

Abstract: A universal transmitter and a universal receiver for respectively transmitting and receiving orthogonal frequency-division multiplexing (OFDM) signals using the international television bands respectively use fixed subcarrier spacing; fixed Fast Fourier Transform (FFT)/Inverse Fast Fourier Transform (IFFT) period values; a fixed symbol duration for each cyclic prefix option; and fixed WRAN frame parameters, but a selectable channel bandwidth for transmission and reception.

Abstract: According to one aspect, a mixed-signal tuner for analog and digital TV reception incorporates a demodulator for analog TV, employing various features for resolving limitations of the analog circuitry and for achieving compatibility with various global TV standards. Such features, which may be present in one or more embodiments, include the use of a variable sample rate in all digital clocks for frequency planning, and use of a microcontroller (MCU) to control various circuitry of the tuner.

Abstract: According to one aspect, a mixed-signal tuner for analog and digital TV reception incorporates a demodulator for analog TV, employing various features for resolving limitations of the analog circuitry and for achieving compatibility with various global TV standards. Such features, which may be present in one or more embodiments, include the use of a variable sample rate in all digital clocks for frequency planning, and use of a microcontroller (MCU) to control various circuitry of the tuner.

Abstract: A digital demodulating apparatus comprises circuit elements constituting a tuner that performs channel select processing to an interleaved received signal, and a demodulator that demodulates the received signal; a deinterleaving section that deinterleaves the interleaved received signal; an error correcting section that corrects errors in the received signal deinterleaved by the deinterleaving section; and a circuit element controlling section that controls an operation of at least one of the circuit elements. The circuit element controlling section estimates the quantity of hypothetical errors in the received signal caused by a control of a circuit element. The circuit element controlling section judges from the estimated quantity of hypothetical errors whether the error correcting section can correct errors in the received signal caused by the control of the circuit element.

Abstract: The present invention relates to a wireless communication receiver, wireless communication receiving method and television receiver. The wireless communication receiver has signal processing circuits including a first signal processing circuit and a second signal processing circuit, a data storage module, and a deinterleaver. The first signal processing circuit receives a wireless communication signal and then performs a first signal processing to generate a first output data according to the wireless communication signal. The deinterleaver stores the first output data into the data storage module, and retrieves a deinterleaved data corresponding to the first output signal from the data storage module. The second signal processing circuit performs a second signal processing to generate a second output data according to the deinterleaved data.

Abstract: A method and apparatus for staggercasting a plurality of content representative signals includes encoding a first and a corresponding second signal representing each of the plurality of content representative signals. A composite signal is generated comprising the plurality of first and second encoded signals. In the composite signal, each respective second encoded signal is delayed with respect to the corresponding first encoded signal. The first and second encoded signal representing a selected one of the content representative signals is extracted to reproduce the selected content representative signal. The extracted first encoded signal is decoded if an error is detected in the extracted second encoded signal, otherwise the extracted second encoded signal is decoded. When a different content representative signal is newly selected, the first extracted encoded signal is decoded until the delayed second extracted encoded signal is available.

Abstract: The invention discloses a digital IF demodulator for processing a digital IF signal converted from a radio frequency (RF) signal, including an NCO, a down conversion circuit, a PIF carrier recovery circuit and a video baseband demodulator. The NCO outputs a sine value and a cosine value. The down conversion circuit outputs a first zero IF signal including a first real part signal and a first imaginary part signal, according to the digital IF signal, the sine value and the cosine value. The PIF carrier recovery circuit outputs a loop error signal for the NCO and a second zero IF signal, according to the first zero IF signal and a video synchronization signal. The video baseband demodulator generates a composite video signal according to the second zero IF signal.

Abstract: A DTV transmitting system includes a pre-processor, a block processor, and a trellis encoder. The pre-processor pre-processes enhanced data by expanding the enhanced data at an expansion rate of 1/H. The block processor includes a first converter, a symbol encoder, a symbol interleaver, and a second converter. The first converter converts the expanded data into symbols. The symbol encoder encodes each valid enhanced data bit in the symbols at an effective coding rate of 1/H. The symbol interleaver interleaves the encoded symbols, and the second converter converts the interleaved symbols into enhanced data bytes. The trellis encoder trellis-encodes the enhanced data outputted from the block processor.

Abstract: A digital television receiving system includes a first known data detector, a second known data detector, and a selector. The first known data detector detects a location of a first known data sequence in a broadcast signal by calculating a first correlation value between the broadcast signal and a first reference known data sequence. Similarly, the second known data detector detects a location of a second known data sequence in the broadcast signal by calculating a second correlation value between the broadcast signal and a second reference known data sequence. The selector selects the location information detected by one of the first and second known data detectors with a greater correlation value.

Abstract: A method for processing a stream of a digital broadcast receiver is provided. The method which processes a stream that is divided into a first area allocated to first mobile data and a second area allocated to normal data, includes: receiving a transport stream including new mobile data in at least a part of the second area separately from the first mobile data, demodulating the transport stream, equalizing the demodulated transport stream, and decoding at least one of the first mobile data and the new mobile data from the equalized transport stream. Accordingly, mobile data services may be provided in various ways.

Abstract: A digital IF demodulator includes an analog-to-digital (A/D) converter that receives an analog IF signal and converts it to a digital IF signal. A parallel multiplier then down-converts the digital IF signal to a baseband signal having a video component and an audio component. The frequency down-conversion uses a parallel multiplier driven by an outer feedback loop that corrects gross frequency errors in said digital IF signal. The digital IF demodulator also includes a video recovery circuit that selects the video component from the baseband signal and further down-converts the baseband signal to a video baseband using a video complex mixer driven by an inner feedback loop that corrects fast phase perturbations in the video recovery circuit. Finally, the digital IF demodulator includes an audio recovery circuit that (i) receives said baseband signal from the parallel multiplier, and (ii) down-converts the audio component to an audio baseband signal using an audio complex mixer.

Abstract: A receiver is an ATSC (Advanced Television Systems Committee)-receiver and comprises a staggered quadrature amplitude modulator for providing an staggered quadrature amplitude modulated (SQAM) signal from a received signal; an equalizer and a data-aided symbol timing recovery (STR) loop. The equalizer operates outside of the data-aided symbol timing recover loop.

Abstract: An apparatus for demodulating a digital video signal applied to a receiving end of an Orthogonal Frequency-Division Multiplexing (OFDM) communication system is provided. The apparatus receives a plurality of OFDM symbols, and stores a plurality of data sequences in an external memory. The apparatus includes a de-interleaver, that de-interleaves the data sequences to generate a plurality of de-interleaved data sequences; a decoder, coupled to the de-interleaver, that generates a plurality of data streams according to the de-interleaved data sequences; a reconstruction apparatus, coupled to the decoder, that reconstructs the data streams into a transport stream; and a memory interface unit, coupled to the external memory, that accesses the data sequences and the data streams from the external memory. The external memory includes a de-interleaving buffer that stores the data sequence, and a data reconstructing buffer that stores the data streams.

Abstract: A receiver is an ATSC (Advanced Television Systems Committee)-receiver and comprises a staggered quadrature amplitude modulator for providing an staggered quadrature amplitude modulated (SQAM) signal from a received signal; a data-aided carrier tracking loop (CTL) and a data-aided symbol timing recovery (STR) loop. The data-aided STR loop operates such that the data-aided STR loop is now insensitive to carrier phase offset.

Abstract: A receiver is an ATSC (Advanced Television Systems Committee)-receiver and comprises a staggered quadrature amplitude modulator for providing an staggered quadrature amplitude modulated (SQAM) signal from a received signal; a data-aided carrier tracking loop (CTL) and a data-aided symbol timing recovery (STR) loop. The data-aided CTL operates such that the data-aided CTL is now insensitive to timing phase offset.

Abstract: A pre-processor pre-processes enhanced data packets by coding the enhanced data packets for forward error correction (FEC) and expanding the FEC-coded data packets. A data formatter adds first null data into first place holders within each pre-processed enhanced data packet. A first multiplexer multiplexes the main data packets with the enhanced data packets having the first null data. A holder inserter inserts second null data into second place holders within an enhanced data packet outputted from the first multiplexer. A data interleaver replaces the second null data with parity data. A data generator generates at least one known data sequence. A symbol processor replaces the first null data included in an output of the data interleaver with the known data sequence(s). A non-systematic RS encoder generates the parity data by performing non-systematic RS-coding on an output of the symbol processor, and provides the parity data to the data interleaver.

Abstract: A digital television transmitting system includes a frame encoder, a block processor, a group formatter, and a multiplexer. The frame encoder forms an enhanced data frame and encodes the data frame for error correction and for error detection. The block processor further encodes the encoded data frame at a rate of ½ or ¼, and the group formatter divides the encoded data frame into a plurality of enhanced data blocks and maps the divided data blocks into a plurality of enhanced data groups, respectively. The multiplexer multiplexes the enhanced data groups with main data.

Abstract: An integrated receiver with channel selection and image rejection substantially implemented on a single CMOS integrated circuit is described. A receiver front end provides programmable attenuation and a programmable gain low noise amplifier. Frequency conversion circuitry advantageously uses LC filters integrated onto the substrate in conjunction with image reject mixers to provide sufficient image frequency rejection. Filter tuning and inductor Q compensation over temperature are performed on chip. The filters utilize multi track spiral inductors. The filters are tuned using local oscillators to tune a substitute filter, and frequency scaling during filter component values to those of the filter being tuned. In conjunction with filtering, frequency planning provides additional image rejection. The advantageous choice of local oscillator signal generation methods on chip is by PLL out of band local oscillation and by direct synthesis for in band local oscillator.

Abstract: A television signal recording apparatus comprises a recording unit that makes recordings of television signals and stores metadata representing information in respect of the recordings including the channel and the recording time. A graphical display of made recordings and scheduled recordings is produced in which graphical objects representing respective recordings are arranged in two dimensions, ordered in a first dimension on the basis of the channels and ordered in a second dimension on the basis of the recording times. In the second dimension, the graphical objects are arranged along a time axis which includes discontinuities at times when no recording is present, the discontinuities being graphically represented by graphical symbols that are different according to the period of the discontinuity. An electronic program guide is produced with a similar format, the programs being filtered to select programs and discontinuities being present at times where there is no selected program.

Abstract: An integrated circuit includes a dual-conversion tuner, firstly upconverting so as to place a signal outside the reception band, then downconverting with zero intermediate frequency. A bulk acoustic wave type filter is calibrated in such a way as to accurately determine its central frequency. This filter is positioned between the two frequency transposition stages of the tuner. After baseband filtering, the signals are digitized then processed in a digital block BNM which includes a channel decoding module.

Abstract: Provided is an image display apparatus. The apparatus includes a tuner, a demodulator, a demultiplexer, a controller, an OSD controller, a graphic driver, and an OSD displayer. The tuner receives broadcasting signals, the demodulator demodulates signals of a channel selected by the tuner, and the demultiplexer demultiplexes signals demodulated by the demodulator into audio signals, video signals, and a PSIP table. The controller controls information of an electronic program guide extracted from the demultiplexed data to be output in the form of an on-screen-display, and divides the electronic program guide into a text region and a background region to set gradation on the background region of the electronic program guide. The OSD controller performs a gradation process with respect to the background region of the electronic program guide using a gradation value set by the controller.

Abstract: A method of generating a smoothed transport stream to an MPEG decoder for a diversity combine digital television receiver includes generating a plurality of synchronization clocks and demodulated signals according to a plurality of digital television signals received from a plurality of antennas; monitoring a signal quality associated with each of the digital television signals; combining at least demodulated signals having a signal quality being greater than a predetermined threshold to thereby form a combined signal; generating transport stream packets according to the combined signal; selecting a synchronization signal corresponding to a digital television signal having a signal quality being greater than a second predetermined threshold as a selected synchronization signal; and generating a smoothed transport stream having packets being uniformly spaced according to the transport stream packets and the selected synchronization signal.

Abstract: A method and apparatus for de-interleaving interleaved data in a deinterleaver memory in an Orthogonal Frequency Division Multiplexing (OFDM) based Integrated Services Digital Broadcasting Terrestrial (ISDB-T) receiver. In different embodiments, the apparatus comprises of a OFDM symbol counter along with a divider or a buffer pointer RAM with circular pointer logic, a first lookup table to obtain delay buffer size and interleaving lengths for a given OFDM transmission layer, and a second lookup table to obtain buffer base address and interleaving lengths for a given OFDM transmission layer.

Abstract: A VSB reception system includes a sequence generator for decoding a symbol corresponding to the supplemental data and generating a predefined sequence included in the supplemental data at VSB transmission system. The reception system also includes a modified legacy VSB receiver for processing the data received from the VSB transmission system in a reverse order of the VSB transmission system by using the sequence, and a demultiplexer for demultiplexing the data from the modified legacy VSB receiver into the MPEG data and the supplemental data. The VSB reception system also includes a supplemental data processor for processing the supplemental data segment from the demultiplexer in a reverse order of the transmission system, to obtain the supplemental data, thereby carrying out the slicer prediction, decoding, and symbol decision more accurately by using the predefined sequence, to improve a performance.

Abstract: A VSB reception system includes a sequence generator for decoding a symbol corresponding to the supplemental data and generating a predefined sequence included in the supplemental data at VSB transmission system. The reception system also includes a modified legacy VSB receiver for processing the data received from the VSB transmission system in a reverse order of the VSB transmission system by using the sequence, and a demultiplexer for demultiplexing the data from the modified legacy VSB receiver into the MPEG data and the supplemental data. The VSB reception system also includes a supplemental data processor for processing the supplemental data segment from the demultiplexer in a reverse order of the transmission system, to obtain the supplemental data, thereby carrying out the slicer prediction, decoding, and symbol decision more accurately by using the predefined sequence, to improve a performance.

Abstract: According to one embodiment, a sharpening module and a grayscale smoothing module are provided. The smoothing module smoothes and reduces grayscale differences in a plain area of an input digital image signal, according to a parameter. A frequency state detection module detects a frequency state of the input digital image signal. A first case to be detected is that lower-frequency components are substantially fewer than higher-frequency components. A second case to be detected is that the lower-frequency components are substantially more than the higher-frequency components. A correction parameter output module outputs a correction parameter which enhances a smoothing process more when the second case is detected than when the first case is detected, the smoothing process being performed by the smoothing module.

Abstract: This amplifier (10) for radio frequency signals comprises a circuit adapted to amplify the signals within a first range of frequency (19) and is characterized in that said circuit is also adapted to simultaneously attenuate the signals within a second range of frequency.

Abstract: A digital television (DTV) signal for use in a DTV receiver includes an extended text table (ETT) which includes a header and a message body. The header includes a table identification extension field which serves to establish uniqueness of the ETT, and the message includes an extended text message (ETM). If the ETT is an event ETT, the table ID extension field includes an event identification which specifies an identification number of an event associated with the ETT. On the other hand, if the ETT is a channel ETT, the table identification extension field includes a source identification which specifies a programming source of a virtual channel associated with the ETT. A section-filtering unit included in the DTV receiver is able to use table identification extension fields of a plurality of ETTs for section-filtering a pertinent event or channel ETT from the ETTs.

Abstract: A VSB reception system includes a sequence generator for decoding a symbol corresponding to the supplemental data and generating a predefined sequence included in the supplemental data at VSB transmission system. The reception system also includes a modified legacy VSB receiver for processing the data received from the VSB transmission system in a reverse order of the VSB transmission system by using the sequence, and a demultiplexer for demultiplexing the data from the modified legacy VSB receiver into the MPEG data and the supplemental data. The VSB reception system also includes a supplemental data processor for processing the supplemental data segment from the demultiplexer in a reverse order of the transmission system, to obtain the supplemental data, thereby carrying out the slicer prediction, decoding, and symbol decision more accurately by using the predefined sequence, to improve a performance.