Abstract: A film capacitor including a pair of electrodes having multiple pores is provided. The film capacitor includes a polymer film deposited upon each of the pair of electrodes to form a dielectric layer.

Abstract: The present invention aims to provide an electronic component capable of reducing the occurrence of cracks at the joining portion with a board etc. A capacitor 1 (laminated ceramic capacitor) being one example of the electronic component of the present invention is provided with an element assembly 10 (ceramic) and a pair of external electrodes 20 formed on both side surfaces of the element assembly. In the element assembly 10, a dielectric layer 12 and an internal electrode 14 are laminated alternately. The external electrode 14 has such constitution that a first electrode layer connected with the internal electrode 14, a second electrode layer (electroconductive resin layer) including a hardened product of epoxy resin containing an epoxy compound having a molecular weight of 2000 or more and plural epoxy groups as the base compound, a third electrode layer composed of Ni and a fourth electrode layer composed of Sn are formed in this order from the element assembly side.

Abstract: A capacitor device, an electronic circuit comprising a capacitor device, an electronic component, and a method of forming a capacitor device are described. In the capacitor device, a current-path region extends from one of two trench capacitor electrodes to a respective contact structure. The current-path region is obtainable by thinning the substrate from an original substrate thickness down to reduced substrate thickness either in a lateral substrate portion containing the capacitor region or over the complete lateral extension of the substrate before forming the first and second contact structures. The capacitor device exhibits a reduced impedance in the current-path region. This reduced impedance implies a low self-inductance and self-resistance that is caused by the current-path region.

Abstract: A capacitor includes a lower electrode, a dielectric structure over the lower electrode, the dielectric structure including at least one crystallized zirconium oxide (ZrO2) layer and at least one amorphous aluminum oxide (Al2O3) layer, and an upper electrode formed over the dielectric structure. A method for fabricating a capacitor includes forming a lower electrode over a certain structure, forming a dielectric structure including at least one crystallized zirconium oxide (ZrO2) layer and at least one amorphous aluminum oxide (Al2O3) layer over the lower electrode, and forming an upper electrode over the dielectric structure.

Abstract: A ceramic element, including: a ceramic body having an internal electrode layer and a ceramic layer; an external electrode having a base electrode which is provided on the outside of the ceramic body so as to be electrically connected with the internal electrode layer, and a plating layer covering the outer surface of the base electrode; and a protective layer for covering at least a portion of the outer surface of the ceramic layer other than the portion covered by the external electrode, wherein the protective layer includes a first layer that is an insulating layer containing an insulating oxide, and a second layer that is an insulating layer containing the same insulating oxide as the first layer and an element that is the same as at least one of elements forming the ceramic layer, and the first layer and second layer are formed in that order from the inside.

Abstract: A dielectric device has a first conductor and a dielectric disposed thereon. An intermediate region is formed between the first conductor and dielectric. In the intermediate region, an additive different from the first conductor and dielectric and the dielectric are mixed with each other. The additive contains at least one element of Si, Al, P, Mg, Mn, Y, V, Mo, Co, Nb, Fe, and Cr.

Abstract: A capacitor device with a capacitance is introduced. The capacitor device includes at least one capacitive element. The at least capacitive element comprises a pair of first conductive layers being opposed to each other, at least one first dielectric layer formed on a surface of at least one of the first conductive layers, and a second dielectric layer being sandwiched between the first conductive layers. The first dielectric layer has a first dielectric constant and the second dielectric layer has a second dielectric constant. The capacitance of the capacitor device depends on dielectric parameters of the first dielectric layer and the second dielectric layer. The dielectric parameters comprise the first dielectric constant and thickness of the at least one first dielectric layer and the second dielectric constant and thickness of the second dielectric layer.

Abstract: An automated respiration stimulation apparatus comprising a detector configured to measure a respiratory cycle of a user and a stimulator configured to automatically apply a stimulation to the user's acoustic nerve to interrupt a disturbance in the respiratory cycle of the user in response to the detection of the disturbance as indicated by the respiratory cycle measurements of the detector.

Abstract: A method for forming a capacitor includes providing a metal-containing bottom electrode, forming a capacitor insulator over the metal-containing bottom electrode, forming a metal-containing top electrode over the capacitor insulator, and forming a dielectric-containing field modification layer over the capacitor insulator and at least partially surrounding the metal-containing top electrode. Forming the dielectric-containing field modification layer may include oxidizing a sidewall of the metal-containing field modification layer. A barrier layer may be formed over the capacitor insulator prior to forming the metal-containing top electrode.

Abstract: An electro-optical device includes a holding capacitor with a first electrode electrically connected to a transistor and a pixel electrode, a second electrode disposed opposite to the first electrode, and a multilayer dielectric film structure disposed between the first electrode and the second electrode. The multilayer dielectric film structure includes a low dielectric film and first and second high dielectric films. The first and second high dielectric films sandwich the low dielectric film from a first electrode side and a second electrode side, respectively. Both of the first and second high dielectric films have a permittivity that is higher than that of the low dielectric film.

Abstract: A rolled film capacitor is disclosed which includes a first dielectric film and a second dielectric film, which are wound along their length dimension to form alternating turns of the winding. A plurality of first conductive segments are arranged on a first surface of the first dielectric film along the length dimension of the first dielectric film, and a plurality of second conductive segments are arranged on a surface of the second dielectric film along the length dimension of the second dielectric film, or on a second surface of the first dielectric film along the length dimension of the first dielectric film. The first conductive segments can have a progressively increasing length along the length dimension of the first dielectric film, and the second conductive segments have a progressively increasing length along the length dimension of the first or second dielectric film. The number of the first and/or second conductive segments per turn of the winding can be equal to or more than one.

Abstract: A dielectric ceramic comprising a barium titanate as a main component and a capacitor comprising the dielectric ceramic are disclosed. The dielectric ceramic has a high dielectric constant that is stable over temperature, and has a small spontaneous polarization. The capacitor can reduce audible noise caused by an electrically induced strain in a power supply circuit.

Abstract: A ceramic dielectric composition suitable for preparing capacitors for use in high-temperature service conditions is disclosed. The ceramic material and capacitors made from it exhibit unique and heretofore unrealizable properties including low variation in capacitance with voltage up to high fields, low variation in capacitance with temperature over a broad temperature range, retained high permittivity at temperatures up to 200° C. and beyond, low loss, low field-induced strain and adequate capacitance to retain performance at very low service temperatures. The material is based on sodium bismuth titanate (NBT) with selected additions of substituents and dopants to broaden and flatten its dielectric response, lower loss, lower strain, lower voltage coefficient and increase resistivity.

Abstract: A capacitor with nanotubes and a method for fabricating the same are provided. The capacitor includes: a lower electrode including a patterned conductive layer and a plurality of nanotubes formed on the patterned conductive layer in the shape of whiskers without using a catalytic layer; a dielectric layer formed on the lower electrode; and an upper electrode formed on the dielectric layer. The method includes the steps of: forming a conductive layer for forming a lower electrode; forming a nanotube array including a plurality of nanotubes formed on the conductive layer without using a catalytic layer; forming a dielectric layer on the nanotube array; and forming an upper electrode on the dielectric layer.

Abstract: A multilayer ceramic capacitor includes a plurality of ceramic dielectric layers, a plurality of inner electrode layers and and external electrodes. The ceramic dielectric layers includes barium titanate crystal grains having pores inside. The inner electrode layers are between the ceramic dielectric layers. The external electrodes are electrically connected to the inner electrode layers. The barium titanate crystal grains each have a core-shell structure which include a core and a shell around the core. The the pores are mainly formed in the cores.

Abstract: A circuit board structure with embedded electronic components includes: a carrier board having an adhesive layer with two surfaces formed with first and second metal oxide layers covered by first and second metal layers and having at least one through hole; at least one semiconductor chip received in the through hole of the carrier board; an adhesive material filling a gap between the through hole and the semiconductor chip so as to secure the semiconductor chip in position to the through hole; a high dielectric material layer formed outwardly on the second metal layer; and at least one electrode board formed outwardly on the high dielectric material layer such that a capacitance component is formed with the second metal layer, high dielectric material layer, and electrode board. Accordingly, the capacitance component is integrated into the circuit board structure.

Abstract: A thin-film capacitor assembly includes two plates that are accessed through deep and shallow vias. The thin-film capacitor assembly is able to be coupled with a spacer and an interposer. The thin-film capacitor assembly is also able to be stacked with a plurality of thin-film capacitor assemblies. The thin-film capacitor assembly is also part of computing system.

Abstract: Embodiments are described in which a stacked arrangement of integrated circuit packages comprises a dummy substrate comprising an embedded discrete or distributed capacitor connected to first and/or second power voltages, or an embedded termination register connected to one or more clock, control, address, and/or data signals(s).

Abstract: The invention relates to a high-dielectric constant metal/ceramic/polymer composite material and a method for producing an embedded capacitor. As ceramic particles having a relatively small size are bound to the surface of metal particles having a relatively large size by mixing, the occurrence of percolation can be prevented without coating the metal particles, and at the same time, the capacitance of an embedded capacitor can be increased. In addition, a process for coating the surface of the metal particles can be omitted, thus contributing to the simplification of the overall preparation procedure.

Abstract: A metal-insulator-metal (MIM) capacitor that includes a silicon nitride (SiN) dielectric film is disclosed. The MIM capacitor includes a bottom electrode, a top electrode and a dielectric layer positioned between the bottom electrode and the top electrode. The dielectric layer includes a silicon nitride film that has a plurality of silicon-hydrogen bonds and a plurality of nitride-hydrogen bonds. A ratio of silicon-hydrogen bonds to nitride-hydrogen bonds is equal to or smaller than 0.5. Accordingly, the nitrogen-rich and compressive silicon nitride film can improve the breakdown voltage of the MIM capacitor.

Abstract: Provided are palladium-containing powders and a method and apparatus for manufacturing the palladium-containing particles of high quality, of a small size and narrow size distribution. An aerosol is generated from liquid feed and sent to a furnace, where liquid in droplets in the aerosol is vaporized to permit formation of the desired particles, which are then collected in a particle collector. The aerosol generation involves preparation of a high quality aerosol, with a narrow droplet size distribution, with close control over droplet size and with a high droplet loading suitable for commercial applications. Powders may have high resistance to oxidation of palladium. Multi-phase particles are provided including a palladium-containing metallic phase and a second phase that is dielectric. Electronic components are provided manufacturable using the powders.

Abstract: A dielectric ceramic including a perovskite compound represented by the general formula {(Ba1-x-yCaxSny)m(Ti1-zZrz)O3} as a primary component in which the x, y, z, and m satisfy 0.02?x?0.20, 0.02?y?0.20, 0?z?0.05, and 0.99?m?1.1 and is processed by a thermal treatment at a low oxygen partial pressure of 1.0×10?10 to 1.0×10?12 MPa. Accordingly, there are provided a dielectric ceramic which can be stably used in a high-temperature atmosphere without degrading dielectric properties, properties of which can be easily adjusted, and which generates no electrode breakage even when ceramic layers and conductive films are co-fired, and a ceramic electronic element, such as a multilayer ceramic capacitor, which uses the above dielectric ceramic.

Abstract: The invention aims at providing a dielectric ceramic composition including BamTiO2+m where “m” satisfies 0.99?m?1.01 and BanZrO2+n where “n” satisfies 0.99?n?1.01, an oxide of Mg, an oxide of R where R is at least one selected from Sc, Y, La, Ce, Pr, Nd, Pm, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb and Lu, an oxide of at least one element selected from Mn, Cr, Co and Fe, and an oxide of at least one element selected from Si, Li, Al, Ge and B. 35 to 65 moles of BanZrO2+n, 4 to 12 moles of an oxide of Mg, 4 to 15 moles of an oxide of R, 0.5 to 3 moles of an oxide of Mn, Cr, Co and Fe, and 3 to 9 moles of an oxide of Si, Li, Al, Ge and B are included therein per 100 moles of the BamTiO2+m.

Abstract: A thin film capacitor element composition having a bismuth layered compound with a c-axis oriented substantially vertical to the substrate surface, wherein the bismuth layered compound is expressed by the formula (Bi2O2)2+(Am?1BmO3m+1)2? or Bi2Am?1BmO3M+3, the symbol m in the formula is an odd number, at least part of the Bi and/or A of the bismuth layered compound is substituted by a rare earth element, and the number of moles substituted by the rare earth element is larger than 1.0 and 2.8 or less with respect to the number of moles (m+1) of the total of Bi and A.

Abstract: A capacitor includes a pair of electrically conductive layers; a plurality of substantially or nearly tubular dielectric materials disposed between the pair of electrically conductive layers formed of anodic oxide of metal; first electrodes which are filled in hollow portions of the dielectric materials and connected to one of the electrically conductive layers; and a second electrode that is filled in voids between the respective dielectric materials and connected to the other electrically conductive layer.

Abstract: A method for forming a variable capacitor including a conductive strip covering the inside of a cavity, and a flexible conductive membrane placed above the cavity, the cavity being formed according to the steps of: forming a recess in the substrate; placing a malleable material in the recess; having a stamp bear against the substrate at the level of the recess to give the upper part of the malleable material a desired shape; hardening the malleable material; and removing the stamp.

Abstract: A method of making an orientation-insensitive ultra-wideband coupling capacitor, including the steps of securing an unterminated multi-layer capacitor of a low frequency portion of the orientation-insensitive ultra-wideband coupling capacitor, coating completely the unterminated multi-layer capacitor of the low frequency portion with an adhesion layer having opposing ends, creating a circumferential slot around the adhesion layer and thereby electrically separating the opposing ends of the adhesion layer from each other thereby restoring capacitance and forming a slotted body, applying a solder dam coating to all surfaces defining the circumferential slot to protect the circumferential slot, and plating the opposing ends of the adhesion layer so as to form solderable connections and thereby form the orientation-insensitive ultra-wideband coupling capacitor.

Abstract: A method of forming a conductor on a substrate including steps of depositing tantalum on a glass layer of the substrate; oxidizing the tantalum; and depositing a noble metal on the oxidized tantalum to form the conductor. The method can be used to form a ferroelectric capacitor or other thin film ferroelectric device. The device can include a substrate comprising a glass layer; and an electrode connected to the glass layer. The electrode comprising can include a noble metal connected to the glass layer by an adhesion layer comprising Ta2O5.

Abstract: A multi-tier capacitor structure has at least one multi-tier conductive layer. At least one conductive via passes through the multi-tier conductive layer. When currents flow through the conductive via, different current paths are presented in the conductive via in response to different current frequency; in other words, different inductor is induced. Therefore, a single plate capacitor structure has function of hierarchical decoupling capacitor effect.

Abstract: Disclosed herein are new MIM structures having increased capacitance with little or no tunneling current, and related methods of manufacturing the same. In one embodiment, the new MIM structure comprises a first electrode comprising a magnetic metal and having a magnetic moment aligned in a first direction, and a second electrode comprising a magnetic metal and having a magnetic moment aligned in a second direction antiparallel to the first direction. In addition, such an MIM structure comprises a dielectric layer formed between the first and second electrodes and contacting the first and second magnetic metals.

Abstract: A production method of a multilayer electronic device having an element body configured by alternately stacked dielectric layers formed by using dielectric paste and internal electrode layers formed by using conductive paste: wherein an adding quantity of a co-material included in conductive paste for forming internal electrode layers at the outermost positions in the stacking direction is larger than an adding quantity of a co-material included in conductive paste for forming internal electrode layers at the center position in the stacking direction when adding conductive particles and co-material particles to the conductive paste.

Abstract: A multi-functional composite substrate structure is provided. The first substrate with high dielectric constant and the second substrate with low dielectric constant and low loss tangent are interlaced above the third substrate. One or more permeance blocks may be formed above each substrate, so that one or more inductors may be fabricated thereon. One or more capacitors may be fabricated on the first substrate. Also, one or more signal transmission traces of the system impedance are formed on the second substrate of the outside layer. Therefore, the inductance of the inductor(s) is effectively enhanced. Moreover, the area of built-in components is reduced. Furthermore, it has shorter delay time, smaller dielectric loss, and better return loss for the transmission of high speed and high frequency signal.

Abstract: A method for adapting hearing aids to the individual requirements of a hard-of-hearing patient in situations which are close to reality, wherein an example of a sound and a scene corresponding to said example of a sound are optically indicated to a patient such that the visual impression thereof is also taken into account in order to judge the acoustic result. A suitable device therefor comprises an enclosed area with room for a specialist to carry out the adaptation and room for a patient, a monitor being provided in both places, in addition to a computer which is used by the specialist to carry out said adaptation and which provides the monitors with video sequences.

Abstract: The use of atomic layer deposition (ALD) to form a dielectric layer of hafnium oxide (HfO2) doped with dysprosium (Dy) and a method of fabricating such a combination gate and dielectric layer produces a reliable structure for use in a variety of electronic devices. Forming the dielectric structure includes depositing hafnium oxide using atomic layer deposition onto a substrate surface using precursor chemicals, followed by depositing dysprosium oxide onto the substrate using precursor chemicals, and repeating to form the thin laminate structure.

Abstract: Disclosed is a capacitor with a dielectric layer having a low equivalent oxide thickness compared to a HfO2 layer and capable of decreasing a level of a leakage current incidence and a method for fabricating the same. Particularly, the capacitor includes: a bottom electrode; a Hf1-xLaxO layer on the bottom electrode; and a top electrode on the Hf1-xLaxO layer, wherein x is an integer. The method includes the steps of: forming at least one bottom electrode being made of polysilicon doped with impurities; nitriding a surface of the bottom electrode; depositing the amorphous Hf1-xLaxO layer on the nitrided surface of the bottom electrode; performing a thermal process for crystallizing the amorphous Hf1-xLaxO layer and removing impurities existed within the Hf1-xLaxO layer; nitriding a surface of the crystallized Hf1-xLaxO layer; and forming the top electrode being made of polysilicon doped with impurities on the nitrided surface of the crystallized Hf1-xLaxO layer.

Abstract: A circuit structure is provided. The circuit structure includes a capacitor including a top capacitor electrode; a bottom capacitor electrode parallel to the top capacitor electrode; and an insulating layer between the top and the bottom capacitor electrodes. The insulating layer includes a dielectric rod enclosed by a dielectric material. The dielectric rod has a higher dielectric constant than that of the dielectric material. The circuit structure may be a printed circuit board or packaging substrate, wherein the capacitor is formed between the two layers of the capacitor. Additional dielectric rods may be formed in the insulating layer of the capacitor and spaced apart from the dielectric rods.

Abstract: A metal-insulator-metal capacitor formed in a multilevel semiconductor device utilizes the copper interconnect levels of the semiconductor device as parts of the capacitor. A lower capacitor plate consists of a copper interconnect level and a first metal layer formed on the copper interconnect level by selective deposition methods. The upper capacitor plate includes the same pattern as the capacitor dielectric, the pattern having an area less than the area of the lower capacitor plate. The upper capacitor plate is formed of a second metal layer. The first and second metal layers may each be formed of cobalt, tungsten, nickel, molybdenum, or a combinations of one of the aforementioned elements with boron and/or phosphorus. Conductive vias provide contact from the upper capacitor plate and lower capacitor plate, to interconnect levels.

Abstract: This invention provides novel capacitors comprising nanofiber enhanced surface area substrates and structures comprising such capacitors, as well as methods and uses for such capacitors.

Abstract: A monolithic or essentially monolithic single layer capacitor with high structural strength and capacitance, a printed circuit board having the capacitor mounted thereon, and a method of making. Sheets of green-state ceramic dielectric material and glass/metal composite material are laminated together, diced into individual chips, and fired to sinter the glass and the ceramic together. The composite material contains an amount of metal sufficient to render the composite conductive whereby the composite may be used for one or both electrodes and for mounting the capacitor to the printed circuit board. Vertically-oriented surface mountable capacitors and hybrid capacitors are provided.

Abstract: A dielectric alloy is composed of two dielectric materials that respectively have second-order non-linear dielectric susceptibilities with opposite signs. The composition is adjusted so that the alloy has a second-order non-linear dielectric susceptibility below a chosen threshold. A dielectric layer within an integrated circuit is made using the alloy. More specifically, an integrated capacitor is produced with a single-layer dielectric formed by said alloy.

Abstract: The present invention provides a barium titanate having a small particle size, containing small amounts of unwanted impurities, and exhibiting excellent electric characteristics, which can be employed for forming a dielectric ceramic thin film required for a small-sized capacitor which enables production of a small-sized electronic apparatus; and a process for producing the barium titanate. When a titanium oxide sol is reacted with a barium compound in an alkaline solution containing a basic compound, the basic compound is removed in the form of gas after completion of reaction, and the resultant reaction mixture is fired, a barium titanate having a large BET specific surface area and a high tetragonality content is produced.

Abstract: In one aspect of the invention, a thin layer capacitor element has a capacitor with a dielectric layer made of a metal oxide and a protective insulating layer made of a resin material, and a barrier layer made of a non-conductive inorganic material is provided between the capacitor and the protective insulating layer. In another aspect of the invention, a thin layer capacitor element is constituted so that a capacitor structure is covered with at least one protective insulating layer composed of a cured resin, the cured resin being formed from at least one resin precursor selected from the group consisting of thermosetting resins, photosetting resins and thermoplastic resins.

Abstract: A high voltage capacitor includes multiple conductive strips on each side of a dielectric layer. The conductive strips on one side of the dielectric layer partially overlap conductive strips on the opposite side of the dielectric layer, in effect forming a series combination of subcapacitors. Insulating layers may overlay the conductive strips, sandwiching the strips between one of the insulating layers and the dielectric layer. To decrease the magnitude of the electric field between adjacent conductive strips on the same side of the dielectric layer, the gaps between the adjacent strips are filled with a dielectric liquid during the manufacturing process. The dielectric liquid may be, for example, aromatic oil, silicone oil, mineral oil, synthetic oil, a mixture of different oils, or a mixture of oil or oils with another substance. The resulting decrease in the magnitude of the electric field within the gaps reduces partial discharge in the capacitor.

Abstract: A decoupling module for decoupling high-frequency signals from a voltage supply line, the module including a plurality of parallel-connected capacitors (K1, K2, . . . ), which each have a capacitance (C1, C2, . . . ), and are characterized in that at least one of the capacitors (K1) has an inductance (L1) which is selected dependent on the capacitance (C1) of the capacitor (K1) and the voltage supply line inductance (L12), so that a resonance is generated which compensates the self-resonance of the system from at least a further capacitor (K2, . . . ) and the entire voltage supply line (S). L12 is the inductance of the voltage supply line running between the parallel-connected capacitors.

Abstract: A green sheet coating material includes ceramic powder and a binder resin containing a butyral based resin as the main component, which furthermore includes a xylene based resin as a tackifier. The xylene based resin is included in a range of 1.0 wt % or less, more preferably 0.1 or more and 1.0 wt % or less, and particularly preferably more than 0.1 and 1.0 wt % or less with respect to 100 parts by weight of ceramic powder.

Abstract: A polymer/ceramic composite paste for an embedded capacitor includes an organic solvent, a ceramic powder having a particle diameter of not more than 20 ?m dispersed in the organic solvent, a polymer and a hardener. The use of the polymer/ceramic composite paste enables the formation of a dielectric layer having a high dielectric constant. The polymer/ceramic composite paste can be applied by a screen printing technique and is planarized to locally form a polymer/ceramic composite dielectric layer having a thickness of, e.g., up to 20 ?m on a desired region. Accordingly, electrical parasitics resulting from the formation of a capacitor on unwanted regions can be reduced, and the capacitance error can be reduced.

Abstract: A green sheet coating material including ceramic powder, a binder resin including a butyral based resin as the main component, and a solvent. The solvent includes a first solvent medium having a relatively low boiling point, wherein said binder resin is easy to be dissolved, and a second solvent medium having a relatively high boiling point. The boiling point of the second solvent medium is in a range of 130 to 230° C. The second solvent medium is included by 5 to 70 wt %, and more preferably 8 to 52 wt % with respect to 100 wt % of the entire solvent.

Abstract: A method of producing a multilayer ceramic capacitor having internal electrode layers and dielectric layers with dielectric particles is disclosed. An average particle diameter of the dielectric particles, when measured parallel with the direction of the internal electrode layers, is larger than a thickness of the dielectric layer. A ratio (R/d) between the average particle diameter (R) and the thickness (d) of the dielectric layer is 1<R/d<3.

Abstract: A capacitor structure includes a first electrode structure, a second electrode structure, and a capacitor dielectric. The first electrode structure includes a plurality of first conductive plates vertically disposed and parallel to one another. The second electrode structure includes a plurality of second conductive plates disposed alternately with the first conductive plates. Each first conductive plate includes a plurality of first conductive bars electrically coupled to the first conductive bar stacked thereon with at least a first conductive via. Each second conductive plate includes a plurality of second conductive bars electrically coupled to the second conductive bar stacked thereon with at least a second conductive via.

Abstract: A multilayer ceramic capacitor 1 having internal electrode layers 3, internal dielectric layers 2 having the thickness of less than 2 ?m, and external dielectric layers 20 wherein; the internal dielectric layers 2 and the external dielectric layers 20 include a plural number of dielectric particles 2a, 20a, and when y1 is ratio(D50a/D50b) of D50a and D50b where D50a is an average particle size of dielectric particles 2a included in the internal dielectric layers 2 and D50b is an average particle size of dielectric particles 20a included in the external dielectric layer 20 and located at least 5 ?m away from an internal electrode layer 3a, arranged outermost part of all the internal electrode layers, to the stacked direction, and x is thickness of the internal dielectric layer 2, y1 and x satisfy the following equations, y1??0.75x+2.275 and y1??0.75x+1.675.