Abstract: A lead frame device having a lead frame made of copper, copper alloy or copper compound having a die pad area, within which a chip is to be mounted, and having a multiplicity of leads, which are arranged around the die pad area; and having a die pad made of silicon which is mounted in the die pad area on the lead frame to accommodate the chip.

Abstract: A method and apparatus for cooling heat-producing equipment, the method comprising the steps of directing heat from the heat producing equipment to a cooling loop and, circulating liquid through said cooling loop from a liquid reservoir to a radiator structure. In a first exemplary embodiment, the apparatus comprises a liquid reservoir, a pump, a radiator and a plurality of interface members. In a second exemplary embodiment, the apparatus comprises a liquid reservoir, a pump, a radiator and an air-to-liquid heat exchanger.

Abstract: A lead frame for a semiconductor package includes a base metal layer made of copper (Cu), Cu alloy or iron-nickel (Fe-Ni) alloy, an underlying plating layer formed on at least one surface of the base metal layer and made of Ni or Ni alloy, an intermediate plating layer formed on the underlying plating layer to a thickness of about 0.00025 to about 0.1 &mgr;m (about 0.1 to about 4 microinches) and made of palladium (Pd) or Pd alloy, and an outer plating layer formed in the intermediate plating layer to a thickness of about 0.05 to about 0.75 &mgr;m (about 2 to 30 microinches) and made of silver (Ag) or Ag alloy. Since an Ag plated layer is formed as the outer plating layer, excellent oxidation resistance and corrosion resistance can be exhibited even under a high-temperature thermal condition, thereby improving wire bondability, solderability and good adhesion with epoxy for use in the semiconductor package, and preventing heel crack at a wire bonding portion.

Abstract: An improved multi-chip module includes a main circuit board having an array of electrical interconnection pads to which are mounted a plurality of IC package units. Each IC package unit includes a pair of IC packages, both of which are mounted on opposite sides of a package carrier. The package units may be mounted on one or both sides of the main circuit board. A first primary embodiment of the invention employs a laminar package carrier having a pair of major planar surfaces. Each planar surface incorporates electrical contact pads. One IC package is surface mounted on each major planar surface, by interconnecting the leads of the package with the contact pads on the planar surface, to form the IC package unit. A second primary embodiment of the invention utilizes a carrier substrate which has a pair of recesses for back-to-back surface mounting of the IC package pair. The two IC packages may be in contact with opposite sides of a heat sink layer embedded within the carrier substrate.

Abstract: A semiconductor device package structure is proposed, which allows the encapsulation body to be highly secured in position to the leads, making the encapsulation body hardly delaminated from the leads. The proposed semiconductor device package structure comprises a die pad; a semiconductor chip mounted on the die pad; a plurality of leads arranged around the die pad, each lead being formed with a bolting hole; a plurality of bonding wires for electrically coupling the semiconductor chip to the leads; and an encapsulation body which encapsulates the semiconductor chip and the bonding wires and includes a part filled in the bolting hole in each of the leads. The bolting hole is characterized in the forming of a constricted middle part or an inclined orientation with respect to the lead surface, which allows the encapsulation body to be highly secured in position to the leads, thereby making the encapsulation body hardly delaminated from the leads.

Abstract: A method for manufacturing an aluminum extruded outer frame for LCD display includes the following steps: intrusion and formation of sash portions, diagonal beveling of stiles, stamping process, frame welding and surface polishing and coating. The finished aluminum extruded outer frame of LCD display presents the advantageous features of light weight and outstanding beauty. The LCD display frame made of such aluminum material greatly reduces EMI hazards. Compared with the prior art of LCD frames which are made of plastic material, the aluminum extruded outer frame of LCD display is light-weighted because it does not require reinforcement of metal plates; besides, it is suitable for recycling as the environment protection regulations require.

Abstract: An IC package includes a high thermal conductivity insulating material substrate, such as polycrystalline diamond, on which the IC is mounted for thermal management. The electrical lead pins of the package are electrically connected to the IC and thermally connected to the substrate.

Abstract: A semiconductor device includes a first semiconductor chip, a second semiconductor chip, a multilayer printed circuit board having a first surface whereon the first semiconductor chip is mounted and a second surface whereon external connection terminals are provided, an interposer, and a sealing resin for sealing the first and second semiconductor chips. The interposer holds the second semiconductor chip above the first semiconductor chip such that there is a separation between them while electrically connecting the second semiconductor chip and the multilayer printed circuit board. The sealing resin is formed so as to fill the separation between the first and second semiconductor chips.

Abstract: A lead frame apparatus that includes: an arrangement for dissipating heat generated at the lead frame, wherein the heat dissipating arrangement is uninterruptedly connected to the lead frame. Also contemplated herein are a lead frame heat dissipating apparatus having at least one element for dissipating heat generated at a lead frame and having an arrangement for directly and uninterruptedly connecting with a lead frame, as well as lead frame apparatus comprising an arrangement for directly and uninterruptedly accommodating at least one external element for dissipating heat generated at the lead frame. A method of making a lead frame apparatus involves the provision of a lead frame, the provision of an arrangement for dissipating heat generated at the lead frame, and the uninterrupted connection of the heat dissipating arrangement to the lead frame.

Abstract: A semiconductor device is disclosed. The device includes an integrated circuit chip having integral de-coupling capacitors on the chip backside. The de-coupling capacitors includes a metal layer in intimate contact with the semiconductor substrate of the integrated circuit, a dielectric layer and a second metal layer. The second metal layer is segmented to form multiple capacitors, and each capacitor is interconnected to power supplies of the chip. Interconnection to different integrated circuit packages is provided. A method of making the semiconductor device is also disclosed.

Abstract: To enable readily forming the etching stop layer of a lead frame with multilayer structure by plating without using a large-scale device, enhance adhesive strength between the etching stop layer and an adjacent metal layer and prevent peeling caused by deterioration caused by the invasion of a chemical between the etching stop layer and each adjacent metal layer from occurring, an etching stop layer is formed by nickel or a nickel alloy in a method of manufacturing a lead frame at least provided with an etching process for selectively etching metal layers using an etching stop layer as an etching stopper in a state in which a thick metal layer is formed on one side of the etching stop layer as an intermediate layer and a thin metal layer is formed on the other side and a process for etching the etching stop layer using the metal layers on both sides as a mask.

Abstract: To enable readily forming the etching stop layer of a lead frame with multilayer structure by plating without using a large-scale device, enhance adhesive strength between the etching stop layer and an adjacent metal layer and prevent peeling caused by deterioration caused by the invasion of a chemical between the etching stop layer and each adjacent metal layer from occurring, an etching stop layer is formed by nickel or a nickel alloy in a method of manufacturing a lead frame at least provided with an etching process for selectively etching metal layers using an etching stop layer as an etching stopper in a state in which a thick metal layer is formed on one side of the etching stop layer as an intermediate layer and a thin metal layer is formed on the other side and a process for etching the etching stop layer using the metal layers on both sides as a mask.

Abstract: An apparatus and method wherein an outer die is mounted on an inner die to form a stack which is mounted on a first surface of a substrate, such as a circuit board, the stack may be mounted filly or partially recessed in a recess which is formed in a first surface of the substrate which is dimensioned for receiving at least a portion of a die therein, and where an aperture may be formed in the recess extending through the substrate to a second side thereof for wire bonding the inner die to the substrate.

Abstract: A high density vertical surface mount package and thermal carrier therefor including a heat sink.

Abstract: The invention disclosed herein is a device and method in which a heat sink (22) is attached to support leads (18) of a leadframe (10) via a welding or mechanical joining technique. The method is performed prior to semiconductor device packaging and is usually performed after the leadframe is etched or stamped, and before it is cut into strips.

Abstract: In manufacturing an encapsulated optocomponent, the optocomponent is embedded in a plastics material. The optocomponent has guide grooves on one of its surfaces in which guide pins are to extend so that the encapsulated optocomponent will obtain an optical interface of standard type. For the encapsulating operation guide pins are placed in a mold cavity in a mold half and the optocomponent is placed in the cavity in the mold, so that the guide pins are engaged in the guide grooves and ar accurately inserted therein. To achieve this effect, a resilient or elastic force such as from plunger is applied to the other side of the optocomponent, so that it is pressed with some force against the guide pins. The cavity in the mold is then closed by placing a second mold half on top after which the encapsulating material can be introduced in the closed cavity in the mold.

Abstract: A conductive plastic lead frame and method of manufacturing same suitable for use in IC packaging. In a preferred embodiment, the lead frame is constructed of a plastic or polymer based lead frame structure with an intrinsic conductive polymer coating. In a second embodiment, the lead frame is a composite plastic or polymeric material intermixed with an intrinsic conductive polymer coating.

Abstract: A method is described for producing electric modules, where a power module is attached to a fastening part with an adhesive, with the adhesive first being precured in an edge area, and in another step the power module is encased in a gel. In another step, the gel and the adhesive are fully cured together in one step. This method is cost- and time-optimized for producing a compact electric module with power modules that have a high power loss and are exposed to high mechanical stresses.

Abstract: A conductive plastic lead frame and method of manufacturing same suitable for use in IC packaging. In a preferred embodiment, the lead frame is constructed of a plastic or polymer based lead frame structure with an intrinsic conductive polymer coating. In a second embodiment the lead frame is a composite plastic or polymeric material intermixed with an intrinsic conductive polymer coating.

Abstract: The present invention relates to a stack package, as well as a method for fabricating the same, the stack package includes at least two semiconductor chips disposed up and down. Bonding pads are formed in the respective semiconductor chips along a center line. Inner leads of a first lead frame and a second lead frame are attached to bonding pad-disposed faces of the respective semiconductor chips. The inner lead of each lead frame is electrically connected to its corresponding bonding pad by means of metal wires. The inner lead of the first lead frame is also electrically connected to the second lead frame. The entire structure is molded with an epoxy compound so as to expose a connecting part between the first and second lead frames and an outer lead of the second lead frame.

Abstract: A semiconductor device includes multiple dies, in which a first die and a second die are mounted on a leadframe. The bond pads on the first and second dies are wirebonded to the leadframe. The first die, second die, and leadframe are encapsulated in a package.

Abstract: A power package lead frame comprises a lead frame, a chip attached to the lead frame, and a mold encasing the chip and a portion of the lead frame. The lead frame comprises a paddle part, a radiation plate, and a leg part. The radiation plate comprises a first plate extending from the paddle part and a second plate extending from the first plate. The first and second plates have the same thickness as the paddle part or the leg part. The second plate is folded towards the first plate and fixed tightly thereto, so that the radiation plate is twice as thick as the paddle part or the leg part.

Abstract: An overmolded electronic assembly (10) and method for forming the assembly (1) that entails enclosing a circuit board (12) having one or more circuit devices (16) mounted to its surface. The assembly (10) includes a heat-conductive member (18) in thermal contact with one or more of the circuit devices (16) mounted to the circuit board (12). An overmolded body (22) encloses the circuit board (12) and the circuit devices (16) with the heat-conductive member (18), such that the overmolded body (22) and heat-conductive member (18) form a moisture-impermeable seal around the circuit board (12) and circuit devices (16). The overmolded body (22) also includes a connector housing (28) integrally-formed in its outer surface. The method for manufacturing the overmolded electronic assembly (10) generally entails supporting the circuit board (12) with the heat-conductive member (18) such that the heat-conductive member (18) thermally contacts the circuit devices (16).

Abstract: A system and method for conducting heat from electrical devices mounted on a circuit board is disclosed. A heat sink for conducting the heat is provided that includes a pair of substantially parallel vertical legs and a horizontal member coupled between the pair of substantially parallel vertical legs to form a “U” shape. The horizontal member includes an outer surface and an inner surface both having a layer of thermal interface material. The heat sink is surface mountable to a heat sink mounting pad on a surface of a printed circuit board. The heat sink mounting pad is adjacent to and thermally coupled to a heat transfer pad of an electronic device. The heat sink is thermally coupled to the electronic device.

Abstract: An electronic device package with enhanced heat dissipation effect comprises a lead frame and an outer frame with electrically insulating surface. The outer frame encloses the electronic device with a predetermined gap therebetween. The lead frame has a plurality of inner leads extending to the upper surface of the electronic device and a plurality of outer leads enclosing the outer surface of the outer frame. Each inner lead and each outer lead are linked by a slanting portion. The plurality of outer leads includes at least one ground outer lead with larger cross section area than other outer leads. Therefore, the heat generated by the electronic device can be conducted outside through the ground outer lead when the ground outer lead is connected to other device.

Abstract: A multiple die package may include a pair of dies having bonding pads and a front surface on which the bonding pads are located. The front surface is facing the same direction. At least one of the dies is secured to a lead frame. A spacer spaces the die from one another. At least one of the dies is spaced from the leadframe by a distance greater than the thickness of the die.

Abstract: A semiconductor device of the present invention comprises a semiconductor pellet, a radiation plate mounted with the semiconductor pellet, a plurality of lead terminals electrically connected with the semiconductor pellet, and a resin member for encapsulating the above items. The resin member has a first surface and a second surface, and the radiation plate has a first portion exposed to the outside from the first surface of the resin member and a second portion exposed to the outside from the second surface of the resin member.

Abstract: A semiconductor device comprises a semiconductor chip having a major surface, a plurality of bonding pads provided on the major surface of the semiconductor chip, an adhesive tape provided on a selected part of the major surface of the semiconductor chip, and a plurality of inner leads mounted on the adhesive tape, each adhered at a lower surface thereof to the adhesive tape. The device further comprises a wiring lead, bonding wires, and a resin-molded package. The wiring lead has at least one end portion and spaced apart from the major surface of the chip. The at least one end portion is depressed from the inner leads toward the semiconductor chip, located outside the adhesive tape and formed integral with at least one of the inner leads.

Abstract: Electronic system utilizing semiconductor devices having heat dissipating leadframes are provided by using materials, such as copper, which exhibit good thermal and electrical conductivity, and arranging the lead fingers of the leadframe in a configuration which provides good thermal coupling with the surface of a semiconductor die. Micro-bump bonding techniques are employed to provide additional thermal coupling at the electrical connection point of the leadframe fingers to the die. Leadframe fingers exhibiting a high aspect ratio (height:width) are described. Leadframe fingers extending substantially beyond interior bond pads are described.

Abstract: A quad flat pack (QFP) integrated circuit package that is modified to include a tab that increases the thermal efficiency of the package. The package contains an integrated circuit that is mounted to a die paddle of a lead frame. A plurality of leads extend from a first side of the die paddle. Placing all of the leads on one side of the package minimizes the difference in signal length between the leads. The tab extends from a second side of the die paddle. Both the leads and the tab extend from a plastic housing which encapsulates the integrated circuit. The tab provides a large conductive area which increases the heat transfer rate from the integrated circuit to the ambient, or an external thermal element. The package may have a thermal element such as a clip or cover that is coupled to the tabs of adjacent integrated circuit packages.

Abstract: A semiconductor package comprises a semiconductor chip having bonding pads in the center area of surface thereof; a plurality of leads disposed on and attached to the upper surface of the chip by an attaching means. The attaching means covers all but the bonding pads of the chip. The leads have a bonding tip which is disposed on the side thereof and electrically connected to the bonding pads by bonding wires, and are arranged horizontally along the surface of the chip thereby providing large contact areas to the chip. A molding compound hermetically encloses the chip and the attaching means, and exposes the leads. The semicoductor package can be used in combination with an electrical circuit board having improved heat dissipation capability. The electrical circuit board includes a substrate comprised of a dielectric material, a circuit wiring formed on the substrate, and a plurality of heat dissipation pins disposed on the substrate in a pattern corresponding to leads of the semiconductor package.

Abstract: A method and apparatus are provided for mounting a Very Large Scale Integration (VLSI) chip such as a microprocessor on the back plane of a computer chassis. In one embodiment, the mounting on the computer chassis is configured to provide a current supply connection for delivering a high level of current to the microprocessor from a current source through the computer chassis. Also provided are a method and apparatus for mounting a VLSI chip such as a microprocessor on the chassis of a computer system in order to dissipate heat from the VLSI chip to the ambient outside the computer system through the computer chassis. Also provided are a method and apparatus for signal interconnections among one or several VLSI chips such as microprocessors mounted on the chassis of a computer to provide signal capacity with strong integrity. Also provided are a method and apparatus for mounting a power supply for a VLSI chip package on the back chassis of a computer.

Abstract: A quad flat pack (QFP) integrated circuit package that is modified to include a tab that increases the thermal efficiency of the package. The package contains an integrated circuit that is mounted to a die paddle of a lead frame. A plurality of leads extend from a first side of the die paddle. Placing all of the leads on one side of the package minimizes the difference in signal length between the leads. The tab extends from a second side of the die paddle. Both the leads and the tab extend from a plastic housing which encapsulates the integrated circuit. The tab provides a large conductive area which increases the heat transfer rate from the integrated circuit to the ambient, or an external thermal element.

Abstract: A lattice of a plurality of individual lead frames allows concurrent or simultaneous molding of a plurality of integrated chips formed in a wafer. The lattice includes a plurality of lead supporting bars arranged in rows and columns and a plurality of leads attached to corresponding ones of the plurality of supporting bars. The plurality of lead supporting bars align with chip partition lines defining each individual integrated chip formed in the wafer. During fabrication, a plurality of individual lead frames is correspondingly attached to a plurality of individual integrated chips formed in a wafer. A plurality of wires are bonded between the plurality of chip pads and the plurality of leads. The wafer is molded such that the plurality of individual lead frames, the plurality of wires, the first surface of the plurality of individual integrated chips and the plurality of chip pads are molded with an epoxy compound with portions of the plurality of leads exposed.

Abstract: In semiconductor packaging, a method and device for reducing thermal stress on a die and for reinforcing the strength of a die. A thermally-conductive member is positioned in a cooperating manner with the die during the packaging process.

Abstract: A quad flat pack (QFP) integrated circuit package that is modified to include a tab that increases the thermal efficiency of the package. The package contains an integrated circuit that is mounted to a die paddle of a lead frame. A plurality of leads extend from a first side of the die paddle. Placing all of the leads on one side of the package minimizes the difference in signal length between the leads. The tab extends from a second side of the die paddle. Both the leads and the tab extend from a plastic housing which encapsulates the integrated circuit. The tab provides a large conductive area which increases the heat transfer rate from the integrated circuit to the ambient, or an external thermal element.

Abstract: A unit printed circuit board (PCB) carrier frame used in the fabrication of a heat sink-attached ball grid array (BGA) semiconductor packages and a method for BGA semiconductor packages using the unit PCB carrier frame. The unit PCB carrier frame has a plurality of die pads each defined at its peripheral edges by elongated slots formed at a strip or reel-shaped frame member. For the fabrication of heat sink-attached BGA semiconductor packages, unit PCBs are bonded to the die pads of the unit PCB carrier frame. Accordingly, the bending of the packages is minimized even when they pass through subsequent processes requiring a high temperature. As a result, it is possible to obtain a maximum number of unit PCBs from a PCB panel, thereby achieving an improvement in productivity.

Abstract: A semiconductor package is provided. A semiconductor chip including bonding pads has a plurality of leads disposed on and attached to the upper surface of the semiconductor chip. The leads include bonding tips that are electrically connected to the bonding pads by bonding wires. A molding compound encapsulates the chip and portions of the leads. Upper portions of the leads extend from the molding compound. The exposed upper portions of the leads may be connected to a circuit board. Heat dissipation from the semiconductor chip is facilitated with the disclosed package.

Abstract: An electronic component provided with a heat radiative ceramic plate that is protected from cracks. Such a heat radiative electronic component is composed of an electronic device, such as a semiconductor device with an integrated circuit built therein, having a heat radiative plate bonded on its upper surface. The heat radiative plate is formed by a ceramic plate coated with a resin layer. The ceramic plate is a 1 mm to 2 mm thick quadrangular plate prepared by sintering cordierite powder, which has a high emissivity of far-infrared rays. The resin layer entirely or partly covers the surface of the ceramic plate, thereby preventing the plate from breaking and/or chipping and scattering ceramic powder to the surrounding area.

Abstract: The present invention is provided with a transfer-mold package wherein the surface of a heat sink on which a semiconductor chip dissipating a large amount of heat is formed (the surface does not contact the chip) is exposed from the sealing resin. In this package, a concave portion 16a is formed in the surface of the heat sink to a depth of about 0.1 mm within a range of about 1 mm from the periphery of the heat sink. The concave portion prevents the sealing resin from extending toward the surface of the heat sink at the time of transfer mold, with the result that a resin burr can be prevented from occurring on the periphery of the surface of the heat sink exposed from the sealing resin, and the flatness of the surface of the heat sink can be prevented from being degraded by the resin burr.

Abstract: The present invention relates to a heat-dissipating and supporting structure for a semiconductor electronic device to be encapsulated within a molded plastic material package, of the type having an insulated inner heat sink. In particular, it comprises a heat-sink element which has a first largest surface to be insulated by means of a plastic material layer with a first thickness, and a second largest surface, opposite from the first, to be insulated by means of a layer of plastic material with a second thickness which is thin compared to the first thickness; and a leadframe consisting of a metal strip attached to the heat-sink element on the same side as the first largest surface and comprising a peripheral holder structure located outside the heat-sink element.

Abstract: An electronic load relay which can be manufactured in an uncomplicated and cost effective manner can, because of an arrangement of its contact-plug parts, replace an electromechanical load relay. This invention particularly solves the problem of heat dissipation from an electronic power switch in a beneficial manner by having an electronic power switch thermally and electrically directly coupled to a metallic wiring support, or board, which forms a plug contact assembly.

Abstract: A BGA (ball grid array) semiconductor package with a ring-type heat sink is disclosed. In the above package, the heat dissipating area is enlarged by extending the edge of a chip mounting die paddle formed of a copper or copper alloy layer to the outside of the package. The ring-type heat sink is attached to the extended portion of the die paddle such that the heat sink surrounds the encapsulant of the package. The above BGA package thus directly and effectively dissipates the chip's heat through the heat sink with high thermal conductivity. A plurality of plated through holes may be formed on the chip mounting portion of the PCB of the above package. The BGA package with both the ring-type heat sink and the PTHs, the heat dissipating effect of the package is further improved.

Abstract: An IC package includes a high thermal conductivity insulating material substrate, such as polycrystalline diamond or diamond-coated silicon carbide or molybdenum, on which the IC is mounted for thermal management. The electrical lead pins of the package are electrically connected to the IC and thermally connected to the substrate. The thermal connection can be by bonding the pins directly to the substrate.

Abstract: A lead-on-chip integrated circuit assembly comprising at least one extremely thin adhesive layer transferred from a carrier onto the face of an integrated circuit chip, and a lead frame laminated to the last adhesive layer, with cured adhesive acting as an insulator, wherein said lead frame is aligned and connected to integrated circuit chip connection pads. This lead-on-chip integrated circuit assembly may be encapsulated. Thermally conductive and electrically insulating filling may be included with the adhesive to improve heat conduction from the integrated circuit ("IC"). Compliant adhesive reduces thermally induced stresses between the lead frame and IC chip. Both the improved thermal performance and reduced moisture absorption of the encapsulated assembly improves the reliability of the integrated circuit package.

Abstract: A leadframe for electronic semiconductor devices incorporates one or two metal bars fastened to a heat dissipator by electroconductive means.Each bar has a metallized area for the electric connection, by means of a bonding wire, with a semiconductor chip placed on the dissipator.According to the present invention, the metallized areas are lowered in relation to the upper surface of the metal bar, so that lead frames can be stacked, during packing and transportation, directly on each other without danger of damaging the metallized areas.

Abstract: A package for a power semiconductor device is made using the method comprising the steps of preparing a lead frame including a blade or paddle for providing a semiconductor chip on a top surface thereof, tie bars for supporting said paddle, wherein said paddle being provided lower in horizontal surface than the leads; attaching a heat radiating plate on a bottom surface of the paddle by cladding; attaching a Kovar plate on the top surface of the paddle by soldering, said Kovar plate having similar heat expansion coefficient to that of the chip; providing the chip on the Kovar plate by soldering; wire-bonding terminals of said semiconductor chip to the corresponding leads of the lead frame, respectively; coating polyimide over the semiconductor chip by spin-coating; curing the polyimide coated thus; forming a metal cap above the said paddle by soldering, and injecting a molding material into a molder for enclosing the paddle and curing the molding material injected thus.

Abstract: A leadframe for use in an integrated circuit package including at least one integrated circuit die attached to the leadframe and an encapsulant material surrounding the die and portions of the leadframe is herein disclosed. The leadframe includes a central portion having a plurality of perforations through the central portion adapted to allow the flow of the encapsulant material through the perforations during the molding process of the manufacture of the integrated circuit package thereby (i) preventing the flow of the encapsulant material from shifting the die attach pad during the manufacture of the package and (ii) providing anchoring for the encapsulant material to the leadframe to prevent delamination and cracking of the package.

Abstract: A lead frame package for housing an integrated circuit. A lead frame (11) having a plurality of leads (13) extending from at least three sides of the package. Lead frame (11) is formed having a first region (18), a transition region (19), and a second region (21). A distance between a heat sink (12) and the lead frame (11) may vary. The offset is chosen to compensate for a predetermined distance between the heat sink (12) and the lead frame (11) such that the lead frame (11) aligns to lead frame handling equipment. A single lead frame manufacturing setup can then be used. A slot (22) is formed in the lead frame (11) extending through the second region (21) and the transition region (19) into first area (18) providing a path for injecting an encapsulation material into a mold.

Abstract: Disclosed is a semiconductor package which permits coupling of semiconductor bond pads to I/O leads where a high density of connections is needed. Conductive fingers backed by an insulating tape are bonded to the ends of the ringers on a lead frame. The tape fingers are electrically coupled to the bond pads on one major surface of the semiconductor chip by wire bonding. In one embodiment, the opposite major surface of the chip is bonded to a paddle on the lead frame through an aperture in the tape for maximum heat dissipation.