Welded Connection Patents (Class 361/745)
  • Patent number: 7295445
    Abstract: Methods and apparatus to couple a device, such as, for example, a surface mount device, with a substrate, such as, for example, a printed circuit, are disclosed. An apparatus, according to one aspect, may include a substrate, a plurality of terminals coupled with the substrate, a conductive bonding material coupled with the plurality of terminals, an electronic device coupled with the conductive bonding material, and a holder that is coupled with the substrate to hold the electronic device. A method, according to one aspect, may include coupling a holder with a substrate such that terminals of the substrate are included in an opening of the holder, mounting an electronic device over the terminals with a conductive bonding material disposed therebetween, heating the conductive bonding material to its melting point, and cooling the conductive bonding material.
    Type: Grant
    Filed: September 30, 2004
    Date of Patent: November 13, 2007
    Assignee: Intel Corporation
    Inventor: Jang My
  • Patent number: 6890184
    Abstract: An electrical connector for conveying signals between two circuit boards includes a first connector portion including a first array of board contacts for connection to a first corresponding footprint on a first circuit board. The connector also includes a second connector portion including a second array of board contacts for connection to a second corresponding footprint on a second circuit board. The signals include a plurality of signal groups each including a different plurality of related signals. Each of the signal groups is assigned to a grouping of related board contacts of the first array and to a corresponding grouping of related board contacts of the second array. When the first connector portion and the second connector portion are mated, each grouping of board contacts of the first array is electrically coupled to the corresponding grouping of board contacts in a transposed location in the second array.
    Type: Grant
    Filed: April 10, 2003
    Date of Patent: May 10, 2005
    Assignee: Sun Microsystems, Inc.
    Inventors: Drew G. Doblar, Han Y. Ko, Stephen K. Gee
  • Patent number: 6628530
    Abstract: A shielded case includes a plurality of walls. At least one of the walls is formed by at least first and second separate sections which abut one another along an interface. A depression is formed in at least one of the first and second sections so as to cause at least one of said sections to expand toward the other of section thereby pressure-welding said first and second sections to one another along at least part of said interface.
    Type: Grant
    Filed: July 10, 2001
    Date of Patent: September 30, 2003
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Tadashi Takaya
  • Patent number: 6437989
    Abstract: This circuit board contains electronic components having electrical contacts. At least one of the electrical contacts is initially glued to the circuit board using a conductive adhesive and at least one of the electrical contacts is connected to the circuit board by soldering. The circuit board is suitable for fast mechanical mass production. Further a method for the manufacture of the connection between the circuit board and the electronic components is disclosed, in which a solder is applied to soldering points and a conductive adhesive is applied to adhesive points. The circuit board with the components is then placed in a furnace to connect the components to the circuit board.
    Type: Grant
    Filed: May 24, 2000
    Date of Patent: August 20, 2002
    Assignee: Endress + Hauser GmbH + Co.
    Inventors: Sergej Lopatin, Dietmar Birgel, Karl-Peter Hauptvogel
  • Patent number: 6379997
    Abstract: A semiconductor device includes a semiconductor element, a holding substrate holding the semiconductor element, a frame body provided on the holding substrate so as to surround the semiconductor element and having a hole which communicates to a space formed between the holding substrate and the frame body and the frame body and the holding substrate form a housing, a plurality of leads having inner lead portions connected to the semiconductor element and outer lead portions extending outside the frame body, and a resin filling the space and encapsulating the semiconductor element and the inner lead portions. All of the outer lead portions extend outside the housing from one side of the housing.
    Type: Grant
    Filed: June 13, 2000
    Date of Patent: April 30, 2002
    Assignees: Fujitsu Limited, Kyushu Fujitsu Electronics Limited
    Inventors: Toshimi Kawahara, Sinya Nakaseko, Mitsunada Osawa, Mayumi Osumi, Hiroyuki Ishiquro, Yoshitugu Katoh, Junichi Kasai, Shinichirou Taniguchi, Yuji Sakurai
  • Patent number: 6198634
    Abstract: An electronic package which includes first and second circuitized substrates secured together by a solder member which includes a first contact portion for attachment to a printed circuit board and a second contact portion used to bond the two substrates together (e.g., to form a multi-chip module). Semiconductor chips can be positioned on and electrically coupled to the formed solder members.
    Type: Grant
    Filed: March 31, 1999
    Date of Patent: March 6, 2001
    Assignee: International Business Machines Corporation
    Inventors: Gregg J. Armezzani, Matthew A. Heller