With Specific Dielectric Material Or Layer Patents (Class 361/750)
  • Patent number: 7601419
    Abstract: Disclosed are a printed circuit board and a method of manufacturing the same, in which a fluorine resin coating layer is formed on a resin substrate, and then a copper layer is formed using a dry process including ion beam surface treatment and vacuum deposition instead of a conventional wet process including surface roughening and electroless copper plating. According to this invention, the interfacial adhesion of the substrate material may be increased without changing the surface roughness thereof, thus realizing a highly reliable fine circuit. As well, a low dielectric constant and a low loss coefficient may be obtained thanks to the formation of the fluorine resin layer. Further, a wet process is replaced with a dry process, whereby the copper plating layer may be formed in an environmentally friendly manner.
    Type: Grant
    Filed: October 24, 2006
    Date of Patent: October 13, 2009
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jong Seok Song, Taehoon Kim
  • Patent number: 7596000
    Abstract: The disclosure relates to a signal transmitting apparatus. The signal transmitting apparatus includes a conductor, a first and a second circuit boards, and a signal transmitting medium that is electrically interconnected between the first circuit board and the second circuit board. The signal transmitting medium includes a ground wire and an insulating layer wrapping the ground wire, wherein at least an end portion of the ground wire is not wrapped by the insulating layer and is bent to overlap the insulating layer and electrically connected to the conductor via a conductive adhesive material so as to conduct the electrostatic charges accumulated in the signal transmitting medium to the conductor as a ground.
    Type: Grant
    Filed: July 31, 2006
    Date of Patent: September 29, 2009
    Assignee: Lite-On It Corp.
    Inventors: Shih-Lin Yeh, Jung-Fu Chen, Min-Cheng Yang
  • Patent number: 7583508
    Abstract: A strap controller (input device) includes a band-shaped strap, a connecting member which connects the strap in a looped shape, and a connecting cord which connects the connecting member to a portable audio device.
    Type: Grant
    Filed: May 9, 2003
    Date of Patent: September 1, 2009
    Assignee: Alps Electric Co., Ltd.
    Inventors: Yasuji Hagiwara, Junichi Inamura
  • Patent number: 7561434
    Abstract: A wired circuit board is provided having a high-reliability conductive pattern formed thereon and mounting an electronic component thereon with high accuracy, and a method is provided for manufacturing the wired circuit board and mounting the electronic component thereon. An insulating layer including a mounting portion is formed on a metal supporting layer having a specular gloss of 150 to 500% at an incidence angle of 45°. A conductive pattern is formed on the insulating layer. By a reflection-type optical sensor, a defective shape of the conductive pattern is inspected. Then, an opening is formed by etching the portion of the metal supporting layer which is overlapping the mounting portion such that the mounting portion of the insulating layer exposed by etching has a haze value of 20 to 50%, whereby a TAB tape carrier is obtained.
    Type: Grant
    Filed: November 13, 2006
    Date of Patent: July 14, 2009
    Assignee: Nitto Denko Corporation
    Inventors: Kei Nakamura, Hitoshi Ishizaka
  • Publication number: 20090173529
    Abstract: A circuit structure and a fabrication method thereof manly use a plurality of wires to connect in series a plurality of pads to form a stretchable circuit. Each of the wires has a first end, a second end and an intermediate segment located between the first end and the second end, wherein the first end and the second end are respectively connected to different pads, and the position of the intermediate segment is higher than the positions of the first end and the second end. Since the connection manner of the wires and the pads has 3-D freedoms, the circuit structure can withstand both horizontal and vertical deformations and has an outstanding reliability.
    Type: Application
    Filed: August 11, 2008
    Publication date: July 9, 2009
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Yuan-Chang Lee, Yu-Hua Chen, Ying-Ching Shih, Cheng-Ta Ko
  • Publication number: 20090167638
    Abstract: A flexible film is provided. The flexible film includes a dielectric film; and a metal layer disposed on the dielectric film, wherein the dielectric film has a thermal expansion coefficient of about 3 to 25 ppm/° C. The flexible film is robust against temperature variations and has excellent thermal resistance and excellent dimension stability.
    Type: Application
    Filed: May 22, 2008
    Publication date: July 2, 2009
    Inventors: Sang Gon Lee, Dae Sung Kim, Woo Hyuck Chang
  • Publication number: 20090162607
    Abstract: A flexible film is provided. The flexible film includes a dielectric film, a metal layer disposed on the dielectric film, and at least one hole formed through the dielectric film and the metal layer. Therefore, it is possible to facilitate the alignment of circuit patterns on a flexible film with an electrode of a panel of a display device or a circuit of a driving unit of a display device.
    Type: Application
    Filed: May 22, 2008
    Publication date: June 25, 2009
    Inventors: Sang Gon Lee, Dae Sung Kim, Woo Hyuck Chang
  • Patent number: 7547849
    Abstract: A light-activatable polymer composition and polymer composite includes a polymer binder selected from epoxy resins, silica filled epoxy, bismaleimide resins, bismaleimide triazines, fluoropolymers, polyesters, polyphenylene oxide/polyphenylene ether resins, polybutadiene/polyisoprene crosslinkable resins (and copolymers), liquid crystal polymers, polyamides, cyanate esters, or combinations thereof, the polymer binder being present in an amount from 40, 45, 50, 55, 60, 65, 70, 75, 80, 85, 90, 95, 96, or 97 weight-percent of the total weight of the polymer composition; a spinel crystal filler present in an amount from 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 20, 25, 30, 35, 40, 45, 50, 55 and 60 weight-percent of the total weight of the polymer composition, and methods for making same are provided.
    Type: Grant
    Filed: June 15, 2005
    Date of Patent: June 16, 2009
    Assignee: E.I. Du Pont de Nemours and Company
    Inventors: Yueh-Ling Lee, Meredith L. Dunbar, Harry Richard Zwicker, Carl B. Wang, Brian C. Auman, Shane Fang
  • Patent number: 7545649
    Abstract: A flexible printed circuit board includes a flexible substrate having a first region, a second region and a third region; a first conductive foil layer disposed on a lower surface of the flexible substrate, so as to cover the first region, the second region and the third region; a first cap layer disposed on the first conductive foil layer; an second conductive foil layer disposed on an upper surface of the flexible substrate, so as to cover the first region, part of the second region, and the third region, and to expose part of the flexible substrate on the second region; and a second cap layer disposed on the second conductive foil layer.
    Type: Grant
    Filed: April 11, 2006
    Date of Patent: June 9, 2009
    Assignee: AU Optronics Corp.
    Inventor: Ming-Yen Tan
  • Patent number: 7471519
    Abstract: A wired circuit board that can prevent inconsistency in characteristic impedance to allow effective transmission of electrical signals from a magnetic head to a control board portion. A wired circuit board is constructed so that a suspension board portion for supporting the magnetic head and a control board portion for controlling the magnetic head are formed to be continuous and integral with each other. To be more specific, a first conductor layer connected to the magnetic head in the suspension board portion and a second conductor layer connected to a preamplifier IC in the control board portion are formed from the same material and formed on a common insulating base layer simultaneously. Further, a common insulating cover layer to cover the first conductor layer and the second conductor layer is formed on the common insulating base layer.
    Type: Grant
    Filed: July 25, 2005
    Date of Patent: December 30, 2008
    Assignee: Nitto Denko Corporation
    Inventors: Yasunari Ooyabu, Yasuhito Funada, Hitoki Kanagawa, Tetsuya Ohsawa
  • Patent number: 7453700
    Abstract: A display device is arranged such that a voice device (2) is laminated on a liquid crystal panel (1) so as to be confined in a planar area of the liquid crystal panel (1), and a voice-system circuit block which drives the voice device (2) is formed on the thin film substrate (10) of the liquid crystal panel (1). A signal is inputted into the voice-system circuit block through an FPC (4) which is connected to the thin film substrate (10) and which inputs a video signal, and the signal processed at the voice-system circuit block is conducted through the FPC (4). A connecting terminal part (4a) is provided in a middle portion of the FPC (4) and adhered to an FPC (5). One end of the FPC (5) is connected to the voice device (2). In this way, a multifunctional display device can be achieved at low cost by efficiently using a limited space around the display element without sacrificing the advantages of a lightweight and thin-shaped flat display device.
    Type: Grant
    Filed: February 20, 2004
    Date of Patent: November 18, 2008
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Kazuhiko Miyata
  • Patent number: 7447040
    Abstract: Provided is a flexible printed circuit board (FPCB) including a circuit connector connected to a circuit board connector of a printed circuit board (PCB) for electronic equipment. A first compression part and a second compression part are included in the circuit connector, and a folding part is provided at a first plating interface between the first compression part and the second compression part such that a second plating interface, instead of a first plating interface of the first compression part and the second compression part, is folded by a force generated when the circuit connector is connected to the circuit board connector.
    Type: Grant
    Filed: February 1, 2006
    Date of Patent: November 4, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sang-Bo Kim
  • Patent number: 7436057
    Abstract: An electronic module and a method of assembling the electronic module. A circuit board is connected to a chip substrate by an array of connectors, and a base member is on the side of the circuit board away from the chip substrate and connector array. An elastomeric structure is placed between the circuit board and the base member. The elastomeric structure has voids between a first defining plane adjacent the circuit board and a second defining plane adjacent the base member, with the voids adapted to permit local deformation of elastomeric material in the structure. The method includes applying a compressive force between the circuit board and base member to at least partially compressing the elastomeric structure to improve load equalization on the circuit board.
    Type: Grant
    Filed: September 8, 2005
    Date of Patent: October 14, 2008
    Assignee: International Business Machines Corporation
    Inventors: David C. Long, William L. Brodsky, Jason S. Miller, John G. Torok, Jeffrey A. Zitz
  • Patent number: 7430799
    Abstract: A method for preforming of two or more flexible cables in an arrangement consisting of a combination of rigid printed circuit boards and flexible cable sections extending therebetween. Moreover, also provided is an apparatus for the preforming of two or more flexible cable sections of a combination of rigid printed circuit boards and therewith interposed flexible cable sections which are adapted to interconnect the rigid printed circuit boards. The apparatus consists of a tool constituted of an elongated cylindrical member having a tapered leading end which narrows into an ultra-thin flat end section of a blade-like configuration, and which is adapted to be pushed between the flexible cables and so as to preform the flexible cable sections and cause them to yield in a predetermined outwardly bowed permanently relationship between the rigid printed circuit boards at the opposite ends thereof to lengthen the fatigue life of the conductors in the flexible cable sections.
    Type: Grant
    Filed: December 29, 2004
    Date of Patent: October 7, 2008
    Assignee: International Business Machines Corporation
    Inventors: Lee Curtis Randall, Thomas Stanley Truman, Daniel James Winarski, George G. Zamora
  • Publication number: 20080158470
    Abstract: A flexible circuit board and a liquid crystal display having the same prevents emission of light from a light source to peripheral undesired areas, and firmly connects the board to a mold frame. The board includes a first insulating film, conductive patterns formed on the first insulating film, a second insulating film formed on the first insulating film to cover the conductive patterns, a light source coupled to the conductive patterns, and a light absorbing layer formed on the outer circumference of the light source to absorb light from the light source. Also, a mold frame includes an outer frame, an inner frame, and a guide boss. The board is connected to the mold frame, the light guide plate is connected to the mold frame and optically coupled to the board, and the liquid crystal display panel is placed on the light guide plate and coupled to the board.
    Type: Application
    Filed: December 3, 2007
    Publication date: July 3, 2008
    Applicant: Samsung SDI Co., Ltd.
    Inventors: Jaemo Chung, Sunghwan Kim, Jinhee Sung
  • Publication number: 20080144295
    Abstract: An exemplary flexible printed circuit board includes a flexible base film, a number of signal traces formed on the flexible base film, and at least a grounding metal layer formed on the flexible base film. The grounding metal layer defines a number of openings therein thereby forming a mesh-like pattern. The flexible printed circuit board can disperse and reduce stress caused by bending, thereby preventing wires from becoming broken/cracked and enhancing flexibility.
    Type: Application
    Filed: April 9, 2007
    Publication date: June 19, 2008
    Applicant: FOXCONN ADVANCED TECHNOLOGY INC.
    Inventors: MING WANG, I-HSIEN CHIANG
  • Patent number: 7384683
    Abstract: The present invention provides a substrate for a flexible printed wiring board including an adhesive layer containing an epoxy resin composition, insulating layers respectively stacked on both sides of the adhesive layer and formed with a pair of films containing a nonthermoplastic polyimide resin, and conductor layers respectively disposed on the outer surfaces of the films. The total thickness of the insulating layers respectively stacked on both sides of the adhesive layer is 10 to 100 ?m and 2 to 10 times the thickness of the adhesive layer. The mutual adhesion strength between the insulating layers through the intermediary of the adhesive layer is 7.0 N/cm or more.
    Type: Grant
    Filed: September 10, 2004
    Date of Patent: June 10, 2008
    Assignees: Unitika Ltd., Nippon Kayaku Kabushiki Kaisha
    Inventors: Yoshiaki Echigo, Jusirou Eguchi, Akira Shigeta, Makoto Uchida, Shigeru Moteki
  • Patent number: 7382042
    Abstract: The present invention provides a COF flexible printed wiring board whose insulating layer is not melt-adhered to a heating tool, and which exhibits no drop in bonding strength during panel bonding carried out after mounting of semiconductor chips, whereby reliability and productivity of a semiconductor chip mounting line is enhanced. The invention also provides a method of producing the COF flexible printed wiring board.
    Type: Grant
    Filed: September 27, 2005
    Date of Patent: June 3, 2008
    Assignee: Mitsui Mining & Smelting Co., Ltd.
    Inventors: Hidetoshi Awata, Yasuhiro Kiridoshi
  • Patent number: 7349225
    Abstract: A composite sandwich structure with embedded electronics, that in one embodiment includes two multilayered composite facesheet laminates, a central core, embedded electronic components within the central core region, embedded electrical conductors within the central core region, and two multilayer printed circuit laminates that are secondarily bonded or cured to the inner surface of the sandwich facesheet laminates. The electronic components and electrical conductors, which are located in the central core region of the sandwich element, are attached to one or both of the two circuit laminates.
    Type: Grant
    Filed: October 22, 2003
    Date of Patent: March 25, 2008
    Assignee: Odyssian Technology, LLC
    Inventor: Barton E Bennett
  • Patent number: 7323642
    Abstract: Provided is a thin printed circuit board (PCB) for manufacturing a chip scale package (CSP). The thin printed circuit board includes a plurality of unit printed circuit boards, each of which is comprised of a circuit pattern, to which a semiconductor chip is adhered, and a substrate surrounding the circuit pattern. The unit printed boards are arranged in a row and includes a support molding, which is spaced a predetermined interval apart from the circuit pattern of each unit printed circuit board on the substrate of each unit printed circuit board and formed in a ring shape along the edge of the thin printed circuit board.
    Type: Grant
    Filed: July 16, 2004
    Date of Patent: January 29, 2008
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yi-Sung Hwang, Ho-Tae Jin, Hwan-young Jang
  • Patent number: 7292448
    Abstract: A circuit substrate includes a first rigid substrate having a plurality of land portions located at a predetermined interval on one surface, a second rigid substrate having a plurality of second land portions located at a predetermined interval on one surface and a flexible wiring board sandwiched by the first and second rigid substrates and which has a plurality of third land portions corresponding to the first land portions on one surface and a plurality of fourth land portions corresponding to the second land portions on the other surface. In this circuit substrate, the second and fourth land portions are displaced from each other relative to the first and third land portions and at least part of the first and third land portions and at least part of the second and fourth land portions are electrically connected to each other, respectively.
    Type: Grant
    Filed: August 24, 2006
    Date of Patent: November 6, 2007
    Assignee: Sony Corporation
    Inventors: Toshichika Urushibara, Koji Shiozawa, Masakazu Okabe, Yukiko Hyodo, Yusuke Masuda, Tadayuki Miyamoto
  • Patent number: 7230187
    Abstract: A multi-layer printed wire board (PWB) structure optimized for improved drop reliability, reliable electrical connections under thermal load, and minimal thickness is provided, along with a mobile terminal, including the PWB. The PWB includes alternating conductive layers and insulative layers. The outermost three layers form an interconnect structure constructed of two conductive layers surrounding an insulative-coated conductive layer. The thicknesses of the various layers are optimized to have an increased resistance to mechanical shock resulting from, for instance, a drop onto a hard surface. In addition, the optimized PWB structure has a minimized thickness and an improved resistance to connection failures resulting from cyclical thermal loads.
    Type: Grant
    Filed: December 22, 2003
    Date of Patent: June 12, 2007
    Assignee: Nokia Corporation
    Inventors: Liangfeng Xu, Tommi Reinikainen, Arni Kujala, Wei Ren, Ian Niemi, Ilkka Kartio
  • Patent number: 7230954
    Abstract: A vehicular communications network is disclosed. The network comprises a communications channel for propagating a signal therealong; a nodal communications system; and a signal coupling system coupled to the communications channel and to the nodal communications system for coupling a signal between the communications channel and the nodal communications system.
    Type: Grant
    Filed: December 4, 2001
    Date of Patent: June 12, 2007
    Assignee: Delphi Technologies, Inc.
    Inventors: Brian T. Murray, Clyde M. Callewaert
  • Patent number: 7213334
    Abstract: A double-sided flexible printed board is manufactured by: (a) forming a polyimide precursor layer on a metal layer; (b) forming an upper circuit layer on the polyimide precursor layer by a semi-additive technique; and (c) imidating the polyimide precursor layer to form a polyimide insulating layer.
    Type: Grant
    Filed: December 16, 2003
    Date of Patent: May 8, 2007
    Assignees: Sony Corporation, Sony Chemical & Information Device Corporation
    Inventors: Hideyuki Kurita, Masanao Watanabe
  • Patent number: 7211738
    Abstract: A bonding pad structure of a display device. A first conductive layer is formed overlying a substrate, a protection layer is formed overlying the substrate and the first conductive layer, and a second conductive layer is formed overlying the protection layer. An opening structure penetrates the second conductive layer and the protection layer to expose the first conductive layer. A third conductive layer is formed overlying the second conductive layer to contact the sidewall and bottom of the opening structure. Thus, the third conductive layer is electrically connected to the second conductive layer to provide a first electrical-connection path, and the third conductive layer is electrically connected to the first conductive layer to provide a second electrical-connection path.
    Type: Grant
    Filed: July 15, 2004
    Date of Patent: May 1, 2007
    Assignee: AU Optronics Corp.
    Inventors: Chun-Yu Lee, Shy-Ping Chou, Hui-Chang Chen
  • Patent number: 7169327
    Abstract: The dielectric-forming composition according to the invention is characterized by consisting of: composite particles for dielectrics in which part or all of the surfaces of inorganic particles with permittivity of 30 or greater are coated with a conductive metal or a compound thereof, or a conductive organic compound or a conductive inorganic material; and (B) a resin component constituted of at least one of a polymerizable compound and a polymer. In addition, another dielectric-forming composition according to the invention is characterized by containing: ultrafine particle-resin composite particles composed of (J) inorganic ultrafine particles with the average particle size of 0.
    Type: Grant
    Filed: January 24, 2002
    Date of Patent: January 30, 2007
    Assignee: JSR Corporation
    Inventors: Nobuyuki Ito, Hideaki Masuko, Satomi Hasegawa, Nakaatsu Yoshimura
  • Patent number: 7158383
    Abstract: A technique for fabricating a resistor on a flexible substrate. Specifically, at least a portion of a polyimide substrate is activated by exposure to a ion sputter etch techniques. A metal layer is disposed over the activated portion of the substrate, thereby resulting in the formation of a highly resistive metal-carbide region. Interconnect layers are disposed over the metal-carbide region and patterned to form terminals at opposite ends of the metal carbide region. The metal-carbide region is patterned to form a resistor between the terminals. Alternatively, only a selected area of the polyimide substrate is activated. The selected area forms the area in which the metal-carbide region is formed. Interconnect layers are disposed over the metal-carbide region and patterned to form terminals at opposite ends of the metal-carbide region.
    Type: Grant
    Filed: November 18, 2003
    Date of Patent: January 2, 2007
    Assignee: General Electric Company
    Inventors: Kevin M. Durocher, Richard J. Saia, Vikram B. Krishnamurthy
  • Patent number: 7124502
    Abstract: The disclosed board fabrication techniques and design features enable the construction of a reliable, high-layer-count, and economical backplane for routers and the like that require a large number of signaling paths across the backplane at speeds of 2.5 Gbps or greater, as well as distribution of significant amounts of power to router components. The disclosed techniques and features allow relatively thick (e.g., three- or four-ounce copper) power distribution planes to be combined with large numbers of high-speed signaling layers in a common backplane. Using traditional techniques, such a construction would not be possible because of the number of layers required and the thickness of the power distribution layers. The disclosed embodiments use novel layer arrangements, material selection, processing techniques, and panel features to produce the desired high-speed layers and low-noise high-power distribution layers in a single mechanically stable board.
    Type: Grant
    Filed: August 11, 2004
    Date of Patent: October 24, 2006
    Assignee: Force10 Networks, Inc.
    Inventor: Joel R. Goergen
  • Patent number: 7088926
    Abstract: The invention pertains to an electro-optical connector module comprising a connection part, at least one optical transmitter circuit and/or optical receiver circuit and at least one electro-optical converter for respectively converting electrical signals into optical signals or vice versa. The module further comprises at least two substantially flat and substantially parallel electrically insulating sheets on which the transmitter circuit and/or receiver circuit and the converter are mounted. It is preferred that the connector module according, comprises at least one optical transmitter circuit, at least one optical receiver circuit and at least two electro-optical converters for respectively converting electrical signals into optical signals and vice versa, wherein the optical transmitter circuit and a first converter are mounted on a first sheet and the optical receiver circuit and a second converter are mounted on a second sheet.
    Type: Grant
    Filed: February 5, 2001
    Date of Patent: August 8, 2006
    Assignee: Framatome Connectors International
    Inventors: Albertus Van Zanten, Winnie Heyvaert
  • Patent number: 7071419
    Abstract: A flexible circuit having improved tear resistance is provided. A flexible circuit, made of polyimide film, includes at least one extension which needs to be folded. To prevent tearing, an annular piece of metal, like an exposed copper pad for example, is placed at the apex of the bend angle. A second metal is then deposited atop the annular piece of metal, thereby reinforcing the annular piece of metal. The reinforced annular piece of metal helps to prevent the flexible circuit from tearing when shearing forces are applied to the extension. Experimental results have shown that the invention provides as much as a 285% increase in tear resistance when compared to prior art flexible circuits.
    Type: Grant
    Filed: October 8, 2003
    Date of Patent: July 4, 2006
    Assignee: Motorola, Inc.
    Inventors: Benjamin J. Holmes, Randall P. Chambers
  • Patent number: 7031166
    Abstract: A silicon nitride sintered body comprising Mg and at least one rare earth element selected from the group consisting of La, Y, Gd and Yb, the total oxide-converted content of the above elements being 0.6–7 weight %, with Mg converted to MgO and rare earth elements converted to rare earth oxides RExOy. The silicon nitride sintered body is produced by mixing 1–50 parts by weight of a first silicon nitride powder having a ?-particle ratio of 30–100%, an oxygen content of 0.5 weight % or less, an average particle size of 0.2–10 ?m, and an aspect ratio of 10 or less, with 99–50 parts by weight of ?-silicon nitride powder having an average particle size of 0.2–4 ?m; and sintering the resultant mixture at a temperature of 1,800° C. or higher and pressure of 5 atm or more in a nitrogen atmosphere.
    Type: Grant
    Filed: November 30, 2004
    Date of Patent: April 18, 2006
    Assignee: Hitachi Metals, Ltd.
    Inventors: Hisayuki Imamura, Shigeyuki Hamayoshi, Tsunehiro Kawata, Masahisa Sobue
  • Patent number: 7002809
    Abstract: Disclosed is an LCD driver integrated circuit package and a chip on glass type LCD device using the package. The LCD driver integrated circuit package includes a mold that has signal output bumps and signal input bumps formed thereon, wherein the signal output bumps and the signal input bumps have different surface areas that contact the mold and an adjacent conductive film. Due to the different contact surface areas, different amounts of pressure are applied to different parts on the conductive film when a force is applied to the mold. One or more bump pressure control patterns are formed on the mold compensate for the difference in pressure caused by this difference between the total contact areas. Accordingly, the LCD driver integrated circuit package can be mounted on a chip on glass type LCD panel without causing device failure.
    Type: Grant
    Filed: April 30, 2003
    Date of Patent: February 21, 2006
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Sung-Ho Lee
  • Patent number: 6975514
    Abstract: A circuit module including at least one Application Specific Integrated Circuit (ASIC) and a plurality of Vertical Cavity Surface-Emitting Laser (VCSEL) array modules is built using a standard ceramic or organic VLSI package substrate, resulting is a high density device with a small footprint. Interconnection between the electronic devices and the VCSEL array modules is accomplished using standard integrated circuit packaging technology and flexible connectors. Optical connections from the VCSEL arrays to fiber optic cables are made possible by integrating industry-standard optical connectors onto the package. Optical receiver and transceiver modules may also be incorporated into the circuit module.
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: December 13, 2005
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventor: Terrel L. Morris
  • Patent number: 6934160
    Abstract: A printed circuit board arrangement with a flexible layer arrangement of at least one electrically conductive layer with a large number of conductor tracks lying next to one another and surrounded by electrically isolating layers has at least one printed circuit board firmly connected to a portion of the flexible layer arrangement and accommodating a component. To form a connection between the component and the conductor tracks of the flexible layer, an opening through the printed circuit board to the conductor tracks is provided, which opening may be stepped, so that different conductor tracks and different layers can be reached.
    Type: Grant
    Filed: February 28, 2002
    Date of Patent: August 23, 2005
    Assignee: Siemens Aktiengesellschaft
    Inventors: Björn Heismann, Quirin Spreiter, Helmut Winkelmann
  • Patent number: 6932518
    Abstract: The present invention is an optoelectronic device including a circuit board with a plurality of signal traces, a first ground plane, and a second ground plane. The impedance of a signal trace is determined by which of the first ground plane and the second ground plane is closest to the signal trace. The area of the first ground plane coincident with a first signal trace is left intact in order to set the impedance of the first signal trace, by reference to the first ground plane. The area of the first ground plane coincident with a second signal trace is removed in order to set the impedance of the second signal trace, by reference to the second ground plane.
    Type: Grant
    Filed: March 19, 2003
    Date of Patent: August 23, 2005
    Assignee: Finisar Corporation
    Inventor: Ronald A. Greenlaw
  • Patent number: 6918179
    Abstract: A method for preforming of two or more flexible cables in an arrangement consisting of a combination of rigid printed circuit boards and flexible cable sections extending therebetween. Moreover, also provided is an apparatus for the preforming of two or more flexible cable sections of a combination of rigid printed circuit boards and therewith interposed flexible cable sections which are adapted to interconnect the rigid printed circuit boards. The apparatus consists of a tool constituted of an elongated cylindrical member having a tapered leading end which narrows into an ultra-thin flat end section of a blade-like configuration, and which is adapted to be pushed between the flexible cables and so as to preform the flexible cable sections and cause them to yield in a predetermined outwardly bowed permanently relationship between the rigid printed circuit boards at the opposite ends thereof to lengthen the fatigue life of the conductors in the flexible cable sections.
    Type: Grant
    Filed: April 10, 2002
    Date of Patent: July 19, 2005
    Assignee: International Business Machines Corporation
    Inventors: Lee Curtis Randall, Thomas Stanley Truman, Daniel James Winarski, George G. Zamora
  • Patent number: 6911605
    Abstract: In order to provide low-cost, long fatigue life flexible printed circuit, low profile electrolytic foil is used as copper foil for a circuit 3 of the flexible printed circuit 10. Crack which does not penetrate the copper foil should preferably be formed on the low profile electrolytic foil. For methods to form cracks on the low profile electrolytic foil, methods such as pre-bending and etching can be employed. Due to the weakness of the low profile electrolytic foil, the base film 1, the cover layer 5, and the bonding agent 2, 4 which are disposed on the both sides of the low profile electrolytic foil should preferably be plastic film of which elasticity ratio is equal to 108 Pa or more.
    Type: Grant
    Filed: April 3, 2002
    Date of Patent: June 28, 2005
    Assignee: Fujikura Ltd.
    Inventors: Kenichi Okada, Nobuo Tanabe
  • Patent number: 6890629
    Abstract: A system and method for the fabrication of high reliability capacitors (1011), inductors (1012), and multi-layer interconnects (1013) (including resistors (1014)) on various thin film hybrid substrate surfaces (0501) is disclosed. The disclosed method first employs a thin metal layer (0502) deposited and patterned on the substrate (0501). This thin patterned layer (0502) is used to provide both lower electrodes for capacitor structures (0603) and interconnects (0604) between upper electrode components. Next, a dielectric layer (0705) is deposited over the thin patterned layer (0502) and the dielectric layer (0705) is patterned to open contact holes (0806) to the thin patterned layer. The upper electrode layers (0907, 0908, 1009, 1010) are then deposited and patterned on top of the dielectric (0705).
    Type: Grant
    Filed: October 15, 2003
    Date of Patent: May 10, 2005
    Inventors: Michael D. Casper, William B. Mraz
  • Patent number: 6885549
    Abstract: A flexible printed circuit improves data transfer rates by disposing ground wires in a ground plane proximate to signal wires disposed in a signal channel plane. One or more ground wires is associated with each signal wire pair or each signal wire for imaging of the return currents of the signal pairs. An overlapping alignment minimizes loop area between a ground wire and its associated signal wire. An offset alignment provides a reduced loop area and reduced breakage risk since movement of the flexible circuit does result in compression of the signal wire and its associated ground wire. A combination of overlapping and offset alignment balances signal transfer effectiveness with breakage risk by offsetting ground and signal wires is stress sensitive regions and overlapping ground and signal wires in stress tolerant regions.
    Type: Grant
    Filed: April 11, 2002
    Date of Patent: April 26, 2005
    Assignee: Dell Products L.P.
    Inventor: Gary S. Thomason
  • Patent number: 6879492
    Abstract: A method and structure for forming an electronic structure that comprises a redistribution structure on a circuitized substrate. The redistribution structure includes N dielectric layers (N ?2) and N metal planes formed in the following sequence: dielectric layer 1 on a metallic plane that exists on a surface of the substrate, metal plane 1 on dielectric layer 1, dielectric layer 2 on dielectric layer 1 and metal plane 1, metal plane 2 on the dielectric layer 2, . . . , dielectric layer N on dielectric layer N-1 and metal plane N-1, and metal plane N on the dielectric layer N. Metal planes or metallic planes may include signal planes, power planes, ground planes, etc. A microvia structure, which is formed through the N dielectric layers and electrically couples metal plane N to the metallic plane, includes a microvia or a portion of a microvia through each dielectric layer.
    Type: Grant
    Filed: March 28, 2001
    Date of Patent: April 12, 2005
    Assignee: International Business Machines Corporation
    Inventors: David J. Alcoe, Kim J. Blackwell
  • Patent number: 6866368
    Abstract: A process of forming a flexible circuit board for ink jetting is provided. The process includes the steps of: providing an insulation tape; forming conductive traces on the insulation tape; and forming a photo-polymer layer filling between the conductive traces, wherein parts of the conductive traces are exposed to form a plurality of contacts. The material of the insulation tape can be polyimide, Teflon, polyamide, polymethylmethacrylate, polycarbonate, polyester, polyamide polyethylene-terephthalate copolymer, or any combination of the above materials. The material of the photo-polymer layer can be solder mask or polyimide.
    Type: Grant
    Filed: March 28, 2003
    Date of Patent: March 15, 2005
    Assignee: Benq Corporation
    Inventors: Yi-Jing Leu, Chih-Ching Chen, Ming-Chung Peng
  • Patent number: 6865065
    Abstract: A method and system for processing wafers is disclosed. According to one embodiment (100) a chuck system (102) may be situated opposite to an input source (104). A chuck system (102) may apply a force (e.g., mechanical and/or electromagnetic) that deforms a substrate (108). Once deformed, essentially all of a substrate (108) may be oriented at a predetermined angle (e.g., 90°) with respect to an input source (104).
    Type: Grant
    Filed: January 22, 2002
    Date of Patent: March 8, 2005
    Assignee: Advanced Ion Beam Technology, Inc.
    Inventors: Jiong Chen, Jihliang Chen, Jianmin Qiao
  • Patent number: 6863962
    Abstract: A thermally conductive substrate having a structure in which inorganic filler for improving the thermal conductivity and thermosetting resin composition are included. The thermosetting resin composition has a flexibility in the not-hardened state, and becomes rigid after hardening. The thermally conductive substrate has excellent thermal radiation characteristics. The method of manufacturing the thermally conductive substrate includes: piling up (a) the thermally conductive sheets comprising 70 to 95 weight parts of an inorganic filler, and 4.
    Type: Grant
    Filed: December 4, 2002
    Date of Patent: March 8, 2005
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Seiichi Nakatani, Hiroyuki Handa
  • Patent number: 6842344
    Abstract: A printed circuit board having a dielectric layer is disclosed. At least one signal trace is disposed adjacent a first surface of the dielectric layer in a first signal area. A reference plane is disposed adjacent a second surface of the dielectric layer in a first reference area positioned opposite the first signal area. The reference plane is configured to carry a reference potential for signals on the signal trace. At least one other signal trace is disposed adjacent the second surface of the dielectric layer in a second signal area and coupled to the signal trace in said first signal area. A second reference plane is disposed adjacent the first surface of the first dielectric layer in a second reference area positioned opposite the second signal area. The second reference plane is configured to carry the reference potential for signals on the other signal trace.
    Type: Grant
    Filed: March 17, 2003
    Date of Patent: January 11, 2005
    Assignee: Unisys Corporation
    Inventors: Robert Fix, Daniel A. Jochym, Christian E. Shenberger
  • Patent number: 6816387
    Abstract: In part, and in addition to apparatus and methods presented, an expansion board to be connected/disconnected to/from its mother board easily is provided. A face of a CDC (Communication Daughter Card), which is an expansion board to be connected to the mother board of a computer system is covered by an insulating sheet. In the CDC, an edge of one end of this insulating sheet is extended so as to form a projection. A user can take this projection with fingers, thereby carrying and connecting/disconnecting the CDC to/from the mother board easily.
    Type: Grant
    Filed: May 23, 2003
    Date of Patent: November 9, 2004
    Assignee: International Business Machines Corporation
    Inventors: Kazuo Fujii, Yoshihisa Ishihara, Aaron M. Stewart
  • Patent number: 6805940
    Abstract: A method for making an electrically conductive pattern, including: (a) depositing on a substrate a metal powder composition consisting essentially of at least one metal powder, wherein the substrate is selected from the group consisting of paper and materials that are at least about 10% compressible; and (b) densifying the composition to form a conductive pattern on the substrate.
    Type: Grant
    Filed: September 10, 2001
    Date of Patent: October 19, 2004
    Assignee: 3M Innovative Properties Company
    Inventors: David C. Koskenmaki, David W. Kuhns
  • Publication number: 20040188133
    Abstract: The present invention provides a tablet computer and a docking station assembly. This docking station comprises a docking assembly for positioning with three degrees of freedom and having a data connector for mechanically supporting and interfacing with the tablet computer. A support member couples the docking assembly to an expansion base. The base includes a number of ports for interfacing with a variety of peripheral devices or power supplies. These varieties of ports mount to a printed circuit board contained within the expansion base. A flexible printed circuit (FPC) combines the signal pathways for the variety of ports, allowing the signal pathways to travel from the printed circuit board and to the data connector. The tablet computing device has a plurality of contact or touch points positioned on the right and left edges of the tablet to facilitate aligning the tablet to the docking assembly in either a landscape or portrait mode.
    Type: Application
    Filed: January 14, 2004
    Publication date: September 30, 2004
    Inventors: John Doherty, Todd W. Steigerwald, Jefferson Blake West, Philip Leveridge, David Altounian, David Cutherell
  • Patent number: 6761963
    Abstract: A system and method for the fabrication of high reliability capacitors (1011), inductors (1012), and multi-layer interconnects (1013) (including resistors (1014)) on various thin film hybrid substrate surfaces (0501) is disclosed. The disclosed method first employs a thin metal layer (0502) deposited and patterned on the substrate (0501). This thin patterned layer (0502) is used to provide both lower electrodes for capacitor structures (0603) and interconnects (0604) between upper electrode components. Next, a dielectric layer (0705) is deposited over the thin patterned layer (0502) and the dielectric layer (0705) is patterned to open contact holes (0806) to the thin patterned layer. The upper electrode layers (0907, 0908, 1009, 1010) are then deposited and patterned on top of the dielectric (0705).
    Type: Grant
    Filed: September 21, 2001
    Date of Patent: July 13, 2004
    Inventors: Michael D. Casper, William B. Mraz
  • Patent number: 6759115
    Abstract: A multilayer circuit component and a method for manufacturing the same, in which the difference of the amounts of baking shrinkages between each of the glass-containing layers is small, and the enlargement rate of the diameter of the via hole formed in each of the glass-containing layers is close to those in the other layers, so that it is possible to prevent a short circuit defect due to the mutual short circuit of the conductors in the via hole from occurring, and the warp of the substrate is reduced. The multilayer circuit component is provided with at least two glass-containing layers on a substrate, differentiating the softening temperature of glass compounded in the first glass-containing layer formed on the substrate from the softening temperature of glass compounded in the second glass-containing layer formed on the first glass-containing layer.
    Type: Grant
    Filed: June 15, 2001
    Date of Patent: July 6, 2004
    Assignee: Murata Manufacturing Co. Ltd
    Inventor: Michiaki Iha
  • Patent number: 6737588
    Abstract: Against a first resin film formed on a first metal film are pressed bumps on a second metal film so that the bumps are embedded into the first resin film. Either one of the first metal film or the second metal film or both is (are) patterned while the bumps are in contact with the first metal film, and the first resin film is heat-treated while the top of the first resin film is partially exposed to discharge the solvent or moisture from the exposed zone, and cure the first resin film. After curing, the bumps and the first metal film may be ultrasonically bonded to each other. A second resin film and a third metal film may be further layered to form a multilayer structure.
    Type: Grant
    Filed: August 18, 2000
    Date of Patent: May 18, 2004
    Assignee: Sony Chemicals Corporation
    Inventors: Hideyuki Kurita, Masanao Watanabe