Multiple Contact Pins Patents (Class 361/791)
  • Patent number: 6172308
    Abstract: A terminal attachment structure includes a circuit assembly and a terminal attached to the circuit assembly. The circuit assembly has an insulating substrate and a circuit printed on the insulating substrate. The terminal is composed of a circuit-contact part, a connecting part to be connected with a mating terminal and a cradle part arranged between the circuit-contact part and the connecting part. When a force directing the insulating substrate is applied on the connecting part, the cradle part operates to receive the force. Accordingly, the circuit-contact part does not rise from the insulating substrate, so that clattering of the terminal against the circuit assembly can be prevented.
    Type: Grant
    Filed: June 7, 1999
    Date of Patent: January 9, 2001
    Assignee: Yazaki Corporation
    Inventors: Makoto Katsumata, Toshiyuki Mori, Hitoshi Ushijima
  • Patent number: 6091608
    Abstract: A method and apparatus for attaching a set of components to a printed circuit board is presented. A second board includes the set of components to be attached to the printed circuit board. The second board attaches directly to the printed circuit board by attaching to pins of a through hole device, such as an application specific integrated circuit. The through hole device is mounted on one side of the printed circuit board. The through hole device includes pins which protrude to the other side of the printed circuit board. The second board attaches to the protruding pins on the other side of the printed circuit board.
    Type: Grant
    Filed: February 8, 1995
    Date of Patent: July 18, 2000
    Assignee: Compaq Computer Corporation
    Inventors: Kurt Michael Thaller, Eugene Smith
  • Patent number: 6037044
    Abstract: A high performance TF-ceramic module for mounting integrated circuit chips thereto and a method of fabricating the module at reduced cost. The substrate includes thin film (TF) layers formed directly on a layered ceramic base. A first thick film wiring layer is formed on or embedded in a top surface of the thick film layered ceramic base using thick film techniques. A first dielectric layer of a polyimide or other organic material, or an insulating material different than the ceramic material is formed on top of the first wiring layer. The dielectric layer may be spun on or sprayed on and baked; vapor deposited; laminated to the ceramic base; or an inorganic layer may be deposited using plasma enhanced chemical vapor deposition (PECVD). Vias are formed through the first dielectric layer. A second wiring layer is formed on the first dielectric layer. A second dielectric layer is formed on the second wiring layer.
    Type: Grant
    Filed: January 8, 1998
    Date of Patent: March 14, 2000
    Assignee: International Business Machines Corporation
    Inventors: Ajay P. Giri, Sundar M. Kamath, Daniel P. O'Connor, Rajesh B. Patel, Herbert I. Stoller, Lisa M. Studzinski, Paul R. Walling
  • Patent number: 5982635
    Abstract: An interconnect structure adapts one or more signals conducted between a printed circuit board (PCB) and an integrated circuit (IC) including leads, the IC having signal requirements not provided by the PCB. The interconnect structure includes sockets that provideA. conductive paths between the circuit board and some, but not all, of the leads on the package. To adapt the signals, the interconnect structure also includes an intermediate adaptor board that includes one or more electrical components. The adaptor board and the sockets fit beneath the package containing the IC and above the PCB, and do not extend beyond the lateral boundaries of the package. Heat generated by these components during operation of the IC is dissipated through the IC package via a layer of thermally conductive material sandwiched between the component and the package.
    Type: Grant
    Filed: October 23, 1996
    Date of Patent: November 9, 1999
    Assignee: Concept Manufacturing, Incorporated
    Inventors: L. William Menzies, Stephen W. Menzies, Dale S. Mackey
  • Patent number: 5953214
    Abstract: An electronic package assembly for being electrically connected to a conducting member (e.g., a printed circuit board) wherein the assembly includes a pair of substrates. The first substrate includes opposing circuit patterns, those on one surface being of higher density and thus adapted for having high density electronic devices mounted thereon. This high density pattern is electrically coupled to the lesser density second pattern which is connected to contacts of a second substrate. These contacts are of the lesser density also, and extend through a dielectric member for being coupled to conductors (e.g., copper circuit pads) on the conducting member. Ready separability of various parts of the assembly is thus assured.
    Type: Grant
    Filed: May 24, 1996
    Date of Patent: September 14, 1999
    Assignee: International Business Machines Corporation
    Inventors: David William Dranchak, Robert Joseph Kelleher, David Peter Pagnani, Patrick Robert Zippetelli
  • Patent number: 5945637
    Abstract: A terminal attachment structure includes a circuit assembly and a terminal attached to the circuit assembly. The circuit assembly has an insulating substrate and a circuit printed on the insulating substrate. The terminal is composed of a circuit-contact part, a connecting part to be connected with a mating terminal and a cradle part arranged between the circuit-contact part and the connecting part. When a force directing the insulating substrate is applied on the connecting part, the cradle part operates to receive the force. Accordingly, the circuit-contact part does not rise from the insulating substrate, so that tottering of the terminal against the circuit assembly can be prevented.
    Type: Grant
    Filed: March 21, 1997
    Date of Patent: August 31, 1999
    Assignee: Yazaki Corporation
    Inventors: Makoto Katsumata, Toshiyuki Mori, Hitoshi Ushijima
  • Patent number: 5923534
    Abstract: A PCMCIA (Personal Computer Memory Card International Association) expansion PC (Personal Computer) card arranged to be inserted into a PC card slot formed in a portable personal computer as, for example, a radio having an FM teletext broadcast receiving function is disclosed. The PC card is composed of a plate-like card portion arranged to be inserted into the PC card slot and a cover box portion having a thickness larger than that of the card portion. The card portion and the cover box portion are formed individually from each other and separably connected to each other. The card portion has a top cover and a bottom cover having extension portions arranged to be inserted into an insertion opening of the cover box portion, respectively. An internal connector is mounted on a circuit board included in the cover portion to connect with an included connector mounted on a circuit board which is accommodated in the cover box portion.
    Type: Grant
    Filed: November 21, 1997
    Date of Patent: July 13, 1999
    Assignee: Mitsumi Electric, Co., Ltd.
    Inventor: Hideo Yajima
  • Patent number: 5909065
    Abstract: A system for limiting power supply transients in a powered up backplane when a printed circuit (PC) board is plugged in. The PC board includes first connecting pins with different lengths connecting to precharge planes on the backplane where each sequentially longer pin length is connected to a precharge plane providing a sequentially lower voltage. The first connecting pins are further connected by precharge circuits to power planes on the PC board. The precharge circuits are configured to ramp current to minimize power supply transients. In one embodiment, the precharge circuits each include a transistor and RC circuit connecting each first connecting pin to a power plane on the PC board.
    Type: Grant
    Filed: December 23, 1997
    Date of Patent: June 1, 1999
    Assignee: DSC Telecom L.P.
    Inventors: James Jones, Jason W. Dove
  • Patent number: 5901049
    Abstract: An electronic device has an opening for up to two data carrier devices or, respectively, chip cards with row-type contact surfaces positioned alongside one another. The devices or, cards are stackable over one another in offset fashion. In a region of the terminal side lying opposite the plug opening it comprises two rows of contact springs lying next to one another, said rows being spatially offset upwards by the height of a card, and also offset in the insertion direction in a manner corresponding to the card offset. The resilient ends at the plug side of these contact springs respectively contact the contact surfaces of inserted data carriers from above.
    Type: Grant
    Filed: November 25, 1997
    Date of Patent: May 4, 1999
    Assignee: Siemens Aktiengesellschaft
    Inventors: Helge Schmidt, Gerhard Ackermann
  • Patent number: 5835358
    Abstract: The power supply module equips an assembly pc board, whereby the individual elements are arranged on a module pc board. In order to manufacture such a power supply module with little outlay and for reliably solving the heat elimination problems, the active components of the module are mounted in open structure on a ceramic plate manufactured in thick-film technology. The module is thereby mounted either with the components side toward the assembly pc board or within a clearance in the assembly pc board in order to achieve a reliable heat elimination given low structural height.
    Type: Grant
    Filed: April 25, 1997
    Date of Patent: November 10, 1998
    Assignee: Siemens Aktiengesellschaft
    Inventor: Bogdan Brakus
  • Patent number: 5828555
    Abstract: A multilayer printed-circuit board includes at least one inner-layer signal line, first and second ground layers between which the inner-layer signal line is sandwiched via a frame member made of an insulating material in a thickness direction of the multilayer printed-circuit board, and metallic wall members which are provided on inner walls of slits formed in the frame member and extending along the inner-layer signal line. The first and second ground layers and the metallic wall members shielding the inner-layer signal line.
    Type: Grant
    Filed: May 20, 1997
    Date of Patent: October 27, 1998
    Assignee: Fujitsu Limited
    Inventor: Takumi Itoh
  • Patent number: 5825630
    Abstract: A computer baseboard providing localized support for high pin count, high density components. The baseboard includes a first circuit board capable of supporting low pin count electrical components. The first circuit board has a surface onto which the low pin count electrical components are mounted, and an area to which a second, smaller, circuit board is connected in a parallel arrangement with the first circuit board. The second circuit board has a first surface onto which high pin count electrical components are mounted, and a second surface physically and electrically connected to the area on said first substrate. The first and second circuit boards together provide support for electrical components having higher pin counts and densities than the first circuit board can support individually, such as high performance microprocessors and chipsets.
    Type: Grant
    Filed: November 7, 1996
    Date of Patent: October 20, 1998
    Assignee: NCR Corporation
    Inventors: Billy K. Taylor, Richard I. Mellitz
  • Patent number: 5808876
    Abstract: A power distribution system utilizing a power distribution circuit board having a front and back side with at least one connector on each side. The connector on the front side is disposed to mate with a selected power supply and the connector on the back side is disposed to mate with a substantially identical power supply. The connector on the back side is rotated 180.degree. so that substantially identical power supplies can be located in close proximity to each other while maintaining required conductor spacing in order to provide an improved power distribution system.
    Type: Grant
    Filed: June 20, 1997
    Date of Patent: September 15, 1998
    Assignee: International Business Machines Corporation
    Inventors: Brian Scott Mullenbach, Jan Douglas Smid
  • Patent number: 5801925
    Abstract: An automotive junction box for controlling the flow of power and control signals throughout the interior of an automobile having controllable features. The junction box includes a housing and a first printed circuit board disposed within the housing. The first printed circuit board having a plurality of first conductive elements with a first thickness for carrying power from and through the housing. The first printed circuit board further having a plurality of second conductive elements with a second thickness for relaying control signals from the housing for actuating the features. The junction box further includes componentry attaching to the board and/or the conductive elements. As a result of using these two conducting element thicknesses, the junction box operates as an electrical distribution center and a center for electronic functions.
    Type: Grant
    Filed: August 7, 1996
    Date of Patent: September 1, 1998
    Assignee: UT Automotive Dearborn, Inc.
    Inventor: Joan M. Boada Fonts
  • Patent number: 5796592
    Abstract: In a module mounting structure, a plurality of lead frames are affixed to an affixing block of resin and then respectively soldered to a plurality of input/output pads provided on a daughter board. Subsequently, lugs protruding from both end portions of the affixing block are inserted in reference holes formed in the daughter board in order to prevent the block from being displaced. Input/output pads are provided on both sides of the daughter board, and electronic parts are mounted on both sides of the daughter board. The lead frames affixed to the affixing block are inserted in through holes formed in a mother board, and then soldered to the mother board. The structure is adaptive to an increase in the number of pins of the daughter board and an increase in module mounting density.
    Type: Grant
    Filed: April 21, 1997
    Date of Patent: August 18, 1998
    Assignee: NEC Corporation
    Inventor: Shinji Tanaka
  • Patent number: 5793617
    Abstract: A compact expansion card to replace an Extended Industry Standard Architecture (EISA) card. An EISA card has an edge connector of 188 pins of a given width and a given gap between pins, in 5.5 inches, two rows on a front of the EISA card and two rows on a back of the EISA card. The 188 pins include 157 signal pins, 10 pins dedicated to a +5 volt supply, and 18 pins dedicated to ground. The compact expansion card has an edge connector of 162 pins in 4.5 inches in two rows, one row of 81 pins on a front of the compact card and one row of 81 pins on a back of the compact card, a gap between each of the 162 pins being the same as the given gap between pins of the EISA card. The 162 pins include 157 signal pins, one +5 volt pin dedicated to a +5 volt supply, and one ground pin dedicated to ground. The 157 signal pins are of the same given width as the 157 signal pins of the EISA card.
    Type: Grant
    Filed: July 8, 1996
    Date of Patent: August 11, 1998
    Assignee: Intel Corporation
    Inventor: David Dent
  • Patent number: 5774344
    Abstract: A metallized plastic RFI/EMI shield is provided against electromagnetic energy for a circuit card wherein the shield is formed of a box enclosure with two casing halves to enclose the card, the first casing half having a solid flange side walls surrounding the card and the second casing half having a flange formed by flat, plate-like closely-spaced fingers, the fingers confronting, being in electrical contact with and mating in full length with substantially the entire periphery of the side walls of the first casing half. The fingers are preferably spaced with a separation of less than 1/4 wavelength of any measurable harmonic of the intended operating frequency, typically up to the tenth harmonic. A slot may be provided to receive the fingers on the outside of the side walls, and closely-spaced grounding pins arranged around the periphery of the card may extend between the first and second casing halves through ground plated perforations along the edge of the side walls.
    Type: Grant
    Filed: December 6, 1995
    Date of Patent: June 30, 1998
    Assignee: Metricom, Inc.
    Inventor: Matthew P. Casebolt
  • Patent number: 5768106
    Abstract: A layered circuit-board designing method and layered circuit-board where circuit-boards to be overlaid are connected at the center or an arbitrary position of each circuit-board. The layered circuit-board includes an upper-layer first circuit-board, a lower-layer third circuit-board, and an intermediate-layer second circuit-board between the first and third circuit-boards. A first connector is mounted on the first circuit-board, a second connector is mounted on the third circuit-board, a third connector is mounted on the top surface of the second circuit-board, while maintaining the positional relation between the third connector and the first connector, and a fourth connector is mounted on the bottom surface of the second circuit-board, while maintaining the positional relation between the fourth connector and the second connector. In addition, through holes are provided at pins of the third and fourth connectors for passing through the front and bottom surfaces of the second circuit-board.
    Type: Grant
    Filed: June 11, 1996
    Date of Patent: June 16, 1998
    Assignee: Canon Kabushiki Kaisha
    Inventor: Akira Ichimura
  • Patent number: 5761050
    Abstract: A press-fit or compliant section or deformable pin electrical connector. The connector is designed to be inserted into several plated through holes in printed circuit boards. Specifically, the pin connector can electrically and mechanically connect two or more printed circuit boards (PCBs). Uniquely, it is possible to have a single pin that is both electrically and mechanically connected to two PCBs and have the pin extending through a plated through hole of a third PCB without establishing any electrical or mechanical contact with the third PCB. Additionally, the pin has at least two compliant sections for press fitting into a plated through-hole in a PCB or the like. Each compliant section has a different size diameter. Specifically, the top compliant section is the smallest, the bottom compliant section is the largest in diameter, and the remaining compliant sections will gradually increase in size as they are located from the tip to the base of the pin.
    Type: Grant
    Filed: August 23, 1996
    Date of Patent: June 2, 1998
    Assignee: CTS Corporation
    Inventor: Ian Archer
  • Patent number: 5710733
    Abstract: A processor-inclusive memory module (PIMM) is disclosed. In one embodiment of the present invention, the PIMM includes a printed circuit board having first and second opposing surfaces. The printed circuit board also has an address line formed therein. A first SRAM is mounted on the first surface of the printed circuit board. The present PIMM is further comprised of a second SRAM mounted on the second surface of the printed circuit board. The second SRAM is mounted on the second surface of the printed circuit board directly opposite the first SRAM mounted on the first surface of the printed circuit board. The first and second SRAMs are coupled to the address line by respective cache buses. A processor is also mounted on the first surface of the printed circuit board, and is coupled to the address line. In one embodiment of the invention, a heat sink is thermally coupled to the processor. The processor has a plurality of contact pads disposed thereon.
    Type: Grant
    Filed: January 22, 1996
    Date of Patent: January 20, 1998
    Assignee: Silicon Graphics, Inc.
    Inventors: David P. Chengson, William L. Schmidt, Unmesh Agarwala, Alan D. Foster, Edward C. Priest, John C. Manton, Ali Mira
  • Patent number: 5691569
    Abstract: A contact pattern for an integrated circuit package. The package has a plurality of contacts that are soldered to corresponding pads of a printed circuit board. The contacts are arranged into a plurality of cell units. Each cell unit has a row of center contacts diagonally located between two rows of outer contacts. The diagonally located pins increase the density of the contact pattern. Each unit cell is separated by a space that allows routing traces to be routed therethrough. Routing traces may also be routed through the unit cells to increase the routing density of the package. The package provides a contact pattern that optimizes both the pin density and the routing traces.
    Type: Grant
    Filed: December 20, 1995
    Date of Patent: November 25, 1997
    Assignee: Intel Corporation
    Inventor: Mark J. Palmer
  • Patent number: 5686697
    Abstract: A device and method wherein electrical components are mechanically suspended and electrically interconnected in an insulative elastomeric body, such as silicone, thereby eliminating the need for a circuit board or other circuit substrate. The device can change shape through compression, distension, flexure, and other external forces while maintaining its electrical performance and mechanical integrity. The device can be compressed and deformed to fit snugly within another device, such as the shell of an electrical connector or a plastic clamshell, simultaneously creating spring forces for reliable electrical contacts and an environmental seal. Accordingly, the device and method can be used for a wide variety of purposes such as electrical filtering for avionics, computer or automotive connectors, or a non-intrusive manner to package electronics for medical implants.
    Type: Grant
    Filed: January 6, 1995
    Date of Patent: November 11, 1997
    Assignee: Metatech Corporation
    Inventors: Paul J. Miller, Kevin G. Foreman
  • Patent number: 5675192
    Abstract: A power converter comprises a first printed circuit board containing some of the circuitry of the power converter, a header comprising a support structure and a multiplicity of metallic pins passing through the support structure, and an inductor mounted to the support structure and including wires connected to respective pins. Portions of the pins on one side of the support structure are mounted to the first printed circuit board to support the header in fixed offset relation to the first printed circuit board. Portions of the pins on an opposite other side of the support structure are adapted to mount to a second, mother board to support the header in fixed offset relation to the mother board.
    Type: Grant
    Filed: October 11, 1995
    Date of Patent: October 7, 1997
    Assignee: International Business Machines Corporation
    Inventors: Donald James Ashley, Donald Victor Folker, James Edward Harvey, Randhir Singh Malik
  • Patent number: 5663871
    Abstract: A printed circuit board (PCB) subassembly of first and second PCB's disposed back to back, a group of jumper pins extending through the PCB's to electrically connect the circuit elements of the first and second PCB's and supporting the second PCB from the first PCB in back to back relationship, a cutout defined in the first PCB, and an electro-optic sensor disposed on the second PCB and extending through the cutout in the first PCB.
    Type: Grant
    Filed: July 11, 1995
    Date of Patent: September 2, 1997
    Assignee: Timex Corporation
    Inventor: Ralzon J. Bayani
  • Patent number: 5653018
    Abstract: The connection of the circuit board (7) of the appliance to connector blocks (10) is obtained by inserting and soldering holders (11) having connecting terminals (16) to the circuit board, connector blocks (10) being loosely attached to said connecting terminals (16). The mutual mechanical and electric connection is obtained by inserting the assembly into a case which secures the connector blocks to the circuit board, on one hand, and by fastening clamps which establish a connection of the connecting terminals (16) to connected conductors. The assembly of the appliance is particularly rational since the holders (11) with the connecting terminals are placed on the circuit board together with the remaining, non-represented components and are soldered thereto in common, the connector blocks (10) being simply slid on. The assembly is thus well suited for automation. The connector blocks abut to the edges of the circuit board (7), thus allowing a good space utilization and a compact construction.
    Type: Grant
    Filed: June 1, 1995
    Date of Patent: August 5, 1997
    Assignee: Saia AG
    Inventors: Felix Anderau, Bernard Bourqui
  • Patent number: 5633783
    Abstract: Multi-layer wiring structures are respectively formed in upper and lower ceramic substrates for electric parts, and interconnecting pins held in contact with contact pads establish electrical connections between the multi-layer wiring structures so as to prevent a multi-chip module from an undesirable disconnection between the multi-layer wiring structures.
    Type: Grant
    Filed: September 29, 1995
    Date of Patent: May 27, 1997
    Assignee: Fujitsu Limited
    Inventor: Takesi Yamamoto
  • Patent number: 5627730
    Abstract: A printed circuit board assembly which includes a two-dimensional array of connectors to provide significantly higher data transfer rates than typical one-dimensional connectors, without sacrificing board space. The assembly preferably includes a plurality of connection pads on each printed circuit board. An anisotropically conducting material is placed between the connection pads and the boards pressed together.
    Type: Grant
    Filed: February 26, 1996
    Date of Patent: May 6, 1997
    Assignee: NCR Corporation
    Inventors: Walter Konig, Albert Modl, Peter F. Baur
  • Patent number: 5619018
    Abstract: A multilayer printed circuit board comprising conducting layers of a first material and conducting layers of a second material includes noncorrosive low resistance electrical contacts between conducting layers of the first and second material. The noncorrosive low resistance contacts allow the use of light weight conducting materials for particular layers of the circuit board to produce a light weight multilayer circuit board.
    Type: Grant
    Filed: April 3, 1995
    Date of Patent: April 8, 1997
    Assignee: Compaq Computer Corporation
    Inventor: Markku J. Rossi
  • Patent number: 5610449
    Abstract: A compact, thin-type, noise-tolerant and highly reliable electric power unit includes an input portion through which a predetermined voltage is applied, a plurality of power circuits for generating a plurality of different voltages from the predetermined voltage applied to said input portion, an output portion for outputting the plurality of different voltages generated in the plurality of power circuits, a control unit having a function to stabilize the plurality of different output voltages, and an insulated substrate which supports the input portion, the plurality of power circuits, the output portion and the control unit, and further has a printed wiring pattern for electrically coupling the constituent components of the electric power unit.
    Type: Grant
    Filed: August 22, 1995
    Date of Patent: March 11, 1997
    Assignees: Hitachi, Ltd., Hitachi Media Electronics Co., Ltd.
    Inventors: Tadashi Takahashi, Akihiko Kanouda, Kazuhiro Takizawa, Tetsunosuke Nakamura, Masami Joraku
  • Patent number: 5610801
    Abstract: A motherboard assembly which has an integrated circuit socket that can be mated with either a single integrated circuit package or a multiple integrated circuit package module. The motherboard has a socket connector which can receive the external pins of an integrated circuit package. The motherboard also has an auxiliary connector that can mate with a corresponding connector-mounted to a daughterboard. Mounted to the daughterboard are a first integrated circuit package and a second integrated circuit package. Each package may contain a multi-processing microprocessor. The first integrated circuit package has a plurality of pins that mate with the socket connector. The daughterboard can be coupled to the motherboard by pressing the external pins of the first integrated circuit package into the socket connector and mating the auxiliary connectors. The present invention allows a plurality of processors to be plugged into a single socket without occupying a significant amount of space on the motherboard.
    Type: Grant
    Filed: November 15, 1995
    Date of Patent: March 11, 1997
    Assignee: Intel Corporation
    Inventor: Glenn Begis
  • Patent number: 5587890
    Abstract: A vehicle electric power distribution system having a plurality of conductive plates, wherein each conductive plate includes an arrangement of contact pads that are electrically connected to other contact pads via integrally formed conductive traces. These conductive plates can be vertically stacked, with electrical contact between selected contact pads on different conductive plates being provided by conductive pins. Each conductive plate is selectively coated with an insulating layer to obviate unwanted electrical contact.
    Type: Grant
    Filed: August 8, 1994
    Date of Patent: December 24, 1996
    Assignee: Cooper Industries, Inc.
    Inventors: Lawrence R. Happ, Jacek Korczynski, William R. Bailey, Alan Lesesky
  • Patent number: 5571996
    Abstract: A circuit board is provided having a plurality of vias and uniformly spaced connector stubs arranged upon one or both outer surfaces of the control board. Sets of trace conductors are formed within the control board between the vias. The trace conductors are arranged in two planes within the control board, wherein trace conductors within one plane are laterally offset from trace conductors in the other plane. Laterally offset trace conductors allow close spacing of the trace conductor planes while maximizing the spacing between trace conductors and corresponding reference conductors also placed within the control board. Additionally, the trace conductors are serpentine-shaped when viewed from a perspective perpendicular to the planar surface of the control board.
    Type: Grant
    Filed: January 17, 1995
    Date of Patent: November 5, 1996
    Assignee: Dell USA, L.P.
    Inventors: N. Deepak Swamy, Victor K. Pecone, Darrell Slupek
  • Patent number: 5565654
    Abstract: The invention is directed to a printed circuit board arrangement for plug-type connections composed of a blade connector and spring clip, whereby the individual contact passages are surrounded by electrically conductive shield plates that are connected to contactings carrying shield potential that are attached both at the backplane side as well as at the assembly side, and whereby both the contact blades and contact springs as well as the contactings are contacted and secured with press-in technique in the printed circuit boards fashioned as multi-layer multilayers. In order to create an adequate interconnect lead-through width between the contactings, the shield potential in the printed circuit board arrangement of the invention is conducted in a separate shield printed circuit board (3) that is electrically separated from the multilayer (1) by an insulating foil (2).
    Type: Grant
    Filed: April 11, 1995
    Date of Patent: October 15, 1996
    Assignee: Siemens Aktiengesellschaft
    Inventors: Karl Zell, Juergen Seibold, Peter Seidel
  • Patent number: 5548486
    Abstract: An electrical connection pin blank having at least one compliant section is affixed to a first circuit board by compressive deformation in such a way that the compliant section of the pin blank projects outwardly from the surface of the first circuit board. The end of the pin projecting from the first circuit board is then inserted into a corresponding opening in a second circuit board and the two boards brought together until the second circuit board is firmly affixed to the complaint section of the pin by compliant pin connection.
    Type: Grant
    Filed: January 21, 1994
    Date of Patent: August 20, 1996
    Assignee: International Business Machines Corporation
    Inventors: Stephen J. Kman, John A. Stubecki, William R. Sondej
  • Patent number: 5530623
    Abstract: A memory packaging scheme for high speed computer systems includes, several memory module sockets mounted to a printed circuit board and interconnected by a common set of address, data and control transmission lines within the printed circuit board. The transmission lines are interrupted at each connector. Cooperating memory modules, such as SIMM memory modules are installed in sequence into one or more of the module sockets in accordance with the requirements of the computer system. Installation of a memory module into a memory socket closes the open circuits for each one of the transmission lines at the memory socket, extending the uninterrupted length of the transmission lines to the next memory socket in the sequence.
    Type: Grant
    Filed: November 19, 1993
    Date of Patent: June 25, 1996
    Assignee: NCR Corporation
    Inventors: Ikuo J. Sanwo, Michael A. Hoffman, Hyung S. Kim
  • Patent number: 5530810
    Abstract: An apparatus for allowing an add-on device to be inserted onto an active bus and configurable within one bus cycle is provided. The apparatus includes passive circuits used with a sequential multi-length pin arrangement on an I/O module. The apparatus also decouples the source of power to the I/O module from other devices on the bus which limits the disruption of power during the insertion. The I/O module limits current drawn from a backplane containing the bus which may disrupt signals during the insertion of the add-on device. And finally, the I/O module also limits bus signal disruption during insertion by precharging signal pins, increasing the resistance between the add-on I/O module pins and the backplane and adding capacitance to the bus.
    Type: Grant
    Filed: June 7, 1995
    Date of Patent: June 25, 1996
    Assignee: 3Com Corporation
    Inventor: Michael H. Bowman
  • Patent number: 5488541
    Abstract: A VME Bus Compatible backplane and shelf arrangement is provided which incorporates a connectorized backplane arrangement which provides for direct mating to both industry standard VME bus cards as well as VME transition cards. A backplane is provided that is double-sided. On a first face, access to two VME busses (P1 & P2) is provided via rows of first and second connectors. The connector of each row are evenly spaced along the bus and the connectors of one row are vertically aligned with the connectors of the second row. On the second face a third row of connectors is provided, directly behind the second row with each connector offset with respect to a corresponding second connector. The first and second rows of connectors accept standard VME bus cards. The third connectors accept directly, industry standard transition cards. Some of the conductors in the second connectors are connected to the second bus, while others are connected directly to conductors in the third connectors.
    Type: Grant
    Filed: June 1, 1994
    Date of Patent: January 30, 1996
    Assignee: Northern Telecom Limited
    Inventors: Balwantrai Mistry, Raymond B. Wallace
  • Patent number: 5484964
    Abstract: The present invention is a double headed pin for electrically interconnecting a PGA substrate carrier to a surface mount printed circuit board. The double headed pins provide for a stronger interconnection to the conductive pads on the surface mount printed circuit board. The increase in contact and soldering wetting area makes the interconnections stronger and more durable.
    Type: Grant
    Filed: February 6, 1995
    Date of Patent: January 16, 1996
    Inventors: Peter F. Dawson, deceased, by Shirley B. Dawson, executor, Jacques Leibovitz, Voddarahalli K. Nagesh
  • Patent number: 5478972
    Abstract: An interlayer connection wiring penetrating each of resin films constituting a multilayer circuit board and a surface wiring connected to the interlayer connection wiring are formed in predetermined positions on surfaces of each resin film. The resin films are laminated while being positioned so that the interlayer connection wiring of one of each adjacent pair of the circuit bases is superposed on a part of the surface wiring of the other, and are thereafter treated under a high-temperature and high-pressure condition to be combined with each other. If a resin film formed of a thermoplastic resin is adopted, the laminated resin films are combined by intermixing the interfaces of each adjacent pair of resin films. As the resin films shrink when the laminated resin films is cooled to ordinary temperature, a compressive force is applied to the contact surfaces of the interlayer connection wiring and the surface wiring.
    Type: Grant
    Filed: August 25, 1994
    Date of Patent: December 26, 1995
    Assignee: Fujitsu Limited
    Inventors: Daisuke Mizutani, Kishio Yokouchi
  • Patent number: 5442519
    Abstract: Disclosed is a device and method of manufacture which provides a maintenance termination unit (MTU) and surge protector in a single 5-pin package. The components for both the MTU and surge protector are formed on a single printed circuit board separated by a groove but electrically connected by a plurality of wires. After wave soldering the contacts on the board, the board is broken apart while maintaining the electrical connection, and the resulting structure is mounted in a 5-pin package.
    Type: Grant
    Filed: December 29, 1993
    Date of Patent: August 15, 1995
    Assignee: AT&T Corp.
    Inventors: George A. DeBalko, Rajendra S. Rana
  • Patent number: 5440453
    Abstract: The invention provides a packaging technique implementing an electronic circuit, comprising several individually packaged sub-circuits, on a circuit board within the footprint of a single package. The embodiment of the present invention is particularly advantageous when implementing application specific integrated circuits (ASICs) or field programmable gate arrays (FPGAs). Selected pins of an upper package are electrically coupled to corresponding pins of the next lower adjacent package such that the pins of the uppermost package can be coupled to the pins of the lowermost package and correspondingly to the signal leads and power bus conductors of the printed circuit board. Portions of selected pins may be removed from one or more packages prior to forming the stacked structure to electrically isolate corresponding pins of upper packages from the pins of lower packages. A template is provided that permits rapid identification of pins to be removed before the packages are configured in the stack.
    Type: Grant
    Filed: November 12, 1993
    Date of Patent: August 8, 1995
    Assignee: Crosspoint Solutions, Inc.
    Inventors: Laurance H. Cooke, Matthew D. Penry
  • Patent number: 5434752
    Abstract: A system for controlling staggered connection timing of an adapter module so that live insertion, or "hot swapping", may be performed with the adapter module, has a connector with staggered pins, i.e., some pins being longer than others for initial contact with mating pins of a mating connector. The system further has a latch for controlling the timing of the connection of the staggered pins. As an adapter module is inserted into a housing, the latch allows the adapter module to be in one of three positions: (1) an entirely disconnected position where none of the pins of the adapter module are connected to the pins of the housing connector; (2) a "stopped", or partially connected, position where the longer of the staggered pins are connected between the housing and adapter modules connectors; and (3) a "fully-engaged" position wherein all pins of the connectors are engaged.
    Type: Grant
    Filed: October 27, 1993
    Date of Patent: July 18, 1995
    Assignee: International Business Machines Corporation
    Inventors: Joseph D. Huth, Robert F. Pan, Frank J. Pita, Bart P. Reier, Victor E. Valle
  • Patent number: 5432916
    Abstract: The invention is related to hot plugging of an electrical circuit (1) into a separate non-quiesced signal net (6) in an active system (7), such as a digital or analog bus. The inventive solution proposes the addition of a preconditioning network (4) to precondition the electrical circuit (1) to be hot plugged by partially precharging the parasitic input capacitances (C.sub.c, C.sub.e, C.sub.m) of the electrical circuit (1) before hot plugging. The precharging of the parasitic input capacitances serves to minimize transient effects on the active system (7).
    Type: Grant
    Filed: January 11, 1993
    Date of Patent: July 11, 1995
    Assignee: International Business Machines Corp.
    Inventors: Guenter Hahn, Klaus Muenzner, Frank J. Pita, Hartmut Ulland, Joseph C. Diepenbrock, Price Oman, Richard Kelley
  • Patent number: 5430615
    Abstract: Electronic apparatus comprises a main circuit board, a transition board, and a first connector composed of a first part attached to the main circuit board at one edge thereof and a second part attached to the transition board at a first main face thereof, whereby when the first and second parts are engaged the transition board is substantially perpendicular to the main circuit board. The transition board is attached to a connector board so that the second main face of the transition board is in spaced substantially parallel confronting relationship with a first main face of the connect or board. A second connector is composed of a first part attached to the connector board at its first main face and a second part attached to the transition board at its second main face.
    Type: Grant
    Filed: February 28, 1994
    Date of Patent: July 4, 1995
    Assignee: The Grass Valley Group, Inc.
    Inventors: Brent Keeth, Michael Deering, Ray Bryars, Charles VanDusen
  • Patent number: 5410452
    Abstract: An adaptor pin for connection to a printed circuit board includes an elongated electrically conductive pin having an enlarged portion adjacent one end for forming a mechanical interference fit with a hole partially drilled through the circuit board. The pin has an enlarged cross-sectional solder portion intermediate the enlarged portion and the opposite end of the pin so as to limit the extent of penetration of the pin into the hole of the circuit board. The enlarged portion of each pin is electrically connected by soldering to a circuit path on the circuit board. By this arrangement, a rigid mechanical connection between the pin and the circuit board is effected, and thus subsequent reheating of the board for connecting a surface mounted chip to the opposite side of the board will not interfere with the electrical and mechanical connection between the adaptor pin and the circuit board.
    Type: Grant
    Filed: February 18, 1994
    Date of Patent: April 25, 1995
    Assignee: Aries Electronics, Inc.
    Inventors: William Y. Sinclair, James P. Walter
  • Patent number: 5400222
    Abstract: An extensible bus assembly provides very short, uniform stub lengths from a bus transceiver to the bus assembly. The extensible bus assembly includes a bus termination cap, a plurality of extenders and an anchor. Each bus assembly element is L-shaped so that the bus transceiver, or some similar bus driver, may be positioned in close proximity to the bus assembly by placing the bus transceiver in the "corner" of the L; this ensures short, uniform stub lengths. Conductive surfaces are vertically positioned within the termination cap and plurality of extenders. The conductive surfaces may be compliant pins and/or spring-loaded wire conductors.
    Type: Grant
    Filed: February 8, 1993
    Date of Patent: March 21, 1995
    Assignee: Hewlett-Packard Company
    Inventors: Stephen P. Nelsen, Samuel M. Babb
  • Patent number: 5327326
    Abstract: An LSI package structure with high efficiency of the power supply and fast transmission of the signal is provided in which: adjacent to a pin 8 side surface of an LSI package 1, a power supply member 2 having an electrically conductive portions 6 and 7 for power supply bus and ground bus respectively, and a flexible interconnection board 3 having a power supply pattern layer 3b and a ground pattern layer 3a connected to the portions 6 and 7 respectively via a pin 9, are disposed; the pins 8 and 9 each extend through a through hole 3c formed on the interconnection board 3, the power supply pattern layer 3b and the pins 8 and 9 for power supply being interconnected within the through hole, the ground pattern layer 3a and the pins 8 and 9 for grounding being interconnected within the through hole; and the signal input/output pin 8 and a connector 5 of a signal input/output coaxial cable 5a are interconnected at the side of the interconnection board 3 oppsite the LSI package 1.
    Type: Grant
    Filed: July 29, 1993
    Date of Patent: July 5, 1994
    Assignees: NEC Corporation, Japan Aviation Electronics Industry Limited
    Inventors: Mitsuo Komoto, Hiroshi Endoh
  • Patent number: 5319526
    Abstract: Disclosed is a means for connecting CPU boards to a radial-and-parallel system bus structure which is consisted of a stack of bus-printed disks whose centers are arranged on a common center axis. Each bus-printed disk comprises a disk of dielectric material bearing a printed radial pattern including a plurality of printed signal conductors radially extending from the center of the disk, and means to connect the end of each radial signal conductor to a selected lead in a selected one of said CPU boards standing upright around said stack of bus-printed disks. A connecting means according to the present invention comprises a plurality of receptacles fixed to the circumference of each disk. Each receptacle is connected at its rear end to the end of each radial signal conductor, and is adapted to detachably accept at its front a selected lead pin of each of said CPU boards. This arrangement facilitates the assembling and disassembling of a stack of disks.
    Type: Grant
    Filed: January 25, 1993
    Date of Patent: June 7, 1994
    Assignee: Graphico Co., Ltd.
    Inventor: Tokuhei Takashima
  • Patent number: 5309316
    Abstract: A terminal structure includes a portion of a flexible printed circuit board and a plurality of metal terminals each consisting of a slender, elongate metal plate. The circuit board has a plurality of electrically conductive patterns provided on a resin film, a prescribed portion of the board having a connector insertion portion of a width substantially the same as that of an insertion hole of a connector. The plurality of metal terminals are placed in parallel on the flexible printed circuit board in such a manner that distal ends thereof are situated adjacent a distal end of the connector insertion portion, and each metal terminal is fixedly bonded to a respective one of the electrically conductive patterns provided on the flexible printed circuit board.
    Type: Grant
    Filed: September 28, 1992
    Date of Patent: May 3, 1994
    Assignee: Teikoku Tsushin Kogyo Co., Ltd.
    Inventors: Nobuyuki Yagi, Yasutoshi Kaku
  • Patent number: 5307242
    Abstract: In order to achieve a partial shielding with different shielding potentials, the shieldings per plug are composed of angled-off shields at the solder side and/or at the component side of a printed circuit board, whereby the length of the shields corresponds to the single or, respectively, multiple length of an individual segment of the spring contact housing of the plug. For fastening the shields to the module, the shields have hooks that are engageable into entry funnels of the outer spring chambers of the spring contact housing and also have press-in pins with which they are secured to the printed circuit board. Also, the shields comprise spring sections in the region of the contact blades, the spring sections being outwardly arced, separated from one another by slots and extending parallel to the contact blades.
    Type: Grant
    Filed: April 6, 1992
    Date of Patent: April 26, 1994
    Assignee: Siemens Aktiengesellschaft
    Inventors: Juergen Seibold, Karl Zell