With Passive Components Patents (Class 361/811)
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Publication number: 20080130258Abstract: An electronic component and an electronic-component production method in which the magnitude of a stray capacitance produced between adjacent outer electrodes is controllable. The electronic component includes a chip body and first to fourth outer electrodes. In the chip body, first and second coil block are sandwiched between magnetic substrates. Dielectric layers are interposed between the outer electrodes and the chip body such as to be away from exposed portions of coil patterns in the coil blocks. The dielectric layers have a width larger than a width of the outer electrodes, and a dielectric constant of the dielectric layers is set to be lower than the dielectric constant of the magnetic substrates.Type: ApplicationFiled: July 3, 2007Publication date: June 5, 2008Inventors: Kazuhide Kudo, Minoru Matsunaga, Katsuji Matsuta
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Patent number: 7382627Abstract: A capacitive/resistive device provides both resistive and capacitive functions. The capacitive/resistive device may be embedded within a layer of a printed wiring board. Embedding the capacitive/resistive device conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability. Conserves board surface real estate, and reduces the number of solder connections, thereby increasing reliability.Type: GrantFiled: October 18, 2004Date of Patent: June 3, 2008Assignee: E.I. du Pont de Nemours and CompanyInventors: William J. Borland, G. Sidney Cox, David Ross McGregor
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Patent number: 7345891Abstract: A circuit board assembly includes a circuit board, an electronic component and a structure coupling the electronic component to the circuit board. The structure retains the electronic component relative to the circuit board at a selected one of a plurality of positions in both directions along an axis perpendicular to the circuit board. The structure is movably coupled to one of the electronic component and the circuit board in a direction perpendicular to the axis at least prior to being coupled to the other of the electronic component and the circuit board.Type: GrantFiled: October 7, 2003Date of Patent: March 18, 2008Assignee: Hewlett-Packard Development Company, L.P.Inventors: Stephan K. Barsun, Gregory S. Meyer, Bryan D. Bolich, S. Daniel Cromwell
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Patent number: 7295445Abstract: Methods and apparatus to couple a device, such as, for example, a surface mount device, with a substrate, such as, for example, a printed circuit, are disclosed. An apparatus, according to one aspect, may include a substrate, a plurality of terminals coupled with the substrate, a conductive bonding material coupled with the plurality of terminals, an electronic device coupled with the conductive bonding material, and a holder that is coupled with the substrate to hold the electronic device. A method, according to one aspect, may include coupling a holder with a substrate such that terminals of the substrate are included in an opening of the holder, mounting an electronic device over the terminals with a conductive bonding material disposed therebetween, heating the conductive bonding material to its melting point, and cooling the conductive bonding material.Type: GrantFiled: September 30, 2004Date of Patent: November 13, 2007Assignee: Intel CorporationInventor: Jang My
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Patent number: 7285724Abstract: The invention relates to a plastic bus bar carrier having a lower part, an upper part and an adaptor arranged between the lower part and the upper part for the adaptation to different sizes of bus bars. The lower part includes a number of receiving grooves in correspondence with the number of bus bars to be received, wherein the receiving grooves have a width defined vertically to the longitudinal axis of the bus bar carrier which is smaller than the maximum transverse dimension of the lower part.Type: GrantFiled: July 27, 2005Date of Patent: October 23, 2007Assignee: Wohner GmbH & Co. KGInventor: Alex Buettner
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Patent number: 7236372Abstract: A surface mounted power supply circuit apparatus, including a circuit substrate, circuit constituting parts mounted on the circuit substrate, and a sealing member provided on the circuit substrate for covering the circuit constituting parts, at least one portion of the circuit constituting parts being configured to be contained in a containing portion formed in the circuit substrate.Type: GrantFiled: May 5, 2004Date of Patent: June 26, 2007Assignee: Citizen Electronics Co., Ltd.Inventor: Michihiro Shirai
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Patent number: 7211740Abstract: A valve metal electromagnetic interference filter (VMEIF). The filter comprises a porous valve metal pellet with at least three terminals extending therefrom. A dielectric layer at least partially circumvents the sintered porous valve metal pellet. A conductive layer at least partially circumvents the dielectric layer. A primary termination pad is in electrical contact with each lead. An inductor is in electrical contact with at least one lead between the sintered porous valve metal pellet and the primary termination pad. A secondary termination pad is in electrical contact with the conductive layer and a casing encloses at least one electromagnetic interference filter element except for a portion of the primary termination pads and the secondary termination pad. The VMEIF may be combined into either a multi-element electromagnetic interference filter or into a multiple input/output modular structure, as well as embedded within electrical circuitry.Type: GrantFiled: April 28, 2006Date of Patent: May 1, 2007Assignee: Kemet Electronics CorporationInventor: Michael S. Randall
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Patent number: 7106598Abstract: A method for manufacturing a modular electrical circuit includes the steps of pre-manufacturing a plurality of components having fine features such as resistors, capacitors, inductances, and conductors formed on a dielectric substrate. The pre-manufactured components are laminated each to the other in a predetermined order. Each pre-manufactured component includes one or more electrical elements of the same type coupled each to the other by conducting lines. Each dielectric substrate includes through vias filled with the conductive material which serve for cross-coupling of the elements of neighboring components. Position of the passive elements, as well as conductive lines and through vias, are pre-designed to allow precise coordination between the elements of different components in the multi-layered modular electrical circuit.Type: GrantFiled: June 14, 2004Date of Patent: September 12, 2006Assignee: Potomac Photonics, Inc.Inventors: David Liu, Chengping Zhang, Michael T Duignan
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Patent number: 7031170Abstract: An electronic device has a plastic housing. The plastic housing has components of a height-structured metallic leadframe. The components are in a matrix form and contain contact islands and chip islands on the underside of the plastic housing. Furthermore, the electronic device has a first line structure containing height-structured interconnects on the underside of the plastic housing and a second line structure containing bonding connections which are disposed within the plastic housing.Type: GrantFiled: September 30, 2002Date of Patent: April 18, 2006Assignee: Infineon Technologies AGInventors: Frank Daeche, Franz Petter
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Patent number: 6989995Abstract: Electrode lead wires for each capacitor are soldered to land patterns of a mounting plate of insulation. Spacers each having a flexible structure composed of a grid of metal lines are mounted on electrode patterns printed on a printed circuit board, and tip portions of the electrode lead wires which project from the mounting plate are stuck into the spacers to provide mechanical contact therebetween. While keeping this contact, the mounting plate is secured with bolts to the printed circuit board. This forms a capacitor mounting structure. For replacement of the capacitors, by simply loosening the bolts, the entire mounting plate including all the capacitors can be demounted from the board.Type: GrantFiled: March 13, 2003Date of Patent: January 24, 2006Assignee: Mitsubishi Denki Kabushiki KaishaInventor: Takeshi Ito
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Patent number: 6963028Abstract: An IC module includes a lead frame having terminals that are to be connected to an antenna coil of an IC card, and an IC chip and multilayer chip capacitors for tuning mounted on the lead frame and encapsulated by a resin. The multilayer chip capacitors are mounted in grooves on the lead frame.Type: GrantFiled: April 4, 2005Date of Patent: November 8, 2005Assignee: Sony CorporationInventors: Junichi Tanaka, Hiroyuki Takubo, Shigenobu Abe
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Patent number: 6919506Abstract: A device for fastening an electrical component to a mounting board includes a sleeve that at least partially surrounds the electrical component, and a tensioning device that is separate from the sleeve and that holds the electrical component in the sleeve. The tensioning device is positioned around a circumference of the sleeve.Type: GrantFiled: June 27, 2002Date of Patent: July 19, 2005Assignee: EPCOS AGInventor: Wilhelm Schweikert
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Patent number: 6890629Abstract: A system and method for the fabrication of high reliability capacitors (1011), inductors (1012), and multi-layer interconnects (1013) (including resistors (1014)) on various thin film hybrid substrate surfaces (0501) is disclosed. The disclosed method first employs a thin metal layer (0502) deposited and patterned on the substrate (0501). This thin patterned layer (0502) is used to provide both lower electrodes for capacitor structures (0603) and interconnects (0604) between upper electrode components. Next, a dielectric layer (0705) is deposited over the thin patterned layer (0502) and the dielectric layer (0705) is patterned to open contact holes (0806) to the thin patterned layer. The upper electrode layers (0907, 0908, 1009, 1010) are then deposited and patterned on top of the dielectric (0705).Type: GrantFiled: October 15, 2003Date of Patent: May 10, 2005Inventors: Michael D. Casper, William B. Mraz
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Patent number: 6828667Abstract: A surface mounted electronic component includes a case and a board mounting part. The board mounting part includes a leg bent in parallel with a printed circuit board at its tip, an outer frame soldered to a land of a mounted part on the board, and a projection disposed in the outer frame and inserted into a hole in the mounted part. The electronic component is mounted on a surface of the printed circuit board in various electronic instruments, and can keep to be mounted on the board tightly even when an external force is applied.Type: GrantFiled: July 29, 2003Date of Patent: December 7, 2004Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Masato Yamasaki, Koji Ono, Takumi Nishimoto, Jun Sato
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Publication number: 20040233651Abstract: A method for manufacturing a modular electrical circuit includes the steps of pre-manufacturing a plurality of components having fine features such as resistors, capacitors, inductances, and conductors formed on a dielectric substrate. The pre-manufactured components are laminated each to the other in a predetermined order. Each pre-manufactured component includes one or more electrical elements of the same type coupled each to the other by conducting lines. Each dielectric substrate includes through vias filled with the conductive material which serve for cross-coupling of the elements of neighboring components. Position of the passive elements, as well as conductive lines and through vias, are pre-designed to allow precise coordination between the elements of different components in the multi-layered modular electrical circuit.Type: ApplicationFiled: June 14, 2004Publication date: November 25, 2004Inventors: David Liu, Chengping Zhang, Michael T. Duignan
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Patent number: 6819569Abstract: A thin film circuit module for terminating circuit conductors at printed and transmission line circuits. In one form of equalizer construction, thin film circuit elements are deposited on a supporting substrate and wherein one of the capacitor plates defines a circuit resistor. The equalizer modules are serially coupled to trace conductors of a connector block. Another hybrid equalizer construction includes thin film resistors and pick-and-placed capacitors.Type: GrantFiled: December 6, 2002Date of Patent: November 16, 2004Assignee: Thin Film Technology Corp.Inventors: Mark Hamilton Broman, Mike Howieson, Brent Randel Huibregtse, Tsuguhiko Takamura
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Patent number: 6775123Abstract: An asymmetrical capacitor system is provided which creates a thrust force. The system is adapted for use in space applications and includes a capacitor device provided with a first conductive element and a second conductive element axially spaced from the first conductive element and of smaller axial extent. A shroud supplied with gas surrounds the capacitor device. The second conductive element can be a wire ring or mesh mounted on dielectric support posts affixed to a dielectric member which separates the conductive elements or a wire or mesh annulus surrounding a barrel-shaped dielectric member on which the first element is also mounted. A high voltage source is connected across the conductive elements and applies a high voltage to the conductive elements of sufficient value to create a thrust force on the system inducing movement thereof.Type: GrantFiled: May 27, 2003Date of Patent: August 10, 2004Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space AdministrationInventor: Jonathan W. Campbell
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Patent number: 6761963Abstract: A system and method for the fabrication of high reliability capacitors (1011), inductors (1012), and multi-layer interconnects (1013) (including resistors (1014)) on various thin film hybrid substrate surfaces (0501) is disclosed. The disclosed method first employs a thin metal layer (0502) deposited and patterned on the substrate (0501). This thin patterned layer (0502) is used to provide both lower electrodes for capacitor structures (0603) and interconnects (0604) between upper electrode components. Next, a dielectric layer (0705) is deposited over the thin patterned layer (0502) and the dielectric layer (0705) is patterned to open contact holes (0806) to the thin patterned layer. The upper electrode layers (0907, 0908, 1009, 1010) are then deposited and patterned on top of the dielectric (0705).Type: GrantFiled: September 21, 2001Date of Patent: July 13, 2004Inventors: Michael D. Casper, William B. Mraz
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Patent number: 6757180Abstract: An electronic component base for an electronic component is disclosed to have a top wall adapted to accommodate an electronic component core, diagonally extended wire grooves in the top wall for guiding out lead wires of the loaded electronic component core, a bottom wall, a plurality of electrically conducting zones in the bottom wall, four peripheral walls, four chamfered angles alternatively connected between the peripheral walls, and four conducting side grooves respectively extended from the wire grooves to the electrically conducting zones for receiving the lead wires of the electronic component core from the wire grooves.Type: GrantFiled: June 17, 2003Date of Patent: June 29, 2004Assignee: Ferrico CorporationInventors: Chien Yee Chiang, Ming-Tung Lai
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Publication number: 20040105244Abstract: A lead assembly including a connector connecting structure having a plurality of separable portions and a plurality of leads. Each of the leads defined that they have a first end, a second end, a lead axis defined by the first and the second end, and an offset portion disposed between the first end and the second end. The offset portion being offset from the lead axis and adapted to be displaced downwardly with respect to the lead axis and bonded to a contact. The leads are preferably integral with the connecting structure. The connecting structure may be arranged outwardly of the leads, or may include parts interdispersed between groups of leads. The groups of leads may or may not correspond to individual units incorporating a microelectronic element.Type: ApplicationFiled: August 6, 2003Publication date: June 3, 2004Inventors: Ilyas Mohammed, Young-Gon Kim
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Patent number: 6693801Abstract: An electronic device includes a wiring board, and at least one pair of signal lines that is provided on the wiring board in parallel and has an equal length. A chip is mounted on the wiring board and includes at least one differential driver which outputs complementary digital transmit signals to said at least one of lines. A pair of power system lines is provided to supply first and second power supply voltages to the above-mentioned at least one differential driver. The power system lines are parallel to each other and have an equal length.Type: GrantFiled: December 31, 2002Date of Patent: February 17, 2004Inventor: Kanji Otsuka
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Patent number: 6665195Abstract: The invention relates to a capacitor module for a converter. The capacitor module contains a capacitor which can be fastened to a base frame or to a cooling body by means of lateral, mechanical holding devices. In addition, the capacitor comprises at least one additional mechanical holding device for fastening at least one electronic terminal of the converter and of at least one measuring sensor, especially of a current transformer and/or of a voltage transformer. The inventive capacitor module makes it possible to realize a construction of a converter which is compact and has a reduced weight.Type: GrantFiled: June 5, 2001Date of Patent: December 16, 2003Assignee: Bombardier Transportation GmbHInventors: Rodscha Drabon, Manfred Zengerle, Johannes Scholten
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Patent number: 6654218Abstract: A circuit board (1) is provided upon which a predetermined number of semiconductor elements (5a, 5b, 6), including at least a field-effect transistor for charge and discharge, are mounted. A predetermined number of passive elements (7, 8a˜8c, 9a˜9g) are also mounted onto the circuit board. The semiconductor elements (5a, 5b, 6) are mounted facedown as bare chips on the circuit board (1).Type: GrantFiled: September 21, 2001Date of Patent: November 25, 2003Assignee: Rohm Co., Ltd.Inventors: Eiji Yokoyama, Keigo Nakamura, Naoya Tanaka
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Patent number: 6631071Abstract: A reliable capacitor module is provided which can solve the following problem: when a plurality of capacitors is mounted on a wiring board, the wiring board is distorted and deformed by the weight and cracks appear on mounting holes and the main body of the wiring board. The bottoms of metallic cases of the capacitors are fit in recesses formed on a mounting plate. In this state, lead wires drawn from the upper surfaces of the capacitors are electrically connected via the wiring board. With this configuration, a weight load of the plurality of capacitors is not applied at all, thereby preventing distortion and deformation of the wiring board and vibration causing cracks on the main body of the wiring board.Type: GrantFiled: January 14, 2003Date of Patent: October 7, 2003Assignee: Matsushita Electric Industrial Co., Ltd.Inventors: Toshiyuki Kitagawa, Tatehiko Inoue, Isao Masumoto, Koji Tsuyuki
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Patent number: 6613979Abstract: A device and method wherein electrical components are mechanically suspended and electrically interconnected in an insulative elastomeric body, such as silicone, thereby eliminating the need for a circuit board or other circuit substrate. The device can change shape through compression, distension, flexure, and other external forces while maintaining its electrical performance and mechanical integrity. The device can be compressed and deformed to fit snugly within another device, such as the shell of an electrical connector or a plastic clamshell, simultaneously creating spring forces for reliable electrical contacts and an environmental seal. Accordingly, the device and method can be used for a wide variety of purposes such as electrical filtering for avionics, computer or automotive connectors, or a non-intrusive manner to package electronics for medical implants.Type: GrantFiled: August 27, 1997Date of Patent: September 2, 2003Assignee: Quell CorporationInventors: Paul J. Miller, Kevin G. Foreman
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Patent number: 6556453Abstract: An electronic circuit package (400, FIG. 4) includes one or more trench vias (404, FIG. 4). Each trench via makes electrical contact with one or more terminals (526, FIG. 5) of a discrete device (520, FIG. 5) embedded within the package. A trench via can extend to a surface of the package, or one or more conventional vias (620, FIG. 6) formed within layers (602, FIG. 6) above or below the trench via can electrically connect the trench via, and thus the discrete device, to the surface of the package. The discrete device (520, FIG. 5) can be a capacitor, in one embodiment, providing decoupling capacitance to an integrated circuit load. Besides being implemented in a package, the trench vias also could be implemented in other types of electronic circuit housings (e.g., interposers, sockets, and printed circuit boards).Type: GrantFiled: December 13, 2000Date of Patent: April 29, 2003Assignee: Intel CorporationInventors: David G. Figueroa, Nicholas R. Watts
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Publication number: 20030076666Abstract: An electronic device has a plastic housing. The plastic housing has components of a height-structured metallic leadframe. The components are in a matrix form and contain contact islands and chip islands on the underside of the plastic housing. Furthermore, the electronic device has a first line structure containing height-structured interconnects on the underside of the plastic housing and a second line structure containing bonding connections which are disposed within the plastic housing.Type: ApplicationFiled: September 30, 2002Publication date: April 24, 2003Inventors: Frank Daeche, Franz Petter
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Patent number: 6529385Abstract: Apparatus and methods for connecting a device to an integrated circuit. The apparatus includes an insulating substrate that has two major sides and a number of sites for housing components. Each site has a first node on one of the two sides of the insulating substrate and a second node on the other of the two sides of the insulating substrate. Each site also has components that are aligned normal to the sides of the insulating substrate and are connected to the nodes at the site. Such apparatus are useful as adapters for testing an integrated circuit, such as connecting a test device to the integrated circuit with the adapter and observing and/or driving signals through the adapter.Type: GrantFiled: August 25, 1999Date of Patent: March 4, 2003Assignee: Intel CorporationInventors: Gary W. Brady, Harry L. Hampton, III, Michael T. White, Ashok N. Kabadi
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Patent number: 6525945Abstract: An eletronic package comprising a printed circuit board on which are mounted a plurality of decoupling capacitors is disclosed. A carrier component electrically connects an integrated circuit to the printed circuit board through a plurality of solder balls. The plurality of solder balls comprises at least one solder ball for the integrated circuit ground voltage connection and at least one solder ball for the integrated circuit power voltage connection. The plurality of decoupling capacitors is organized as a set of ‘n’ capacitors ranged from a lower capacitor value Clow to a higher capacitor value Chigh such that the range Clow to Chigh of the ‘n’ capacitor values is a function of the frequency range Flow to Fhigh on which the integrated circuit operates.Type: GrantFiled: August 21, 2000Date of Patent: February 25, 2003Assignee: International Business Machines CorporationInventors: Philippe Pierre Louis, Patrick Michel, Michel Paul Verhaeghe
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Patent number: 6515868Abstract: Printed circuit board 1 on which LSI2 is mounted comprises first capacitors 4a and 4b for electrically connecting power source terminals 3a and 3b to via holes 8b, first power source wiring 5a, second power source wiring 6a and a second capacitor 7a. In a predetermined frequency range, the characteristic impedances in power source wirings 5a and 6a are set to three times or more higher than the impedances in capacitors 4a, 4b and 7a. In addition, the lengths of power source wirings 5a and 6a are set to equal to or larger than a value obtained by multiplying 20 mm by the wavelength reduction rate of the printed circuit board and equal to or smaller than a value obtained by multiplying one quarter the wavelength at the upper limit frequency in the predetermined frequency range by the wavelength reduction rate.Type: GrantFiled: October 12, 2000Date of Patent: February 4, 2003Assignee: NEC CorporationInventors: Hideki Sasaki, Shuichi Oe, Shunji Sato, Takahiko Kikukawa, Hideaki Kobayashi, Takashi Harada, Yuki Takahashi
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Patent number: 6510060Abstract: An electrical subassembly includes a holding device having at least one support surface for communicating with a carrier substrate. The device is mechanically fixable to the carrier substrate. An electrical component fixed to the holding device, the component having at least one connecting element, the connecting element having at least one bent-off section positioned at the support surface of the holding device, the at least one bent-off section being electrically connected to at least one trace on the carrier substrate.Type: GrantFiled: October 18, 2001Date of Patent: January 21, 2003Assignee: Robert Bosch GmbHInventors: Gert Jakob, Gerd Bohmwetsch, Bernd Eckert
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Publication number: 20020186554Abstract: A method and implementing system are described in which a tri-plate chip carrier is effective to significantly reduce electromagnetic signal radiation and provide enhanced noise immunity. The tri-plate structure includes a ground layer, a middle signal conducting layer upon which an integrated circuit is mounted, and a top reference potential layer. The middle layer includes groups of printed circuit conductors extending from the chip to the outer edges of the carrier. The top layer is arranged to have separate electrically isolated conducting areas for VDD and ground reference potential connections. The conducting areas are arranged such that each group of signal conductors in the middle signal layer has a ground potential area above it and a ground potential area below it to provide enhanced signal isolation and reduced electromagnetic radiation.Type: ApplicationFiled: August 12, 2002Publication date: December 12, 2002Inventors: Patrick H. Buffet, Paul Lee Clouser, Danny Marvin Neal
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Patent number: 6483711Abstract: A transceiver module which is easily and conveniently assembled, and which is reliable. The transceiver module comprises a housing, an optoelectronic subassembly, a receptacle, a chassis and a PCB. The optoelectronic subassembly is received in the receptacle. Conductive leads of the optoelectronic subassembly are soldered to the PCB. The chassis is attached to the PCB with screws, and accommodates and protects the PCB. The housing comprises a top housing and a bottom housing. The top housing is attached to the chassis and the receptacle. The top housing and bottom housings are attached together, enclosing therein the receptacle, the chassis and the PCB.Type: GrantFiled: August 24, 2001Date of Patent: November 19, 2002Assignee: Hon Hai Precision Ind. Co., Ltd.Inventor: Nan Tsung Huang
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Patent number: 6465746Abstract: An oscillator attachment structure which prevents interference by a beat signal caused by mixture of a reference oscillation signal from a PLL circuit and an oscillation signal from an oscillator. A plate conductive rubber plate, electrically connected to a ground conductor, is provided on the lower surface of a circuit board, and the conductive rubber plate is disposed on a ground conductive member of a printed circuit board. The ground conductor and the ground conductive member are electrically connected to each other, and the circuit board can be sufficiently grounded to the PLL circuit on the printed circuit board.Type: GrantFiled: October 17, 2000Date of Patent: October 15, 2002Assignee: Alps Electric Co., Ltd.Inventor: Kazutoyo Kajita
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Patent number: 6459590Abstract: A central unit for grouping electronic and electrical components of refrigerators, freezers and similar appliances, comprising a housing containing at least one electronic card provided with electrical connection means and socket means for connecting the appliance to the electrical power supply.Type: GrantFiled: June 15, 2001Date of Patent: October 1, 2002Assignee: Whirlpool CorporationInventor: Roberto Malnati
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Publication number: 20020105792Abstract: A method of making a microelectronic package includes providing a substrate having a plurality of conductive leads at a first surface of the substrate. The conductive leads may have first ends permanently attached to the substrate and second ends remote from the terminal ends, the second ends being movable relative to the first ends of the leads. One or more microelectronic elements having contact bearing surfaces and back surfaces remote therefrom may be juxtaposed with the substrate and the contacts connected with the first ends of the leads. A substantially rigid plate may be attached to the back surfaces of the microelectronic elements. The substantially rigid plate may be moved to a precise height above the substrate to vertically extend the leads. While the plate is maintained at the precise height above the substrate, a spacer material is dispensed between the plate and the substrate. The spacer material is then at least partially cured for holding the plate at the precise height above the substrate.Type: ApplicationFiled: September 19, 2001Publication date: August 8, 2002Inventors: Masud Beroz, Michael Warner
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Patent number: 6411493Abstract: An asymmetrical capacitor module for generating thrust includes two conductive elements of similar but different geometries separated by a dielectric member. Improved embodiments provided in the construction of conductive elements of smaller axial extent include those where the element is formed by an annular wire or a dielectric supported ring. Other embodiments concern the dielectric member and involve changes in the extent and shape thereof.Type: GrantFiled: September 20, 2001Date of Patent: June 25, 2002Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space AdministrationInventor: Jonathan W. Campbell
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Patent number: 6407928Abstract: A surface mountable and low profile electrical component which can be electrically coupled to the solder side of a PCB, while other electrical components are mounted to a component side of the PCB. The surface mountable electrical component includes a mounting substrate having a diode or LED chip with electrical terminals. The terminals pass through the mounting substrate to be electrically coupled to first and second electrical contacts, which provide an electrical pathway between the terminals and the PCB.Type: GrantFiled: June 30, 2000Date of Patent: June 18, 2002Assignee: Cisco Technology, Inc.Inventors: Dean R. Falkenberg, Edward T. Iwamiya
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Patent number: 6373720Abstract: A module with electronic components mounted on a carrier and electrically interconnected in accordance with a predefined circuit. Such a module, distinguished by particular variability, ease of assembly, compactness and applicability for high currents, is characterized in that the carrier is an injection molded plastic part (1), into which flat connectors (3) for receiving the components may be inserted.Type: GrantFiled: April 19, 1999Date of Patent: April 16, 2002Assignee: AlcatelInventors: Helmut Fechtig, Heinz Neukum
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Patent number: 6366194Abstract: Known Hall sensors are fastened to a printed circuit board by way of component holders in order to achieve an exact positioning and securing on a printed circuit board in relation to a magnet ring of a rotor of an adjusting motor. A component holder for a Hall sensor is partially injection molded only onto connecting prongs of the Hall sensor or is injection molded onto connecting prongs and at least partially onto a housing of the Hall sensor. The component holder for a Hall sensor according to the invention is provided for adjusting motors, such as window regulator motors of motor vehicles.Type: GrantFiled: September 20, 1999Date of Patent: April 2, 2002Assignee: Robert Bosch GmbHInventors: Guenther Riehl, Martin Hager
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Patent number: 6365841Abstract: A printed circuit board includes a first mark 2 formed by a thin conductor, a second mark 3 formed by a resist 8, a land 6 which is partially coated by the resist 8 and a land 7 which is not coated by the resist 8. The second mark 3 is formed when the land 6 is partially coated by the resist 8. A device 4, which corresponds to the land 6, is mounted at a position apart from a center O2 of the second mark 3 by a predetermined distance L1. A device 5, which corresponds to the land 7, is mounted at a position apart from a center O1 of the first mark 2 by a predetermined distance L2. Therefor, the devices 4, 5 can be properly mounted on the printed circuit board 1 in spite of a positional error of the resist 8.Type: GrantFiled: July 17, 1998Date of Patent: April 2, 2002Assignee: Fuji Photo Film Co., Ltd.Inventor: Kotaro Takigami
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Patent number: 6366468Abstract: Precision alignment of one or more parts on a common carrier is described. A self-aligned common carrier includes a carrier substrate having one or more pockets formed in the substrate. Each pocket includes a side profile formed in the pocket. A chip having an identical side profile that complements the side profile in the pocket is mounted to the carrier substrate by inserting the chip into the pocket. The complementary side profiles result in near perfect self-alignment between the chip and at least two orthogonal planes of the carrier substrate. The chip and the carrier substrate can be made from a single crystal semiconductor material and the side profiles can be formed by anisotropic etch process that selectively etches the chip and the substrate along a predetermined crystalline plane. The chip and the carrier substrate can be single crystal silicon having a (100) crystalline orientation and the side profiles can be formed by selectively etching the silicon along a (111) crystalline plane.Type: GrantFiled: April 28, 2000Date of Patent: April 2, 2002Assignee: Hewlett-Packard CompanyInventor: Alfred I-Tsung Pan
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Publication number: 20020036899Abstract: A module with electronic components mounted on a carrier and electrically interconnected in accordance with a predefined circuit. Such a module, distinguished by particular variability, ease of assembly, compactness and applicability for high currents, is characterized in that the carrier is an injection molded plastic part (1), into which flat connectors (3) for receiving the components may be inserted.Type: ApplicationFiled: April 19, 1999Publication date: March 28, 2002Inventors: HELMUT FECHTIG, HEINZ NEUKUM
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Publication number: 20020006035Abstract: An electronic circuit unit having a circulator is formed of a circuit board made by laminating a plurality of dielectric substrates; first, second, and third central conductors disposed at intervals of 120 degrees on a plurality of dielectric substrates and partially intersecting in the upper and lower directions; a magnet and a ferrite member disposed above and below the intersection of the central conductors; a first yoke 10 covering the outside of the magnet; and a second yoke 11 covering the outside of the ferrite member. One end of each of the central conductors serves as an input and output terminal, and the ends are disposed at intervals of 120 degrees. Adjacent input and output terminals are connected by inductive elements.Type: ApplicationFiled: July 12, 2001Publication date: January 17, 2002Applicant: Alps Electric Co., LtdInventors: Yuichi Shimizu, Nobuhiko Suzuki
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Publication number: 20010048593Abstract: The tuner structure of the present invention includes: a circuit board on which electronic circuit components such as transistors and resistors have been mounted; a chassis angle; and a shield cover. In the tuner structure, a feedthrough capacitor for inputting/outputting a power, a control signal and the like is mounted to a metal plate disposed in parallel to the circuit board.Type: ApplicationFiled: June 25, 2001Publication date: December 6, 2001Inventors: Miyoshi Yamauchi, Mitsuhiro Noboru, Haruo Koizumi, Syuuji Matsuura, Toshifumi Akiyama
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Patent number: 6317310Abstract: A capacitor module system is provided for creating a thrust force. The system includes a capacitor module provided with a first conductive element having a cylindrical geometry. The first conductive element can be a hollow cylinder or a solid cylinder. The capacitor module also includes a second conductive element axially spaced from the first conductive element and of smaller axial extent. The second conductive element can be a flat disk, a dome, or a conductive tip at the end of a dielectric rod. A dielectric element is disposed between the first conductive element and the second conductive element. The system also includes a high voltage source having first and second terminals connected respectively to the first and second conductive elements. The high voltage source applies a high voltage to the conductive elements of sufficient value to create a thrust force on the module inducing movement thereof.Type: GrantFiled: March 8, 2000Date of Patent: November 13, 2001Assignee: The United States of America as represented by the Administrator of the National Aeronautics and Space AdministrationInventor: Jonathan W. Campbell
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Patent number: 6300564Abstract: Apparatus for alternatively mounting either a large cylindrical capacitor having a given length and a given diameter or a small cylindrical capacitor having a given length and a given diameter. The apparatus includes a substantially planar support wall having two or more substantially U-shaped support walls extending substantially perpendicularly therefrom. The U-shaped support walls are parallel to one another and are spaced from one another by a distance such that at least two of the U-shaped walls will span the given length of either of the capacitors. Each of the two or more U-shaped walls defines an upwardly facing capacitor support surface. Each of the support surfaces has a lower arcuate section extending between left and right end points. The lower arcurate sections have an effective diameter, which is substantially equal to the given diameter of the small capacitor.Type: GrantFiled: May 9, 2000Date of Patent: October 9, 2001Assignee: Carrier CorporationInventors: Luciano da Luz Moraes, Juan Carlos Carne Correa, Daniel Alessandro Oliveira de Barros
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Patent number: 6262367Abstract: A cover for the upper end of an electrical capacitor having electrical leads on the upper end thereof. The cover includes a cup-shaped cylindrical section having a closed end and an open end. The open end being adapted to receive the upper end of the capacitor. The capacitor cover further includes a radially extending opening defining a passage for electrical leads from the exterior thereof into the interior of the cover. The cover is further provided with radially extending mounting means which are adapted to be received in mating vertically extending support structure which allows the cover to be supported through a range of vertical positions. The cover further includes a grounding screw support structure extending from the outer surface which is adapted to receive a grounding screw therethrough to engage the capacitor protected by the cover.Type: GrantFiled: July 13, 1998Date of Patent: July 17, 2001Assignee: Carrier CorporationInventor: Juan Carlos Carne Correa
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Patent number: 6262368Abstract: A data carrier has a chip with chip contacts, a transmission coil for contactless communication with a write/read station, a metal lead frame with a chip carrying part and contact forming parts, and a chip cover made of electrically insulating material. The transmission coil has coil contacts. The chip cover has a first cover part covering the chip at one side of the metal lead frame and a second cover part covering the other side of the metal lead frame. The second cover part has electrically conducting passages electrically connecting the coil contacts to the contact forming parts that are otherwise connected to the chip contacts. The chip carrying part and the first and second contact forming parts are electrically insulated with respect to each other and are arranged in a substantially coplanar relationship to each other.Type: GrantFiled: March 24, 1999Date of Patent: July 17, 2001Assignee: U.S. Philips CorporationInventors: Thomas Riener, Stefan Posch
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Patent number: 6239367Abstract: A multi-chip chip scale package. The package has a film carrier whereby two chips with different sizes can be disposed on the same film carrier. A flip chip technique is used to arrange each chip on each side of the film carrier face to face. A bump is formed on each chip to electrically connect with the film carrier. An insulation material is filled in between the chips to leave one side of each chip exposed. The conductive wires of the film carrier are connected to the chips directly.Type: GrantFiled: February 1, 1999Date of Patent: May 29, 2001Assignee: United Microelectronics Corp.Inventors: Min-Chih Hsuan, Cheng-Te Lin