Having Details Of Control Storage Arrangement Patents (Class 370/381)
  • Patent number: 11907142
    Abstract: Excessive polling that may result in wasted computing resources and unnecessary network traffic can be avoided using some techniques described herein. In one example, a method can include obtaining historical data indicating execution times associated with computing operations. The method can also include determining polling times to assign to the computing operations by applying a model to the historical data. The method may also include configuring a software application to implement the polling times in relation to polling processes for transmitting requests to execute the computing operations to one or more destinations.
    Type: Grant
    Filed: February 4, 2022
    Date of Patent: February 20, 2024
    Assignee: RED HAT, INC.
    Inventors: Brian Gallagher, Cathal O'Connor
  • Patent number: 11552907
    Abstract: A method during a first cycle includes receiving, at a first port of a device, a plurality of network packets. The method may include storing, by the device, at least some portion of a first packet of the plurality of network packets at a first address within a first record bank and storing, by the device and concurrent with storing the at least some portion of the first packet from the first address, at least some portion of a second packet of the plurality of network packets at a second address within a second record bank, different than the first record bank. The method may further include storing, by the device, the first address within the first record bank and the second address within the second record bank in the first link stash associated with the first record bank and updating, by the device, a tail pointer to reference the second address.
    Type: Grant
    Filed: August 14, 2020
    Date of Patent: January 10, 2023
    Assignee: FUNGIBLE, INC.
    Inventors: Paul Kim, Philip A. Thomas
  • Patent number: 11443091
    Abstract: An integrated circuit includes a plurality of data processing engines (DPEs) DPEs. Each DPE may include a core configured to perform computations. A first DPE of the plurality of DPEs includes a first core coupled to an input cascade connection of the first core. The input cascade connection is directly coupled to a plurality of source cores of the plurality of DPEs. The input cascade connection includes a plurality of inputs, wherein each of the plurality of inputs is connected to a cascade output of a different one of the plurality of source cores. The input cascade connection is programmable to enable a selected one of the plurality of inputs.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: September 13, 2022
    Assignee: Xilinx, Inc.
    Inventors: Peter McColgan, Baris Ozgul, David Clarke, Tim Tuan, Juan J. Noguera Serra, Goran H. K. Bilski, Jan Langer, Sneha Bhalchandra Date, Stephan Munz, Jose Marques
  • Patent number: 11385623
    Abstract: System and methods for data collection, processing, and utilization of signals in an industrial environment are disclosed. A data acquisition circuit structured to interpret a plurality of detection values from a plurality of input sensors communicatively coupled to the data acquisition circuit, a peak detection circuit to determine at least one peak value in response to the plurality of detection values, a peak response circuit to select at least one detection value in response to the at least one peak value, a communication circuit to communicate the at least one selected detection value to a remote server, and a monitoring application on the remote server to receive the at least one selected detection value, jointly analyze received detection values and recommend an action in response are disclosed herein.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: July 12, 2022
    Assignee: Strong Force IoT Portfolio 2016, LLC
    Inventors: Charles Howard Cella, Gerald William Duffy, Jr., Jeffrey P. McGuckin, Mehul Desai
  • Patent number: 11353851
    Abstract: Systems and methods for monitoring data collection in an industrial environment are disclosed. A data acquisition circuit structured to interpret a plurality of detection values from a plurality of input sensors communicatively coupled to the data acquisition circuit, each of the plurality of detection values corresponding to at least one of the plurality of input sensors, a peak detection circuit structured to determine at least one peak value in response to the plurality of detection values and a peak response circuit structured to perform at least one operation in response to the at least one peak value are disclosed.
    Type: Grant
    Filed: December 14, 2018
    Date of Patent: June 7, 2022
    Assignee: Strong Force IoT Portfolio 2016, LLC
    Inventors: Charles Howard Cella, Gerald William Duffy, Jr., Jeffrey P. McGuckin, Mehul Desai
  • Patent number: 10754675
    Abstract: A system and method include receiving, by a controller/service virtual machine, a first request associated with an element of a visualization environment using an application programming interface (API). The first request includes a context-specific identifier. The controller/service virtual machine resides on a host machine of the virtualization environment, and the element is operatively associated with the host machine. The system and method further include determining, by the controller/service virtual machine, a type of the context-specific identifier in the first request, and mapping, by the controller/service virtual machine, the context-specific identifier to a unique identifier associated with the element based upon the determined type.
    Type: Grant
    Filed: December 1, 2017
    Date of Patent: August 25, 2020
    Assignee: NUTANIX, INC.
    Inventors: Akshay Deodhar, Venkata Vamsi Krishna Kothuri, Binny Gill
  • Patent number: 10489288
    Abstract: A method of dynamically selecting deduplication granularity in a memory system to decrease deduplication granularity and to increase hash-table efficiency, the method including selecting one or more deduplication granularities at an application level of an application using the memory system, the one or more deduplication granularities being selected according to features of the memory system, and assigning a memory region corresponding to each of the one or more selected deduplication granularities, where the method may use a memory manager to share memory translation table and hash table, and may be employed by a system that enables using higher capacity pre-allocated counter fields for frequently utilized lines.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: November 26, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Krishna T. Malladi, Hongzhong Zheng
  • Patent number: 10416634
    Abstract: The system generally includes a crosspoint switch in the local data collection system having multiple inputs and multiple outputs including a first input connected to the first sensor and a second input connected to the second sensor. The multiple outputs include a first output and a second output configured to be switchable between a condition in which the first output is configured to switch between delivery of the first sensor signal and the second sensor signal and a condition in which there is simultaneous delivery of the first sensor signal from the first output and the second sensor signal from the second output. Each of multiple inputs is configured to be individually assigned to any of the multiple outputs. Unassigned outputs are configured to be switched off producing a high-impedance state.
    Type: Grant
    Filed: December 29, 2017
    Date of Patent: September 17, 2019
    Assignee: Strong Force IOT Portfolio 2016, LLC
    Inventors: Charles Howard Cella, Gerald William Duffy, Jr., Jeffrey P. McGuckin
  • Patent number: 10412025
    Abstract: Significantly optimized multi-stage networks with scheduling methods for faster scheduling of connections, useful in wide target applications, with VLSI layouts using only horizontal and vertical links to route large scale sub-integrated circuit blocks having inlet and outlet links, and laid out in an integrated circuit device in a two-dimensional grid arrangement of blocks are presented. The optimized multi-stage networks in each block employ several slices of rings of stages of switches with inlet and outlet links of sub-integrated circuit blocks connecting to rings from either left-hand side only, or from right-hand side only, or from both left-hand side and right-hand side; and employ multi-drop links where outlet links of cross links from switches in a stage of a ring in one sub-integrated circuit block are connected to either inlet links of switches in the another stage of a ring in the same or another sub-integrated circuit block.
    Type: Grant
    Filed: January 31, 2018
    Date of Patent: September 10, 2019
    Assignee: Konda Technologies Inc.
    Inventor: Venkat Konda
  • Patent number: 10326713
    Abstract: The disclosure describes a data enqueuing method. The method may include: receiving a to-be-enqueued data packet, dividing the data packet into several slices to obtain slice information of the slices, and marking a tail slice of the data packet with a tail slice identifier; enqueuing corresponding slice information according to an order of the slices in the data packet, and in a process of enqueuing the corresponding slice information, if a slice is marked with the tail slice identifier, determining that the slice is the tail slice of the data packet, and generating a first-type node; and determining whether a target queue is empty, and if the target queue is empty, writing slice information of the tail slice into the target queue, and updating a head pointer of a queue head list according to the first-type node.
    Type: Grant
    Filed: January 30, 2018
    Date of Patent: June 18, 2019
    Assignee: HUAWEI TECHNOLOGIES CO., LTD.
    Inventor: Yalin Bao
  • Patent number: 10249017
    Abstract: An apparatus is provided which comprises: a first engine buffer to receive a first engine request; a first engine register coupled to the first engine buffer, wherein the first engine register is to store first engine credits associated with the first engine buffer; a second engine buffer to receive a second engine request; a second engine register coupled to the second engine buffer, wherein the second engine register is to store second engine credits associated with the second engine buffer; and a common buffer which is common to the first and second engines, wherein the first engine credits represents one or more slots in the common buffer for servicing the first engine request for access to a common resource, and wherein the second engine credits represents one or more slots in the common buffer for servicing the second engine request for access to the common resource.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: April 2, 2019
    Assignee: Intel Corporation
    Inventors: Nicolas Kacevas, Niranjan L. Cooray, Madhura Joshi, Satyanarayana Nekkalapu
  • Patent number: 10055365
    Abstract: Methods and apparatuses regarding shared buffer arbitration for packet-based switching are described. A data packet may be received by a packet buffer including a first plurality of banks of memory units and a second plurality of banks of memory units. Each memory unit may store one cell of data and accommodate one access operation in one clock cycle. In an event that the data packet includes at least two cells of data, the at least two cells of the data packet may be alternately written into at least one memory unit in the first plurality of banks of memory units and at least one memory unit in the second plurality of banks of memory units. Cells of data packets may be read from the first plurality of banks of memory units and the second plurality of banks of memory units according to a time-division multiplexing (TDM) scheme.
    Type: Grant
    Filed: April 21, 2016
    Date of Patent: August 21, 2018
    Assignee: MEDIATEK INC.
    Inventor: Kuo-Cheng Lu
  • Patent number: 10021010
    Abstract: A capability is provided for adaptive polling of a device based on a set of polling control regions configured to control polling of the device. The set of polling control regions is defined based on at least one of a set of control parameters and non-parametric control information. A transition within the set of polling control regions is determined based on a current polling control region and a target polling control region that is determined based on input information received while in the current polling control region. The input information may include at least one of values of one or more parameters in the set of parameters and non-parametric input information. The transition may include remaining in the current polling control region or transitioning to a new polling control region. The transition may be performed based on a rapid up controlled down (RUCD) transition scheme.
    Type: Grant
    Filed: April 17, 2015
    Date of Patent: July 10, 2018
    Assignee: WSOU Investments, LLC
    Inventors: Thomas P. Chu, Ahmet A. Akyamac, Dan Kushnir, Huseyin Uzunalioglu
  • Patent number: 10003553
    Abstract: Significantly optimized multi-stage networks, useful in wide target applications, with VLSI layouts using only horizontal and vertical links to route large scale sub-integrated circuit blocks having inlet and outlet links, and laid out in an integrated circuit device in a two-dimensional grid arrangement of blocks are presented. The optimized multi-stage networks in each block employ several rings of stages of switches with inlet and outlet links of sub-integrated circuit blocks connecting to rings from either left-hand side only, or from right-hand side only, or from both left-hand side and right-hand side; and employ shuffle exchange links where outlet links of cross links from switches in a stage of a ring in one sub-integrated circuit block are connected to either inlet links of switches in the another stage of a ring in the same or another sub-integrated circuit block.
    Type: Grant
    Filed: April 28, 2016
    Date of Patent: June 19, 2018
    Assignee: Konda Technologies Inc.
    Inventor: Venkat Konda
  • Patent number: 9983642
    Abstract: A method for zeroing memory in computing systems where access to memory is non-uniform includes receiving, via a system call, a request to delete a memory region. The method also includes sorting, after receiving the request, one or more pages of the memory region according to each associated affinity domain of each page. The method further includes sending requests to zero the sorted one or more pages to one or more zeroing threads that are attached to the respective affinity domain. The method further yet includes waiting, after sending the requests, to return to the system caller until a message is received, from the zeroing threads in each affinity domain, indicating that all the page zeroing requests have been processed.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: May 29, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nikhil Hedge, Bruce Mealey, Mark D. Rogers
  • Patent number: 9929977
    Abstract: Significantly optimized multi-stage networks with scheduling methods for faster scheduling of connections, useful in wide target applications, with VLSI layouts using only horizontal and vertical links to route large scale sub-integrated circuit blocks having inlet and outlet links, and laid out in an integrated circuit device in a two-dimensional grid arrangement of blocks are presented. The optimized multi-stage networks in each block employ several slices of rings of stages of switches with inlet and outlet links of sub-integrated circuit blocks connecting to rings from either left-hand side only, or from right-hand side only, or from both left-hand side and right-hand side; and employ multi-drop links where outlet links of cross links from switches in a stage of a ring in one sub-integrated circuit block are connected to either inlet links of switches in the another stage of a ring in the same or another sub-integrated circuit block.
    Type: Grant
    Filed: October 22, 2016
    Date of Patent: March 27, 2018
    Assignee: Konda Technologies Inc.
    Inventor: Venkat Konda
  • Patent number: 9904337
    Abstract: A system includes a processor and a memory storing a program, and a computer readable medium includes a program for performing an operation for zeroing memory in computing systems where access to memory is non-uniform. The operation includes receiving, via a system call, a request to delete a memory region. The operation also includes sorting, after receiving the request, one or more pages of the memory region according to each associated affinity domain of each page. The operation further includes sending requests to zero the sorted one or more pages to one or more zeroing threads that are attached to the respective affinity domain. The operation further yet includes waiting, after sending the requests, to return to the system caller until a message is received, from the zeroing threads in each affinity domain, indicating that all the page zeroing requests have been processed.
    Type: Grant
    Filed: October 14, 2015
    Date of Patent: February 27, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nikhil Hegde, Bruce Mealey, Mark D. Rogers
  • Patent number: 9891861
    Abstract: A method for zeroing memory in computing systems where access to memory is non-uniform includes receiving, via a system call, a request to delete a memory region. The method also includes forwarding the request to an intermediate software thread, and using the intermediate software thread to perform the request as a background process. The method further includes, upon receiving a message from the intermediate software thread, returning to a system caller, while performing the request, via the intermediate software thread, continues in the background.
    Type: Grant
    Filed: October 14, 2015
    Date of Patent: February 13, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nakhil Hegde, Bruce Mealey, Mark D. Rogers
  • Patent number: 9883049
    Abstract: A server. The server comprises a processor, a memory, and an application that reads revenue data and usage data, wherein the usage data comprises cell site usage of each of a plurality of subscribers, and wherein the revenue data corresponds to each of the subscribers, analyzes the usage data for each subscriber to determine a set of cell sites used by the subscriber, associates a portion of the revenue data for each subscriber to the set of cell sites used by that subscriber, reads expense data for each of the plurality of cell sites, reads capital cost data for each of the plurality of cell sites, and determines a profitability metric value for each of the plurality of cell sites based on the portion of revenue data of each subscriber associated to the cell site, based on the site-specific expense data, and based on the site-specific capital cost data.
    Type: Grant
    Filed: March 26, 2014
    Date of Patent: January 30, 2018
    Assignee: Sprint Communications Company L.P.
    Inventor: Kevin D. Warner
  • Patent number: 9870171
    Abstract: A system includes a processor and a memory storing a program, and a computer readable medium includes a program for zeroing memory in computing systems where access to memory is non-uniform. When executed on a processor, the program causes the processor to perform an operation that includes receiving, via a system call, a request for a pool of memory. The operation also includes determining a size of the requested pool of memory, and creating a dummy memory segment. The size of the dummy memory segment is larger than the size of the requested pool of memory. The operation further includes filling the dummy memory segment with one or more pages, based on the determined size of the requested pool of memory, and deleting the dummy memory segment.
    Type: Grant
    Filed: October 14, 2015
    Date of Patent: January 16, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nakhil Hegde, Bruce Mealey, Mark D. Rogers
  • Patent number: 9870036
    Abstract: A method for zeroing memory in computing systems where access to memory is non-uniform includes receiving, via a system call, a request for a pool of memory. The method also includes determining a size of the requested pool of memory, and creating a dummy memory segment. The size of the dummy memory segment is larger than the size of the requested pool of memory. The method further includes filling the dummy memory segment with one or more pages, based on the determined size of the requested pool of memory, and deleting the dummy memory segment.
    Type: Grant
    Filed: January 4, 2016
    Date of Patent: January 16, 2018
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Nikhil Hedge, Bruce Mealey, Mark D. Rogers
  • Patent number: 9838598
    Abstract: An image identification system for conducting image identification of a valuable file in an automatic teller machine and a corresponding image storage control method are provided. The system comprises: an image sensor; an image memory; an image identification module; an image storage area controller; and a main control unit, wherein the image storage area controller comprises a storage area index link table which is divided into N nodes, N being a natural number greater than 1, each node corresponding to each of the image storage areas divided by the image storage area controller in a one to one relationship, and each node storing the storage locations of a previous image and a next image which are linked with the node, and being provided with an acquired image write pointer, an identified image read pointer, an unidentifiable image head pointer, and an unidentifiable image tail pointer.
    Type: Grant
    Filed: April 9, 2013
    Date of Patent: December 5, 2017
    Assignee: GRG Banking Equipment Co., Ltd.
    Inventors: Ming Li, Mengtao Liu
  • Patent number: 9813376
    Abstract: Provided are methods and devices for acquiring a Media Access Control (MAC) address. According to a method for acquiring an MAC address, an MAC address request message is received, wherein the MAC address request message carries a Fibre Channel Identifier (FCID); whether the FCID is matched with an FCID of a receiver receiving the MAC address request message or not is judged; and when it is judged that the FCID is matched with the FCID of the receiver receiving the MAC address request message, the receiver sends a response message, wherein the response message carries an MAC address of the receiver. The technical solution solves the problem in a related technology that communication cannot be directly performed through the link layer, and has the effect of directly acquiring an MAC address corresponding to an FCID of an opposite end so as to perform communication by fast switching at the link layer.
    Type: Grant
    Filed: September 25, 2013
    Date of Patent: November 7, 2017
    Assignee: XI'AN ZHONGXING NEW SOFTWARE CO. LTD
    Inventor: Qingling Zhao
  • Patent number: 9736086
    Abstract: Systems and methods are disclosed for buffering data using a multi-function, multi-protocol first-in-first-out (FIFO) circuit. For example, a data buffering apparatus is provided that includes a mode selection input and a FIFO circuit that is operative to buffer a data signal between a FIFO circuit input and a FIFO circuit output, wherein the FIFO circuit is configured in an operating mode responsive to the mode selection signal.
    Type: Grant
    Filed: April 29, 2011
    Date of Patent: August 15, 2017
    Assignee: Altera Corporation
    Inventors: Huy Ngo, Keith Duwel, Vinson Chan, Divya Vijayaraghavan, Curt Wortman
  • Patent number: 9509634
    Abstract: Significantly optimized multi-stage networks with scheduling methods for faster scheduling of connections, useful in wide target applications, with VLSI layouts using only horizontal and vertical links to route large scale sub-integrated circuit blocks having inlet and outlet links, and laid out in an integrated circuit device in a two-dimensional grid arrangement of blocks are presented. The optimized multi-stage networks in each block employ several slices of rings of stages of switches with inlet and outlet links of sub-integrated circuit blocks connecting to rings from either left-hand side only, or from right-hand side only, or from both left-hand side and right-hand side; and employ multi-drop links where outlet links of cross links from switches in a stage of a ring in one sub-integrated circuit block are connected to either inlet links of switches in the another stage of a ring in the same or another sub-integrated circuit block.
    Type: Grant
    Filed: July 11, 2014
    Date of Patent: November 29, 2016
    Assignee: Konda Technologies Inc.
    Inventor: Venkat Konda
  • Patent number: 9372819
    Abstract: An I/O device obtains multiple unique N_Port IDs (identifiers) for a NPIV N_Port ID Virtualization (NPIV) capable physical adapter. Fabric management routines are able to assign the multiple unique N_Port IDs to distinct fabric zones. LUNs (logical unit numbers) are able to be associated with the multiple unique N_Port IDs such the LUNs associated with unique N_Port ID do not exceed a limitation. The I/O device is able to associate different resources with different unique N_Port IDs to limit the scope of actions of one or more hosts. The I/O device is able to configure one or more LUNs by the multiple unique N_Port IDs to control access. Different unique N_Port IDs are able to be configured to have different quality of service attributes and/or different levels of security. The I/O device may include multiple independent logical partitions (LPARs) and assign each multiple unique N_Port IDs.
    Type: Grant
    Filed: July 29, 2008
    Date of Patent: June 21, 2016
    Assignee: International Business Machines Corporation
    Inventors: Giles R. Frazier, Matthew J. Kalos
  • Patent number: 9363162
    Abstract: Exemplary embodiments determine respective capacities of network links in a multi-stage network. Specifically, the capacities of the upstream links for a given network element are determined based on the capacities of the downstream links for that network element. According to the various embodiments, a network element determines the amount of data, i.e. traffic, which may be assigned to downstream links based on the determined capacities. A network element may not receive more traffic than the total direct downstream capacity of the network element. Thus, optimum throughput may be attained for the entire network.
    Type: Grant
    Filed: October 21, 2013
    Date of Patent: June 7, 2016
    Assignee: Google Inc.
    Inventors: Junlan Zhou, Arjun Singh, Amin Vahdat
  • Patent number: 9325387
    Abstract: A communication device includes: an electromagnetic-wave generating unit for outputting an electromagnetic wave; and a transmitting/receiving unit for transmitting data by modulating the electromagnetic wave in accordance with data and receiving data transmitted from the other device by demodulating the electromagnetic wave outputted by the electromagnetic-wave generating unit or the electromagnetic wave outputted by the other device as the other party of communication, wherein the transmitting/receiving unit transmits attribute information indicating communication ability of the device and receives attribute information indicating communication ability of the other device, and the electromagnetic-wave generating unit reduces power of the electromagnetic wave to be outputted after receiving the attribute information.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: April 26, 2016
    Assignee: Sony Corporation
    Inventor: Yoshihisa Takayama
  • Patent number: 9160571
    Abstract: Services are provided via a multicast tree. A request to receive a service is received at a node. Stored information at the node is searched to identify a service path or a service node operable to provide the requested service.
    Type: Grant
    Filed: March 11, 2004
    Date of Patent: October 13, 2015
    Assignee: Hewlett-Packard Development Company, L.P.
    Inventors: Sujata Banerjee, Sung-Ju Lee, Zhichen Xu, Chunqiang Tang, Zhiheng Wang
  • Patent number: 9077464
    Abstract: It is provided a method for providing a service guide in a network providing a plurality of multicast services, said network comprising at least one client device connected to a first device, wherein a subset of said plurality of multicast services is being multicast to said at least one client device via said first device, and the service guide provides a list of the plurality of multicast services in a second order; and at the side of a client device, the method comprises the steps of determining a list of the plurality of multicast services in a first order, wherein the order is changed from the second order to the first order based on the multicast services of the subset; and presenting said list of multicast services in said first order.
    Type: Grant
    Filed: June 9, 2010
    Date of Patent: July 7, 2015
    Assignee: THOMSON LICENSING
    Inventors: Yun Tao Shi, Ning Liao, Jun Li
  • Patent number: 9071374
    Abstract: A communication system, network, interface, and port architecture are provided for transferring data via a network. The network can be configured by connecting ports in a daisy chain arrangement to achieve a ring architecture or topology. The network transmits data according to a specific protocol. A first port transmits frames containing frame count information which is divided into several pieces, with each piece being transmitted in a single frame. A second port receives the frames, stores them in a frame buffer, and reassembles the frame count information from a plurality of frames.
    Type: Grant
    Filed: October 3, 2008
    Date of Patent: June 30, 2015
    Assignee: SMSC Europe GmbH
    Inventors: Christopher Green, Claudius Becker
  • Patent number: 8976389
    Abstract: A printing apparatus receives a transmission request of information to be used by an information processing apparatus to transmit an image to the printing apparatus via an image processing apparatus from the information processing apparatus including the image. The printing apparatus transmits the information to the information processing apparatus if the transmission request is received. Then, the printing apparatus acquires the image that the information processing apparatus transmits using the information and prints the acquired image.
    Type: Grant
    Filed: August 23, 2012
    Date of Patent: March 10, 2015
    Assignee: Canon Kabushiki Kaisha
    Inventor: Ritsuto Sako
  • Publication number: 20150063349
    Abstract: An improvement to the prior-art extends an intelligent solution beyond simple IP packet switching. It intersects with computing, analytics, storage and performs delivery diversity in an efficient intelligent manner. A flexible programmable network is enabled that can store, time shift, deliver, process, analyze, map, optimize and switch flows at hardware speed. Multi-layer functions are enabled in the same node by scaling for diversified data delivery, scheduling, storing, and processing at much lower cost to enable multi-dimensional optimization options and time shift delivery, protocol optimization, traffic profiling, load balancing, and traffic classification and traffic engineering. An integrated high performance flexible switching fabric has integrated computing, memory storage, programmable control, integrated self-organizing flow control and switching.
    Type: Application
    Filed: August 27, 2013
    Publication date: March 5, 2015
    Inventors: SHAHAB ARDALAN, Mona Mojdeh
  • Patent number: 8938569
    Abstract: A storage network includes at least one storage processor. At least one switch is coupled to the at least one storage processor. At least one nontransparent bridge is coupled to the at least one switch. The at least one nontransparent bridge includes at least one addressable endpoint. At least one storage device is coupled to the nontransparent bridge. At least one baseboard management controller is coupled to the at least one addressable endpoint.
    Type: Grant
    Filed: March 31, 2011
    Date of Patent: January 20, 2015
    Assignee: EMC Corporation
    Inventors: Ralph C. Frangioso, Jason J. Leone, Robert W. Beauchamp, Steven D. Sardella, Thomas J. Connor
  • Patent number: 8923302
    Abstract: A set of globally-reachable attachment registers is provided for objects in an internetwork of interconnected communications networks. “Objects” can be networks, hosts or terminals, or passive objects which themselves do not have a network interface. Each attachment register corresponds to an object in the internetwork. The attachment registers are not located with their respective object. Information is stored in the attachment registers that establishes one or more logical links between the attachment registers. The information is used to perform one or more network communication functions, and in particular to determine a locator by identifying a logical path, along the logical links between attachment registers, from a destination attachment register corresponding to the destination object. Other non-limiting example functions include location registration and update, name to global locator resolution, routing, multi-homing, dynamic ISP selection, and handover.
    Type: Grant
    Filed: March 30, 2012
    Date of Patent: December 30, 2014
    Assignee: Telefonaktiebolaget LM Ericsson (publ)
    Inventor: Anders E. Eriksson
  • Patent number: 8897293
    Abstract: In a media access control (MAC) processor, a programmable controller is configured to execute machine readable instructions for implementing MAC functions corresponding to data received by a communication device. A tightly coupled memory is associated with the programmable controller. A system memory is coupled to the programmable controller via a system bus, and a hardware processor is coupled to the system bus and the tightly coupled memory. The hardware processor is configured to implement MAC functions on data received in a communication frame, store, in the tightly coupled memory, processed data corresponding to data in the communication frame that indicates a structure of downlink data in the communication frame, and store, in the system memory, processed data corresponding to other data in the communication frame.
    Type: Grant
    Filed: May 7, 2012
    Date of Patent: November 25, 2014
    Assignee: Marvell International Ltd.
    Inventors: Bhaskar Chowdhuri, Srikanth Shubhakoti, Vinod Ananth, Hongyu Xie, Shui Cheong Lee
  • Patent number: 8891516
    Abstract: In one embodiment, a method for providing link aggregation (LAG) to heterogeneous switches includes receiving, at a switch controller, LAG requests forwarded by switches and determining that multiple LAG requests corresponding to a server have been received, grouping the multiple LAG requests into LAG groups according to a switch from which they were received and correlating all the LAG groups with the server, instructing each of the switches to setup a LAG group with the server according to the LAG groups determined by the switch controller, and creating alternate flows that correspond to flows through each of the switches to the server through direction from the switch controller. The switches may rely upon OpenFlow to communicate with the switch controller, in some approaches. In addition, other methods for providing LAG to heterogeneous switches are also described, along with systems and computer program products which provide LAG to heterogeneous switches.
    Type: Grant
    Filed: January 15, 2013
    Date of Patent: November 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Vinit Jain, Dayavanti G. Kamath, Abhijit P. Kumbhare, Renato J. Recio
  • Patent number: 8885673
    Abstract: In one embodiment, the present invention includes a method for receiving a first portion of a first packet at a first agent and determining whether the first portion is an interleaved portion based on a value of an interleave indicator. The interleave indicator may be sent as part of the first portion. In such manner, interleaved packets may be sent within transmission of another packet, such as a lengthy data packet, providing improved processing capabilities. Other embodiments are described and claimed.
    Type: Grant
    Filed: November 14, 2012
    Date of Patent: November 11, 2014
    Assignee: Intel Corporation
    Inventors: Aaron T. Spink, Herbert H. J. Hum
  • Patent number: 8879548
    Abstract: A control circuit generates a selection signal indicating a head area of an alignment buffer when the area is an unwritten area, and when the head area is a written area, successively performs comparison between a sequence number stored in the area and a sequence number of a target packet from a head to a tail to search a boundary area and generates a selection signal indicating the detected boundary area. When the boundary area could not be detected even when the search reaches the last written area, the control circuit generates a selection signal indicating the next area of the last written area. The writing circuit shifts data stored in each area by one area from the area indicated by the selection signal in a direction of the tail of the alignment buffer, and writes packet information of the target packet into the area indicated by the selection signal.
    Type: Grant
    Filed: December 22, 2012
    Date of Patent: November 4, 2014
    Assignee: Renesas Electronics Corporation
    Inventor: Akihiro Nozaki
  • Patent number: 8879435
    Abstract: Various embodiments of systems and methods for memory access are provided. In one embodiment, a data segment is stored in a plurality of memory segments of at least one memory bank. The data segment stored in the memory segments is selected, where the data segment has a bit boundary that is arbitrarily misaligned with at least one memory segment boundary of the memory segments.
    Type: Grant
    Filed: December 21, 2004
    Date of Patent: November 4, 2014
    Assignee: Mindspeed Technologies, Inc.
    Inventor: Karl G. Andersson
  • Patent number: 8861515
    Abstract: Generally, a method and apparatus are disclosed that store sequential data units of a data packet received at an input port in contiguous banks of a buffer in a shared memory, thereby obviating any need for storing linkage information between data units. Data packets can extend through multiple buffers (next-buffer linkage information is much more efficient than next-data-unit linkage information). According to another aspect of the invention, buffer memory utilization can be further enhanced by storing multiple packets in a single buffer. For each buffer, a buffer usage count is stored that indicates the sum (over all packets represented in the buffer) of the number of output ports toward which each of the packets is destined.
    Type: Grant
    Filed: April 21, 2004
    Date of Patent: October 14, 2014
    Assignee: Agere Systems LLC
    Inventors: Chung Kuang Chin, Yaw Fann, Roy T. Myers, Jr.
  • Patent number: 8819305
    Abstract: In one embodiment, the present invention provides for a layered communication protocol for a serial link, in which a link layer is to receive and forward a message to a protocol layer coupled to the link layer with a minimal amount of buffering and without maintenance of a single resource buffer for adaptive credit pools where all message classes are able to consume credits. By performing a message decode, the link layer is able to steer non-data messages and data messages to separate structures within the protocol layer. Credit accounting for each message type can be handled independently where the link layer is able to return credits immediately for non-data messages. In turn, the protocol layer includes a shared buffer to store all data messages received from the link layer and return credits to the link layer for these messages when the data is removed from the shared buffer. Other embodiments are described and claimed.
    Type: Grant
    Filed: November 16, 2009
    Date of Patent: August 26, 2014
    Assignee: Intel Corporation
    Inventors: Daren J. Schmidt, Bryan R. White
  • Patent number: 8767724
    Abstract: Non-destructive data storage is disclosed. An information change is stored that is associated with a business object such that tracking of the information change is enabled with respect to one a transaction time and/or an effective time. The stored information change is accessed with respect to a time.
    Type: Grant
    Filed: October 4, 2011
    Date of Patent: July 1, 2014
    Assignee: Workday, Inc.
    Inventor: John Malatesta
  • Patent number: 8737922
    Abstract: The disclosure relates to a network node of a wireless network, and to a related method of controlling interference generated by at least one white space device controlled by the network node. The method comprises transmitting a request for information regarding channels available for secondary usage to the remote entity, and receiving information from the remote entity, the information indicating a channel available for secondary usage, a critical position associated with said channel, and an interference threshold for the critical position.
    Type: Grant
    Filed: December 20, 2010
    Date of Patent: May 27, 2014
    Assignee: Telefonaktiebolaget L M Ericsson (Publ)
    Inventors: Tim Irnich, Jonas Kronander, Joachim Sachs
  • Patent number: 8731005
    Abstract: A radio system and a method for relaying packetized radio signals is disclosed. The radio system and the method provide a calibration of transmit signals. Furthermore the radio system and the method provide a measurement of a transmit power level. The radio system comprises at least one transmit path, a calibration unit, a base band calibration signal generator synchronized to a synchronization unit, at the least one link and a power sensor. A portion of a selected one of coupled transmit signals is forwarded to a power sensor for measuring a power level, wherein the calibration unit is adapted to update a transmit power level of the at least one transmit path in response to the transmit power level of the selected one of the coupled transmit signals.
    Type: Grant
    Filed: October 12, 2009
    Date of Patent: May 20, 2014
    Assignee: Kathrein-Werke KG
    Inventor: Johannes Schlee
  • Patent number: 8711864
    Abstract: A system and method for transmitting packets over two different network protocols without protocol conversion in any switches. A computer system comprises host computers and target storage arrays, or targets, coupled to one another through a Enhanced Ethernet network. Each of the host computers and the targets is configured to transmit encapsulated packets, such as a Fiber Channel over Ethernet (FCoE) packet. During system configuration, each of the targets is set to be the only target included in a virtual local area network (VLAN) with a corresponding unique VLAN identifier (ID). A given host computer logins to multiple assigned targets using a predefined Fiber Channel protocol. In response to a login request, a corresponding target assigns and conveys a N_Port ID that comprises a VLAN ID and a unique Host ID to the host computer in a reply message. A virtual link is established between the host computer and the target storage array.
    Type: Grant
    Filed: March 30, 2010
    Date of Patent: April 29, 2014
    Assignee: Chengdu Huawei Symantec Technologies Co., Ltd.
    Inventor: Michael Ko
  • Patent number: 8619763
    Abstract: A method, an apparatus, and an information recording medium for storing and reproducing an interactive service capable of efficiently storing and processing interactive signaling information are provided. The information recording medium has recorded thereon interactive signaling information of a digital broadcast and includes a first region storing information on a time when the interactive signaling information occurs, a second region storing a type of the interactive signaling information and identification information; and a third region storing signaling items of the interactive signaling information. In the method and apparatus, filtering and monitoring using hardware or software to acquire interactive signaling information on a service stream for reproducing an interactive service is unnecessary because the signaling information is separately stored.
    Type: Grant
    Filed: March 1, 2007
    Date of Patent: December 31, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Jin-yong Ahn
  • Patent number: 8553601
    Abstract: A communications system may include at least one data storage device for storing messages for respective users, and a plurality of mobile wireless communications devices each associated with a respective user for accessing the messages stored on the at least one data storage device. Moreover, the communications system may further include an adaptive polling engine for polling the at least one data storage device for stored messages and providing the polled messages to mobile wireless communications devices of respective users. The adaptive polling engine may advantageously learn respective user usage patterns for each mobile wireless communications device, and change a respective rate of polling for each mobile wireless communications device based thereon.
    Type: Grant
    Filed: January 4, 2012
    Date of Patent: October 8, 2013
    Assignee: TeamOn Systems, Inc.
    Inventor: Shaibal Roy
  • Patent number: 8542582
    Abstract: A method to confirm delivery of data to a receiving device via a sending socket is disclosed. One embodiment of the method comprises determining when a predetermined amount of data has been removed from a send buffer of the sending socket and sending a confirmation when the predetermined amount of data has been removed from the send buffer. Other embodiments are described and claimed.
    Type: Grant
    Filed: October 23, 2009
    Date of Patent: September 24, 2013
    Assignee: Unwired Planet, LLC
    Inventors: James Clarke, John M. Coughlan
  • Patent number: 8451849
    Abstract: A solution for establishing a session of a real-time media communication service in a communication system comprising at least two separately administered subsystems. The session establishment comprises receiving a request for session initiation, querying subscriber information related to the requested session, and initiating the session according to the queried subscriber information. The invented method comprises detecting that the terminating subscriber does not belong to the same subsystem as the originating subscriber, determining a defined transit server associated with the terminating subscriber, said transit server having access to a subscriber database of the subsystem of the terminating subscriber, and querying subscriber information related to the requested session with a first control message comprising parameters of the requested session to the transit server.
    Type: Grant
    Filed: July 2, 2004
    Date of Patent: May 28, 2013
    Assignee: Nokia Corporation
    Inventors: Saku Oja, Simo Hyytiä, Paavo Helenius, Bert Holtappels, Andrew Rebeiro-Hargrave, Ilkka Westman