Abstract: A communication system comprising a master apparatus and a slave apparatus, wherein: the slave apparatus is configured, in an upstream period, to transmit a slave data signal to the master apparatus based on a slave clock signal; and the master apparatus is configured to: during reception of the slave data signal from the slave apparatus in the upstream period, extract timing information from the slave data signal and adjust a phase and/or frequency of a master clock signal or a definition thereof relative to a reference phase and/or frequency based on the extracted timing information to enable decoding of the received slave data signal based on the master clock signal or that definition; in a downstream period, transmit a master data signal to the slave apparatus based on the master clock signal according to the adjustment carried out during reception of the slave data signal in the upstream period; and adjust the phase and/or frequency of the master clock signal during transmission of the master data signal

Abstract: An external function system can be implemented on a database to perform processing on one or more external network services. The external function system can comprise a particular external function for a particular external service, an outbound serializer function, and an inbound serializer function that are linked with the particular external function. The outbound serializer function can be configured to transform the data of a query from a database format to a different format of the particular external network service. The inbound deserializer function can be configured to receive data returned from the external service and transform the data to the format of the database.

Abstract: A method is described for providing a universal time in a control unit. The universal time is generated by a timer of the control unit or is received via a communication link from at least one external unit, the universal time being transmitted directly or as at least two time stamps to at least one component for ascertaining time deviations. Furthermore, a control unit, a computer program and a machine-readable storage medium are also described.

Abstract: The disclosure relates to a data transmission interface for use in a first integrated circuit (IC) for encoding and sending a data packet from the first IC to a second IC via a data bus having four data wires, the data transmission interface arranged to generate four time-dependent binary signals which jointly encode the data packet in signal edges thereof, each of the signals being associated with a unique wire of the data bus and spanning a temporal cycle T within which are defined four consecutive time stamps T1 . . . T4 at which edges can occur in the signals, the data transmission interface further arranged to transmit the signals to the second IC substantially in parallel on their respective data wires, wherein: irrespective of the data packet content, at each time stamp T1 . . . T4 at least one of the four signals has an edge to enable clock recovery at the second IC.

Abstract: An encoding system that distributes a live stream to end user devices is provided herein. The encoding system automatically detects failed components and implements a failover action to replace the failed component with a backup component in a manner that reduces live stream interruptions. For example, the encoding system can include a network interface that is coupled to an encoder allocated to a live stream. Instead of providing a contribution encoder that transmits the live stream with a location of the allocated encoder, the encoding system can provide the contribution encoder with a location of the network interface. Thus, the contribution encoder can transmit the live stream to the network interface. The network interface can then forward the live stream to the allocated encoder. If the allocated encoder fails, then the network interface can forward the live stream to a backup encoder.

Abstract: An information processing apparatus includes: a memory configured to store first system time; and a processor configured to: receive, from an information acquisition apparatus after the first system time is written in the memory, first information acquired by the information acquisition apparatus and first time information indicating acquisition time of the first information; receive, from the information acquisition apparatus after receiving the first information and the first time information, second information and second time information indicating acquisition time of the second information; converting, based on the first system time, reception time at which the first information and the first time information are received into second system time; convert, based on the second system time and the first time information, the second time information into third system time; attach the second system time to the first information; and attach the third system time to the second information.

Abstract: Embodiments of the present invention provide a method, system and computer program product for configurable pacing in messaging systems. In an embodiment of the invention, a configurable message pacing method has been provided. The method includes receiving a message directed for placement in a repository of an intermediate messaging system into which messages are placed by message producing applications and from which messages are retrieved by message consuming applications. Thereafter, it can be determined if the placement of the received message into the repository will result in a breach of an associated threshold value for the repository. Consequently, a message pacing action can be triggered responsive to the determination that the placement of the received message into the repository will result in a breach of the associated threshold value for the repository.

Abstract: An optical modem includes client interface circuitry; line interface circuitry configured to interface a client signal with the client interface circuitry and interface a line signal in a transmit direction and a receive direction, wherein the line signal terminates at a second optical modem; and a clock connected to the line interface circuitry, wherein the clock includes a selector configured to select one of a local reference clock and a recovered clock from the receive direction based on whether the optical modem is a master or slave and based on whether there is a fault in the receive direction, wherein the optical modem and the second optical modem form a timing island separate from a timing domain associated with the client signal and a second client signal associated with the second optical modem.

Abstract: A system and computer program product are provided for optimized timer placement. A request to apply a new timer in a computer system is received and an interrupt time for the new timer is extracted from the new timer. A timer list is accessed for each processor in the system responsive to the received request. A range for placement of the new timer is established with respect to each of the accessed timer lists. A timer expiry delay is calculated between proximal processor interrupts and the extracted interrupt time based on the established range placement. Proximity of the extracted interrupt time within the existing processor interrupts is determined and one of the processors is selected based on the calculation and the determined proximity. The new timer is placed on the selected processor.

Abstract: A method is provided for optimized timer placement. A request to apply a new timer in a computer system is received and an interrupt time for the new timer is extracted from the new timer. A timer list is accessed for each processor in the system responsive to the received request. A range for placement of the new timer is established with respect to each of the accessed timer lists. A timer expiry delay is calculated between proximal processor interrupts and the extracted interrupt time based on the established range placement. Proximity of the extracted interrupt time within the existing processor interrupts is determined and one of the processors is selected based on the calculation and the determined proximity. The new timer is placed on the selected processor.

Abstract: Systems, methods, and computer-readable media are provided for facilitating the implementation of an operations, administration, and management (OAM) protocol in a network overlay environment. In particular, aspects of the technology facilitating the transport of OAM communications across overlay environments of different types. Aspects of the technology can include steps for receiving a packet comprising an OAM payload, and encapsulating the packet with an OAM transport header, wherein the transport header is configured to be read by transit nodes of different overlay types.

Abstract: In one embodiment, a copy of an original packet of a traffic flow is created at an ingress leaf node of a cloud switch. The ingress leaf node forwards the original packet along a less-specific path through the cloud switch, the less-specific path based on a domain index of an egress domain for the original packet. The copy of the original packet is modified to create a more specific path learn request packet. The ingress leaf node forwards the more specific path learn request packet along the less-specific path through the cloud switch. The ingress leaf node received back a more specific path learn request reply packet that includes an indication of a fabric system port. The ingress leaf node then programs a forwarding table based on the indication of the fabric system port, to have subsequent packets of the traffic flow forwarded along a more-specific path.

Abstract: A clock synchronization method, a receiver, a transmitter, and a clock synchronization system, where the method includes obtaining a common reference clock signal, determining Bt according to the common reference clock signal and Mrd(t?1), where B t = mod ? [ ? n = 0 t - 1 ? ? Mr d ? ( n ) , 2 p ] , determining that Mrd(t?1) is a target Mrd when Ct obtained by means of calculation according to Mrd(t?1) is less than or equal to a threshold, where Ct=Bt?At, At is included in a residual time stamp (RTS) packet received by a receiver last time from the transmitter, and A t = mod ? [ ? n = 0 t ? ? M d ? ( n ) , 2 p ] , performing frequency division on the common reference clock signal using the target Mrd as a frequency dividing coefficient to obtain a first clock signal, and performing frequency multiplication processing on the first clock signal to obtain a service clock signal. Hence, random phase offset may be avoided.

Abstract: Systems and methods for downloading data by conditionally using idle network capacity are described. In some embodiments, the systems and methods downloads into a buffer a first portion of media content in accordance with a first content streaming mode that permits downloading of media content data even when there is no idle network capacity, and upon determining that the buffer has been filled to a threshold level, downloads into the buffer a second portion of the media content in accordance with a second content streaming mode that permits downloading of media content data, e.g., only when there is idle network capacity.

Abstract: A method and a device for forming a common transport datastream from several mobile-digital television signal datastreams and a common stationary-digital television signal datastream. A constant number of data units of respectively-constant size in every successive time interval with constant cycle duration for the transmission of every individual datastream is determined. A data structure is specified for the common datastream with successive sequences in each case of a constant number of data units with respectively-identical positions for data units of the stationary-digital television signal and respectively-identical positions for data units of the mobile-digital television signal. Data units of each of the datastreams of the mobile-digital television signal are transmitted in each case in associated, identical positions of at least one successive sequence, and define the individual positions of the data structure of the common datastream with data units of the respectively associated datastreams.

Abstract: In conventional packet communications systems, such as MPEG-2, the data stream includes a program clock reference (PCR) so that the receiver decoder can lock on to the data stream. The invention eliminates the need to send the PCR by transferring a data transport rate explicitly in the header of the data packets so that the decoder can use the transport rate as a locking reference and adjust its phase lock loop. The transport rate is carried in the adaptation field as user private data.

Abstract: A data processing apparatus and method provide communication between a master device operating from a master clock signal and a slave device operating from a slave clock signal asynchronous to the master clock signal. An interface transfers packets between the master device and the slave device. A slave clock replica generator associated with the master device generates a slave clock replica that controls timing of transmission of packets by the master device over the interface. A sync request transfer is issued over the interface and has a property identifiable by the slave device irrespective of whether the sync request transfer is synchronized with the slave clock signal. In response, the slave device issues a sync response transfer indicative of at least a frequency of the slave clock signal, and the slave clock replica generator determines at least the frequency of the slave clock replica from that sync transfer.

Abstract: A reset of a synchronization counter is synchronized to an external deterministic signal. Entry into the link transmitting state is further synchronized with the deterministic signal. A target latency is identified for a serial data link. A data sequence is received synchronized with a synchronization counter associated with the data link. Target latency can be maintained using the data sequence.

Abstract: This invention relates to packet selection techniques that can be used in conjunction with a clock recovery mechanism to mitigate the effects of packet delay variation on timing messages exchanged over a packet network, particularly when seeking to synchronize the time of a clock in a slave device to that of a master clock. The packet selection techniques can assist in reducing the noise in the recovered clock signal at the slave device, allowing recovery to a higher quality. Embodiments of the invention provide techniques based on extracting timing packets that create a constant interval between the arrival of selected packets at the slave device and on extracting timing packets which are closest to making the interval between arrival of the selected packets equal to the interval between the departure of the packets.

Abstract: An electronic communication system including at least one first communication unit and one second communication unit which are connected to one another by means of at least one first data line. The communication system has a data transmission protocol according to which, in at least one first data transmission mode for synchronized data transmission, the first communication unit transmits a data request signal or a clock signal to the second communication unit via the first data line at least once and the second communication unit transmits a data signal to the first communication unit via the first data line in response to the data request signal or the clock signal.

Abstract: A circuit and method of operation for a circuit of a radio system in which a system time is divided into symbols, in which a system clock generator is activated in an operating mode, so that the system time is determined from an output clock signal of the system clock generator by counting, in which the system clock generator is deactivated in a sleep mode, in which an output clock signal of a sleep clock generator is blanked as a function of an output signal of a modulo divider in the sleep mode, and the system time is determined by counting, wherein an output frequency of the output clock signal of the sleep clock generator is a non-integer multiple of a symbol frequency, in which the modulo divider divides the output clock signal of the sleep clock generator by a division factor, and in which the division factor of the modulo divider is produced by changing between at least two integer divisor values.

Abstract: A clock data recovery circuit module including a clock recovery circuit, a frequency comparison circuit and a signal detecting circuit is provided. The clock recovery circuit is configured to output a data recovery stream and a data recovery clock based on an input signal and a clock signal. The frequency comparison circuit is coupled to the clock recovery circuit. The frequency comparison circuit is configured to compare a frequency difference between the data recovery clock and the clock signal to adjust the frequency of the clock signal based on a comparison result. The signal detecting circuit is coupled to the frequency comparison circuit. The signal detecting circuit is configured to receive and detect the input signal, and the signal detecting circuit determines whether to enable the frequency comparison circuit according to the detection result. Furthermore, a method for generating a data recovery clock is also provided.

Abstract: A network node of a synchronous network, wherein said network node comprises a timing circuit which recovers a reference clock from a reception signal received by said network node from an upstream network node of said synchronous network and uses the recovered reference clock for a transmission signal transmitted by said network node to a downstream network node of said synchronous network; and a clock stability monitoring circuit which monitors internal control parameters (CP) of said timing circuit to detect an instability of the reference clock distributed within said synchronous network.

Abstract: A method, apparatus, and system for time synchronization are disclosed. The method comprising: obtaining a master sending time stamp, a slave receiving time stamp, a slave sending time stamp, and a master receiving time stamp; and adjusting the time of the slave clock according to the offset calculated from the time stamps to synchronize with the clock time of the master clock. With the present invention, in passband transmission systems that transmit signals continuously in units of symbols, the time synchronization is implemented between the master clock and the slave clock.

Abstract: In one embodiment, a battery-operated communication device “quick-samples” a frequency hopping sequence at a periodic rate corresponding to a substantially low duty cycle, and is discovered by (e.g., attached to) a main-powered communication device. During a scheduled sample, the main-powered communication device transmits a control packet to be received by the battery-operated communication device, the control packet containing timing information and transmitted to account for worst-case clock drift error between the two devices. The battery-operated communication device responds to the control packet with a link-layer acknowledgment containing timing information from the battery-operated communication device. Accordingly, the two devices may re-synchronize their timing based on the timing information in the control packet and acknowledgment, respectively.

Abstract: A circuit including delay stages, gain stages, and a summer. The delay stages are configured to provide delayed versions of a first signal. The gain stages are configured to receive the delayed versions of the first signal. Each of the gain stages provides an amount of gain for a corresponding one of the delayed versions of the first signal. The delay stages and the gain stages are configured to provide pre-emphasis to the first signal. The summer is configured to output a second signal based on the delayed versions of the first signal. The second signal includes the pre-emphasis.

Abstract: A digital broadcasting system and a method of processing data are disclosed. Herein, additional encoding is performed on mobile service data, which are then transmitted, thereby providing robustness in the processed mobile service data, so that the mobile service data can respond more strongly against fast and frequent channel changes. In a transmitting system including a service multiplexer and a transmitter located in a remote site, a method of processing data of the transmitting system includes comparing an output data rate of the service multiplexer and a transmission data rate of the transmitter, when a difference occurs between the two data rates, adjusting a burst size, wherein the burst transmits mobile service data, and encoding the mobile service data, and referring to the burst size so as to multiplex main service data and the encoded mobile service data in a burst structure.

Abstract: There is provided a method of optimizing timing packet transport in a network node, the method comprising using a locally available stable frequency reference at the network node to provide a pre-determined network node transit time for timing packets in at least one direction into or out of the network node. There is also provided a network node comprising a locally available stable frequency reference and circuitry adapted to apply a pre-determined network node transit time, L, to all timing packets transiting the network node in at least one direction into or out of a network node dependent on the locally available stable frequency reference.

Abstract: A method switches master/slave timing in a communication network without traffic disruption. The method includes a master device informing a slave of timing loss. The master device additionally begins transmitting with timing from a local reference clock and begins receive timing recovery. The slave freezes its receive timing recovery and locks its transmit clock. The master device transitions its transmit timing to use the recovered receive clock. The slave gradually switches to transmitting using its local clock signal. The method may be used in synchronous Ethernet networks.

Abstract: A method for operating an automation system with a plurality of communication users linked for communication purposes via a serial connection, of which at least one functions as sender and at least one as a receiver, includes determining at a sender an offset value between an occurrence of a synchronous signal and a communication clock cycle, transmitting the determined offset value in a data transmission to the at least one receiver, waiting at the at least one receiver until a time period commensurate with the offset value has elapsed, and generating at the at least one receiver an output signal after the time period has elapsed.

Abstract: An apparatus and method of controlling power of a wireless multimedia media access control (WiMedia MAC) device are provided. The method includes: determining whether a fragment of an MAC service data unit (MSDU) is lost when a fragment is received; extracting a duration field from the received fragment if it is determined that the fragment of the MSDU is lost; and converting a power mode into a low power mode during a period of time established in the duration field.

Abstract: A phase interpolator for a CDR circuit produces an output clock having level transitions between the level transitions on two input clocks. The input clocks drive cross-coupled differential amplifiers with an output that can be varied in phase by variable current throttling or steering, according to an input control value. The differential amplifiers produce an output signal with a transition spanning a time between the start of a transition on the leading input clock up to the end of the transition on the lagging input clock. The output clock is linear so long as the transitions on the two input clocks overlap. Active integrators each having an amplifier with a series resistance and capacitive feedback path are coupled to each input to the cross-coupled differential amplifiers, which enhances overlap of the input clock rise times and improves the linearity of the interpolated output signal.

Abstract: A method and system of distributing clock synchronization information within an optical communications network including a plurality of network elements, in which a first network element receives an ingress clock synchronization message, the ingress clock synchronization message including a clock synchronization message identifier and a correction field. The first network element inserts the clock synchronization message identifier into an optical channel frame overhead and inserts the ingress clock synchronization message into an optical channel frame payload. The first network element transmits the optical channel frame overhead and the optical channel frame payload to a second network element, and determines a transit time of the clock synchronization message identifier across each of the network elements. The second network element updates the correction field of the ingress clock synchronization message with said transit times to form an egress clock synchronization message.

Abstract: A clock/data recovery circuit includes an edge detector circuit operable to receive a serial data burst and to generate a reset signal in response to a first edge of the serial data burst. The clock/data recovery circuit may also include an oscillator coupled to the edge detector circuit. The oscillator locks onto a target data rate prior to receipt of the serial data burst and locks onto a phase of the serial data burst in response to the reset signal. The clock/data recovery circuit may also include a phase detector circuit that receives the serial data burst. The phase detector circuit is coupled to the oscillator. The phase detector circuit adjusts the oscillator to maintain the lock onto the phase of the serial data burst during the serial data burst.

Abstract: A communication system including a parent station and a plurality of child stations, the parent station and the plurality of child stations being line-connected or loop-connected in a plurality of stages, and the parent station comprises a decision unit configured to decide, based on information representing states of the plurality of child stations, which one a first data relay method of transmitting data to a subsequent station in accordance with a clock reproduced from data received from a preceding station and a second data relay method of transmitting data to the subsequent station in accordance with a local clock generated in a local station should be employed by each of the plurality of child stations.

Abstract: A network device having a system performance measurement unit employing one or more global time stamps for measuring the device performance is disclosed. The device includes an ingress circuit, a global time counter, an egress circuit, and a processor. The ingress circuit is configured to receive a packet from an input port while the global time counter generates an arrival time stamp in accordance with the arrival time of the packet. The egress circuit is capable of forwarding the packet to other network devices via an output port. The processor, in one embodiment, is configured to calculate packet latency in response to the arrival time stamp.

Abstract: An integrated circuit (“IC”) may include clock and data recovery (“CDR”) circuitry for recovering data information from an input serial data signal. The CDR circuitry may include a reference clock loop and a data loop. A retimed (recovered) data signal output by the CDR circuitry is monitored by other control circuitry on the IC for a communication change request contained in that signal. Responsive to such a request, the control circuitry can change an operating parameter of the CDR circuitry (e.g., a frequency division factor used in either of the above-mentioned loops).

Abstract: A method of transporting data with embedded clock including following steps is provided. In an initial stage, a first bit length and a second bit length are determined. Original data is received. The original data is packed with every N bits as a packet, where N is at least 4. It is analyzed whether a long-run length of long-run data with consecutive same bit data in the packet is greater than N/2. The packet is coded to embed clock/toggle information with the first bit length into the packet. The clock/toggle information determines whether the long-run data is toggled. An appearance frequency of the clock/toggle information is clock information. If the long-run length is not greater than N/2, the long-run data is not toggled. If the long-run length is greater than N/2, bit with the second bit length after an Lth bit of the long-run data is toggled.

Abstract: The present disclosure relates to an active antenna array for a mobile communications network. The active antenna comprises a base band unit coupled to a base station, a plurality of transceiver units and at least one link. The plurality of transceiver units is terminated by at least one antenna element. The at least one link couples individual ones of the plurality of transceiver units to the base band unit 10. The at least one link is a digital link and is adapted to relay an individual transmit signal concurrently and in synchronisation with a transmit clock signal. The present disclosure further teaches a method for relaying radio signals in a mobile communications network. The present disclosure further relates to a computer program enabling a computer to manufacture the active antenna array of the present disclosure and to execute the method of relaying radio signal in a mobile communications system.

Abstract: In a packet-based (e.g., Ethernet) network, such as the network of central offices and base stations of a wireless telephone system, a node receives one or more incoming packet-based signals from one or more other nodes of the network and recovers a clock signal from each incoming packet-based signal. The node selects one of the recovered clock signals as the node's reference clock signal. When the node is part of a base station, the node uses the selected clock to generate and transmit one or more outgoing packet-based signals to one or more central offices. The node also uses the selected clock to generate the base station's wireless transmissions. In one implementation, the base stations and central offices are connected by Ethernet facilities.

Abstract: In a method of recovering timing information over packet networks, a receiver receives a plurality of packet streams over different paths from the same source. The raw delays experienced by the timing packets for each stream are filtered to provide a filtered delay for each stream. The filtered delays are weighted based on the quality of each stream, and the weighted filtered delays are then combined to form an aggregate delay estimate. Frequency adjustments for a local clock at the receiver are derived from the aggregate delay estimate.

Abstract: In an embodiment, provided is a communication device connected to time servers via a network with transfer devices. In the communication device: a network controller receives a message containing time information counted by the time server and containing a network identifier, and obtains a receiving timing of the message; a network processing unit, when the network identifier in the message does not match with any network identifier, destroys the message; a protocol processing unit, when the network identifier has a match, calculates a time error by the time information in the message and the receiving timing, detects whether a first time server is malfunctioning, and when detected the first time server malfunctioning, outputs the time error calculated by a network identifier assigned to a second time server; a servo calculates an operation amount by the time error; and a clock varies a clock rate according to the operation amount.

Abstract: The present invention provides a method of estimating a frequency offset. The method comprises receiving a wireless signal timed according to a first frequency; generating a local signal timed according to a second frequency; and performing a plurality of synchronization searches, each search comprising obtaining a set of correlation results indicative of a correlation between the wireless signal and the local signal at different timing offsets of the wireless signal relative to the local signal. The method the no comprises finding a series of results, with a result from each of a plurality of the synchronization searches, for which the difference in; timing offset between results from adjacent searches in the series is within a maximum specified value. A frequency off set between the first and second frequencies can be determined from the series.

Abstract: In order to select a synchronization signal higher in accuracy, thereby increasing the accuracy of the time synchronization, it is provided a network node for transferring data in a network, comprising: a network interface having a plurality of ports; a transfer control module; a time synchronizing module; a fluctuation measurement module; and a clock. The time synchronization module uses a received time synchronization packet to synchronize the clock. The fluctuation measurement module determines an accuracy of a time contained in the received time synchronization packet based on a result of comparison between the time contained in the received time synchronization packet and a time of the clock.

Abstract: Apparatus and methods calibrate and control detector gain in a Mueller-Muller timing detector. A main signal path includes a Mueller-Muller based timing error detector (MM TED). The main signal path generates a main error signal for clock recovery. A secondary signal path that includes a secondary MM TED. Each signal path samples soft symbols from a received signal. The sampling of the secondary MM TED is deliberately offset in time. A scale factor applied to the main error signal and to a secondary error signal is adaptively adjusted based on a comparison between the main error signal and the secondary error signal.

Abstract: The invention relates to a time triggered network used in particular in an automotive network having a plurality of clusters. Each cluster (A-X) includes a plurality of nodes (11).

Abstract: The clock synchronization accuracy between a master node and a slave node is stably measured. The slave node synchronizes its own clock with the clock of the master node by means of the packets transmitted from the master node. It reproduces the clock of the slave node by means of the transmitted packets, accumulates information on the transmitted packets and the clock of the slave node and performs clock synchronization on the basis of the accumulated information.

Abstract: A method for synchronizing network elements to a global clock derived from the GPS clock acquired by a plurality of base stations. The global clock is distributed to controllers of various networks, and from there to network access devices. The network access devices further distribute the global clock to various wire-line and local wireless networks and from there, to the users served by these networks. The user equipment is enabled with a simple clock discipliner that adjusts the local clock to the global clock, resulting in a reliable synchronization across the converged communication networks.

Abstract: An electronic apparatus includes a processing unit. The processing unit, when detecting a frequency offset between an radio frequency (RF) module and a corresponding base station (BS), controls an oscillator to change a frequency of a first reference clock signal outputted therefrom by a first frequency variation, and controls a compensation unit to change a frequency of a second reference clock signal outputted therefrom by a second frequency variation. Wherein the compensation unit receives and adjusts the first reference clock signal from the oscillator to output the second reference clock signal, and the frequency offset substantially equals the first frequency variation plus the second frequency variation.

Abstract: Systems and methods for implementing bi-directional synchronization propagation between first and second communication devices are provided. The devices are arranged in a loop-timing configuration. A method includes detecting, by the second communication device, a switching signal comprising an indication to switch a timing role of the second communication device and engaging, by the second communication device, in a synchronization handshake with the first communication device over a communication link based on the detection of the switching signal. Engaging in the synchronization handshake includes determining whether the first communication device is configured to support bi-directional synchronization propagation. The method includes switching the timing role of the second communication device based on the synchronization handshake.