Abstract: Recovering a hardware component, such as a Remote MACPHY node (RMN), a wireless base station, a CATV amplifier, a Wi-Fi hotspot, a microcell, or a PON switch, after a power interruption. A hardware component, upon detecting that input power to the R-PHY device will be imminently interrupted, provides an alarm signal to a central processing unit (CPU) in the R-PHY device. The CPU, in response to receiving the alarm, stores running parameter data for the R-PHY device in a non-volatile memory. The running parameter data is normally obtained through network communications during a boot operation of the R-PHY device. If certain conditions are satisfied, then the R-PHY device recovers from the interruption in input power using the stored running parameter data without obtaining the running parameter data through a normal boot operation, thus shortening the boot time.
Abstract: The disclosed method may include (1) receiving a precision level of each weight associated with each input of a node of a computational model, (2) identifying, for each weight, one of a plurality of multiplier groups, where each multiplier group may include a plurality of hardware multipliers of a corresponding bit width, and where the corresponding bit width of the plurality of hardware multipliers of the one of the plurality of multiplier groups may be sufficient to multiply the weight by the associated input, and (3) multiplying each weight by its associated input using an available hardware multiplier of the one of the plurality of multiplier groups identified for the weight. Various other processing elements, methods, and systems are also disclosed.
Type:
Grant
Filed:
December 29, 2017
Date of Patent:
November 12, 2019
Assignee:
Facebook, Inc.
Inventors:
Abdulkadir Utku Diril, Mikhail Smelyanskiy, Nadav Rotem, Jong Soo Park
Abstract: Software Digital Front End (SoftDFE) signal processing techniques are provided. One or more digital front end (DFE) functions are performed on a signal in software by executing one or more specialized instructions on a processor to perform the one or more digital front end (DFE) functions on the signal, wherein the processor has an instruction set comprised of one or more of linear and non-linear instructions. A block of samples comprised of a plurality of data samples is optionally formed and the digital front end (DFE) functions are performed on the block of samples. The specialized instructions can include a vector convolution function, a complex exponential function, an xk function, a vector compare instruction, a vector max( ) instruction, a vector multiplication instruction, a vector addition instruction, a vector sqrt( ) instruction, a vector 1/x instruction, and a user-defined non-linear instruction.
Type:
Grant
Filed:
October 26, 2012
Date of Patent:
October 3, 2017
Assignee:
Intel Corporation
Inventors:
Kameran Azadet, Chengzhou Li, Albert Molina, Joseph H. Othmer, Steven C. Pinault, Meng-Lin Yu, Joseph Williams, Ramon Sanchez Perez, Jian-Guo Chen
Abstract: A method of encoding a local time base embedded in the compressed data is disclosed. The local time base is encoded in two parts. The first part has a modulo time base that indicates the specific interval in the reference time base and the second part has a time base increment relative to the reference time. Two forms of time base increment is used to allow for the possibility of different encoding order and displaying order. A mechanism for the synchronization of multiple compressed streams with local time base is also described. A time base offset mechanism is also used to allow finer granularity synchronization of the multiple compressed streams.
Type:
Grant
Filed:
July 3, 1997
Date of Patent:
March 17, 2009
Assignee:
Panasonic Corporation
Inventors:
Thiow Keng Tan, Sheng Mei Shen, Chak Joo Lee