Abstract: A circuit for controlling the application of a timing pulse to a count down chain where the contents of the count down chain are read-out in stages and asynchronously with respect to the application of the timing pulse. The control circuit ensures that a timing pulse is not applied during the read-out of the contents of the count down chain.

Abstract: A circuit for incrementing or decrementing a binary number is described. An M bit binary number is applied to M dynamic latch circuits. The latch output signals are applied to M logic units each comprising an exclusive OR, an exclusive NOR and one transistor. The transistors of the respective logic units are connected serially, with the transistor of the logic unit operating on the LSB of the binary number being further connected to a carry in or count signal. The exclusive OR is responsive to the carry in signal and the latched signal to increment/decrement or pass through the respective bit of the binary number. The exclusive NOR is responsive to an Up/Down signal and the latched signal for controlling the conduction state of the respective transistor thereby providing a carry in signal to the input of the next adjacent logic unit operating on the next more significant bit of the binary number.

Abstract: A variable resolution counter is provided in which the resolution of the count decreases as the counted value increases. A set of scale control bits from the most significant bits of the counter are used to control selection of one of several prescaled signals from a prescaler. Resetting of the count value may be made conditional on the value of the count, and a flag may be provided to effectively redistribute the capacity of the counter between high and low resolution modes. A gray code of particular interest is also disclosed.

Abstract: An n-position selector switch includes a binary counter which is clocked in response to a user actuated push-button type input. The counter's output is fed into a decoder, the output of which drives a visual display indicating the selected switch position. A detector at the counter output responds to a data pattern indicative of selection of the nth-switch position by initiating a counter load operation which resets the counter on the occurrence of the next pushbutton actuation.

Abstract: A rotary-type switch simulator includes a shift register and a counter, both clocked by a momentary contact switch. The shift register outputs drive visual indicators indicating the selected switch position, while the counter provides a binary output corresponding to the indicated switch position. Logic circuitry, responsive to selected data bits at the outputs of the shift register and counter, reset the shift register and counter respectively to their initial states after the highest switch position has been accessed.

Abstract: A personal identification system comprises a generator which generates an Offset Number which is recorded on the magnetic stripe of a card, together with the account number (PAN) of the person to whom the card is to be issued. The generator stores transformed digits of a sequence of digits (IN) which have been secretly entered by one or more officers of the card-issuing institution. To generate the Offset Number the PAN is entered and transformed before being stored to initialize a first feedback shift register. The person to whom the card is to be issued enters a chosen alphanumeric sequence (PIN) secretly known only to him. The PIN, after undergoing transformation is stored to initialize a second feedback shift register. When both registers have been initialized they are reinitialized by different parts of different digits of the transformed IN.

Abstract: A digital input apparatus is provided which is used as an input apparatus for a digital signal processor and can eliminate noise components resulting from electromagnetic induction and resulting from chattering which is produced by the opening or closing of a contact. One input signal outputted from the multiplexer (105) is applied through a latch flip-flop (108) to a counter (114) used on a time sharing basis so that counting is effected. Individual counts corresponding to a plurality of input signals are stored in a memory (117). When a count becomes all "1's" or "0's", the counter (114) produces a carry signal or a borrow signal supplied to a J-K flip-flop (113). The J-K flip-flop (113) produces an input signal of a predetermined waveform free from noise components.