Abstract: An input circuit for a charge transfer device in which within a region of the input gate of its charge transfer element the potential barrier same as that in the transfer section thereof is provided and the same digital input signal is supplied to a pair of input gates.

Abstract: A programmable charge coupled device transversal filter 5 includes a charge coupled device register 10 for receiving and delaying incoming analog signals, a series of floating gate charge detectors 15, a corresponding number of sets of binary scaled capacitors C.sub.0, . . . 2C.sub.0 . . . 2.sup.n C.sub.0, an output circuit including a positive and negative bus coupled to a differential amplifier, and mask or otherwise definable electrical connections for connecting selected ones of the scaled sets of capacitors between the floating gate 15 corresponding to that set and one of the positive and negative buses 22 and 23.

Abstract: The invention relates to a charged-coupled transversal filter of the parallel-in series-out (PISO) type having a buried channel of one conductivity type and zones diffused into the channel of the other conductivity type, which zones constitute the clock electrodes. The inputs also comprise a zone of the one conductivity type which is provided in the associated zone of the second conductivity type. The weighting factors are formed by selecting the sizes of these zones, which constitute the emitters of bipolar transistors, whose bases are constituted by the clock electrodes and whose collectors are constituted by the channel. The signal to be filtered is introduced by first converting the signal into a current and by then distributing the latter over the various emitters. Stages having positive and negative weighting factors can be readily combined to form a CCD.

Abstract: A charge coupled device gate electrode bus driving arrangement which uses the properties of an electrical transmission line to achieve higher impedance, essentially reactive free, loading of the bus driver circuit is disclosed. The described arrangement includes the addition of inductance elements, resistive terminations, constant gate capacitance compensation, and delay line considered placement of the CCD cells to the usual CCD configuration; the disclosure includes numeric examples of the impedances and delay times achieved.

Abstract: A charge coupled device (CCD) input circuit operates according to the fill and spill principle. An arrangement of a distributor electrode and a barrier electrode, and a drain diode laterally adjacent the electrode row, provide for the separation and removal of an undesirable d.c. component from the a.c. component of the signal. The optimum working point, in contrast with known CCD input circuits, lies at full modulation. The invention provides the system having a high degree of linearity with a high amplification.

Abstract: A cacade connection of a buried channel CCD clocked with clocking signals of a few volts and a floating-diffusion electrometer operated at voltages no larger than those few volts. Undesirable flow back of charge into the CCD from the electrometer is forestalled by applying to the last CCD charge transfer stage a clocking signal voltage developed by doubling the few-volt clocking signals applied to the earlier charge transfer stages of the CCD.

Abstract: An input circuit coupled to receive a signal from a detector and compressing the input current representative of such signal with a fixed compression curve before injection of a charge representative thereof into a charge coupled device shift register, thereby accommodating a large dynamic range of input signal.

Abstract: A charge coupled device incorporates a P+ region which may be forward biased with respect to the channel to provide PNP transistor action with the channel acting as the base region at first times and at other times the P+ region is reverse biased, permitting charge to flow in the channel undisturbed. The invention overcomes the problem of conducting charge underneath or past an electrode or region used at times for emptying charge from the channel. Also an N+ region separated by an electrode may inject or remove carriers at selected times from the channel of a CCD to provide forward scuppering of the carriers to remove KTC noise.

Abstract: A charge transfer readout device and a photovoltaic diode input in which the charges involved in the readout device have the opposite sign to those of the signal from the diode. The invention provides for adding to the diode signal a current of the opposite sign of sufficient quantity that the resultant is of the sign involved in the readout device. This current is supplied by an MOS transistor formed on the substrate of the readout device and includes a P doped zone, which is separated from another P doped zone to which the signal from the diode is applied through an electrode.

Abstract: A three dimensional optical image receiver having sensor stages with a programmable gain capability. Operation of the receiver occurs entirely in the charge domain upon the charge initially generated by the optical signal.

Abstract: Methods and apparatus for high speed signal sampling and recording utilizing mutual repulsion field-induced splitting of charge carriers in a charge transfer channel.

Abstract: In a 4-phase CCD with 90.degree. overlap of the clock voltages, the area below two clock electrodes may be used for the storage of charge packets which thus can be 2.times. as large as in conventional modes of operation. By choosing the penultimate electrode before the reading stage to be approximately 2.5.times. as large as the other electrodes, this double charge packet can be transferred undivided in time to the output diode, a feature which is particularly advantageous for further signal processing.

Abstract: An integrated circuit device has a high resistivity silicon substrate in which a low resistivity region exists. A charge coupled array is fabricated in the high resistivity region and an output circuit is fabricated in the low resistivity region. At the boundary between the high and low resistivity regions a floating diffusion provides charge coupling between the array and the circuit. The low resistivity region is prepared in a high resistivity substrate at a temperature in excess of 1000.degree. C. to obtain a sufficiently deep low resistivity region but subsequent processing to produce the charge coupled array and the control circuit is performed at lower temperatures to minimize thermal degradation and contamination of the high resistivity region.

Abstract: A charge transfer device has one or more charge injection areas each having an input diffusion layer and two or more input gate electrodes. An input signal is applied to the input diffusion layer, a clock voltage is applied to one of the input gates and an input reference voltage is applied to the other input gate to inject a signal charge proportional to a difference between the input reference voltage and the input signal, and the signal charge is sequentially transferred. A magnitude of the input reference voltage is changed in accordance with a magnitude of a maximum value of the input signal so that transfer of charges which do not contribute to signal component is suppressed and a transfer efficiency is improved.

Abstract: D.C. reconstruction of sampled CCD output signals is achieved by subtracting the output current pulses of two CCDs (or subtracting parallel outputs of the same CCD) with a differencing circuit containing two biasing current mirrors, a current sink device and an output capacitor. The two current mirrors are used with each biasing the output of a complementary CCD to positive and acting to mirror the CCD output current. A third current mirror converts the output of one of the CCDs into a current sink. An output capacitor performs subtracting by converting all outputs to voltage and combining the positive biased output of one CCD with the current said output of the second CCD.

Abstract: An original reading device of the close-contact type such as may be used in a facsimile system in which the number of interconnections required for the device is made quite small and slow switching times of thin film transistors employed in the device are tolerated. Thin film transistors have input electrodes connected to corresponding photoelectric conversion elements. The thin film transistors are divided into a plurality of ordered groups with gate electrodes of each of the thin film transistors within each group being connected together. A first shift register applies first switching signals to connection points of the gate electrodes of each of the groups in time sequence. Output electrodes of the even- and odd-ordered groups of the thin film transistors are connected to corresponding lines of first and second sets of connecting lines, respectively. Temporary storing means, in the form of stray capacitors, are connected to each of the connecting lines.

Abstract: A charge coupled device (CCD) with separately addressable input signal gates is operated in the potential equilibrium mode. With properly selected voltage potentials the CCD can be used as a high speed linear detector of a variable analog signal without the need of preceeding independent sample and hold or peak detector circuits. The result is the efficient minimum/maximum detection of an analog signal in a fast-in/slow-out digitizer.

Abstract: A charge coupled device that includes an output portion having a field effect transistor disposed in the potential well channel to provide a non-destructive read-out of the analog value of a charge packet located in the portion of such potential well channel beneath the transistor. Drain, source and channel regions of the transistor are disposed transverse to the flow of charge packets. The conductivity of the channel is modulated as a function of the value of a charge packet in the potential well beneath the transistor.

Abstract: The noise in the output signal from the floating diffusion output stage of a charge transfer device is reduced. Reset noise can be reduced by resetting the floating diffusion to an in-channel potential, rather than to the reset drain potential. Flicker noise or "1/f" noise in the electrometer stage following the floating diffusion is suppressed by high-pass or band-pass filtering the output signal samples, after which the filtered signal is synchronously detected against a harmonic of the clocking frequency of the charge transfer device to obtain full bandwidth output response. The filtering not only suppresses flicker noise or "1/f" noise, but also suppresses smear that afflicts output signal samples originating from a floating diffusion reset to an in-channel potential.

Abstract: A photovoltaic diode input, and a charge transfer readout device are coupled by a MOS stage. The coupling stage includes a MOS transistor, to which is added, close to the source electrode of the MOS transistor which receives the signal from the diode, an extra electrode under which are stored charges which flow at the same time as those of the signal toward the readout device. Thus, the current involved is increased and the efficiency of signal injection into the readout device is improved.

Abstract: A charge transfer device having a plurality of transfer gates to which phased clock pulses are provided to transfer charge serially from semiconductor regions underlying the transfer gates through an output region underlying an output gate to a charge detector region. The last transfer gate preceding the output gate is fed with a phased clock pulse via a signal line other than the signal lines feeding the remaining transfer gates. The former signal line has an RO time constant lower than that for the other signal lines and permits rapid charge transfer from the last stage to the charge detecting device.

Abstract: An input part of a charge transfer device includes first, second and third gate electrodes on a semiconductor substrate. The first gate electrode is located close to a charge injection region but far from a shift register part. The third gate electrode is located close to the shift register part but far from the charge injection region. The second gate electrode is located between the first and third gate electrodes, and comprises two partial electrodes which are formed in different forming steps. One of the partial electrodes which is far from the first gate electrode is preferably formed by the same forming step as the first gate electrode.

Abstract: A solid image-sensing device, in which CCDs or the like are used, has a light-receiving part comprising a plurality of photosensitive cells disposed linearly and functioning to generate charges corresponding to light information projected incidently thereon, first and second charge-transfer paths on opposite sides of this light-receiving part, and a third charge-transfer path for deriving charges from the first and second charge-transfer paths, signals being read out alternately from the first and second charge-transfer paths at the time of high-speed readout, signals from the first and second charge-transfer paths being collected and read out through the third charge-transfer path during low-speed readout.

Abstract: A floating gate amplifier in a charge-coupled device (CCD) permitting non-destructive readout, where the floating gate is conductively coupled through a high resistance element to a bias voltage. The floating gate is defined by a lower level of metallization which is embedded in an insulating layer and crosses the charge transfer channel. In one embodiment the floating gate is connected to the source of a metal-oxide-semiconductor transistor and the drain of the transistor is connected to an upper level conductor which is a bias line. In another embodiment, the anode of a diode is connected to the floating gate and the diode cathode is connected to the bias line. A pair of control gates adjacent to and partially overlapping the floating gate transfer charge packets and improve sensitivity. Reading is accomplished by detecting voltages induced on the floating gate by the charge packets.

Abstract: A charge coupled device has a meandering charge path formed by a channel stop of unique shape. The channel stop is of interdigitated pattern, and the gate electrodes form a straight strip. The channel stop pattern and an asymmetric depletion layer formed within the channel cause the transfer of the charge through the channel via the meandering charge path. A transversal filter and imaging device are readily provided by extracting the signal from one or both sides of the channel.

Abstract: A circuit for obtaining an output from a CCD type signal processing circuit should operate satisfactorily in a high frequency band covering, for instance, video signals. For this purpose, the floating gate electrode of the CCD is connected to a first potential point through first and second capacitors. The connecting point of the floating gate electrode in the series circuit is connected to a second potential level through a first control switch which is driven by a reset clock pulse, and the connecting point of the first and second capacitors is connected to a third potential level through a second control switch which is driven by a reset clock pulse, so that the output is provided at the connecting point of the capacitors.

Abstract: Noise reduction and dynamic range expansion in a CCD imager is achieved by combining a narrow FAT zero metering gate with a reference column subtraction and CCD charge bailing.

Abstract: A dual transport channel charge coupled device for coherently processing two analog signals in a bandwidth compression mode of operation, especially for use in a high resolution coherent radar system, is disclosed. An input charge injection stage is included for each transport channel. The input stages are dependently operative to simultaneously inject charge quantities correspondingly representative of concurrent samplings of the two analog signals being processed into their corresponding associated transport channels. Each transport channel comprises N multi-phase controlled stages in an in-line arrangement with the stages of one transport channel respectively corresponding to the stages of the other, the stages being operative to transport the simultaneously injected charge quantities concurrently along their corresponding channels.

Abstract: The device comprises a capacitor, first means for taking into account, in logic form, the potential of the capacitor, second means which, in a first time, fixes the potential of the capacitor to a given value, third means which, in a second time, modify or do not modify the potential of the capacitor, depending on whether or not the charge quantity to be detected is present or absent, and fourth means which, in a third time, reloop the output of the first means to the input of the first means, the output of the first means constituting the output of the detection and storage device.Application to digitally programmable filters.

Abstract: This CCD structure comprises a substrate floating diffusion region from which an output signal is taken and a drain diffusion spaced apart from the output diffusion and from which the charge is returned. An electrode to be pulsed is placed immediately preceding the floating diffusion and a plurality of electrodes is interposed between the two diffusions. The first such electrode beyond the output floating diffusion is operated as a reset pulse gate electrode and the last such electrode before the drain diffusion is operated as a drain pulse gate electrode, while the intermediate electrode(s) have phased clock pulses applied thereto in synchronism with such phased clock pulses applied to other electrodes of the overall CCD circuit arrangement. The preceding pulsed electrode serves to extend the lower limit of the potential change of the floating diffusion.

Abstract: Charge subtraction for charge packets of two charge transfer device (CTD) delay lines is provided by alternately transferring them under a periodically clamped, normally floating sense gate, common to both delay lines. Adjacent the sense electrode, each delay line includes preceding and succeeding transfer gates, the gates of each line clocked by one of first and second oppositely phased clock signals for alternately transferring the charge packets under the sense gate. A reset switch clamps the sense gate to a reference voltage whenever its input voltage exceeds a first threshold level and unclamps the gate whenever its input voltage falls below the first threshold level.

Abstract: An accumulation-mode bulk channel CCD converts an electromagnetic radiation pattern into electrical signals. The device body may be of monocrystalline silicon and has a radiation-sensitive region which is of a first conductivity type determined by a dopant (e.g. sulphur, platinum, indium or thallium) having an energy level or levels sufficiently deep in the semiconductor band gap that substantially all of said dopant atoms are un-ionized at the device operating temperature. By this means the region is substantially free of majority charge carriers in the absence of radiation, and majority charge carriers trapped by the dopant atoms can be released upon excitation by the radiation. A first ohmic contact to the region supplies majority charge carriers to the dopant to replace charge carriers released by the incident radiation.

Abstract: A charge transfer differentiator having a layer of semiconductor material and a contiguous film of overlying electrically insulating material includes a first electrode fed by a first voltage wherein the first electrode is embedded in the film, for establishing an electric potential at the interface between the film and layer. A second electrode fed by a second voltage and a third electrode fed by a third voltage are embedded in the film and charge-coupled to the first electrode for establishing potential barriers at said interface. These electrodes and voltages provide a potential well at the interface. Also included is a fourth electrode embedded in the layer fed by a fourth voltage, and a fifth and sixth electrode separated from each other and embedded in the film, wherein the fifth and sixth electrodes are fed by a clock voltage, the fourth, fifth and sixth electrodes are charge-coupled to the second electrode so as to provide a constant input charge to the potential well.

Abstract: A circuit for compressing the dynamic range of a signal is described incorporating a semiconductor substrate, a charge barrier formed in the substrate having an aperture, charge indicative of the signal is introduced on one side of the barrier, two conductive regions spaced apart from said aperture for attracting the charge through the aperture and to its region. The charge being divided between the two regions as a function of the potential of each region, one of which may be fixed and the other allowed to float. Two potential wells of a charge-coupled device may be substituted for the two conductive regions having gate electrodes to provide a predetermined potential well for attracting charge. Alternatively, one conductive region and one potential well may be spaced apart from said aperture for attracting the charge to the aperture. The circuit may be combined with a photodetector on a semiconductor substrate.

Abstract: In a device for current-reading of a quantity of electric charges, the control circuit for the first and second MOS transistors receives a constant potential and comprises:a third transistor, the drain and gate of which are connected to the constant potential and the source of which is connected to the drain and to the gate of the second transistor;a second capacitor connected through one of its terminals to the nodal point of the second and the third transistor.The device is employed for reading quantities of charges which arrive under the storage electrodes of charge-transfer filters.

Abstract: A monolithic integrated circuit is provided capable of providing charge packets which are selectable multiples of other charge packets. This capability is provided by a charge-coupled device floating gate regenerator and an associated MOS capacitive region.

Abstract: In the operation of a high density quadrilinear CCD imaging array, photogenerate charge is transferred from the photosites, transversely through one inner CCD register to a second outer CCD register, before clocking the CCD registers. During the transfer from the inner to the outer registers, the signal charge passes through a region defined by boundaries spaced relatively widely to a region in which the boundaries are required to be spaced closely. In the latter region, two dimensional fringing fields from the boundaries elevate the minimum potential which defines the signal charge path and creates a potential step which traps a significant percentage of the signal charge. This trapping creates a large offset between the output signals from the inner and outer register. The concept proposed is to use a fat zero, i.e., an intentionally introduced small packet of charge, injected into the input of both the inner and outer CCD registers in order to totally eliminate the offset.

Abstract: A non-destructive charge subtraction output system for charge coupled devices (CCD) in which a floating electrode is clamped in the presence of a first charge so that when the first charge leaves the potential well and a second charge enters, the signal sensed is representative of the difference between the first and second charges with excellent common mode rejection, high bandwidth, and low power. The system operates so as to either provide a difference of adjacent charges along a channel either with or without an isolating bit or bits or to provide subtraction of the charges selected along a sequence of charges passing through the CCD channel. One use of the system in accordance with the invention is to sense moving targets in a scene having a substantially fixed or non-moving background.

Abstract: Charge transfer devices exhibit transfer inefficiencies, so that a part of a transferred charge packet is left and lags the original charge packet. This results in "smearing" of the original charge packet, thereby adversely affecting the unit-function response and the frequency response of the charge transfer device. The invention provides a solution to this problem, utilizing a compensation charge derived from the original charge packet, which at a suitable instant is applied to a point where the residual charge is cancelled via a feedback loop.

Abstract: The present invention provides a circuit for second correlated sampling. By switchably connecting feedback in the circuit, the stage providing the second correlated sampling is precharged independent of an external reference voltage source to make the circuit simpler and hence integratable.

Abstract: A driver circuit for a charge coupled device which includes a CMOS inverter including a P channel MOS transistor and an N channel MOS transistor for inverting the level of an input control pulse, an output terminal of the CMOS inverter being connected to a charge coupled device such that the P channel MOS transistor functions to charge the equivalent load capacitance of the charge coupled device and the N channel MOS transistor functions to discharge the equivalent load capacitance. A continuously variable DC power supply is provided for applying a variable gate voltage to the gate of at least one of the P and N channel MOS transistors to change the mutual conductance of the transistor so that the time constant of the charge or discharge circuit to the load capacitance can be adjusted to optimize the charge transfer efficiency of the charged coupled device.

Abstract: An integrated rectifier circuit has a doped semiconductor body having first and second oppositely doped regions therein and is covered by an electrically insulating layer on which a first pair of input gate electrodes are disposed which are associated with the first oppositely doped region and on which a second pair of input gate electrodes are disposed associated with the second oppositely doped region. The oppositely doped regions are connected to a clock pulse voltage and all of the input gate electrodes are connected to a constant voltage having a magnitude such that a uniform surface potential exists in the semiconductor regions covered by the electrodes. The input gate electrode of the first pair which is disposed at a greater distance from the first oppositely doped region and the input gate electrode of the second pair which is disposed closer to the second oppositely doped region are charged with the alternating voltage component of an input signal.

Abstract: Apparatus for amplifying output signals from a charge coupled area imaging device includes a resettable first floating gate amplifier connected to sense charge in the charge coupled device output register at a first location, a second floating gate amplifier connected to sense charge in the charge coupled device output register at a second location, and a charge limiting well disposed between the first location and the second location to remove charge in excess of a desired amount before the output signals are sensed at the second location. The dual preamplifiers permit optimization of the output signals from the charge coupled imaging device for two substantially different light levels by providing a substantially lower noise equivalent input signal level from the second preamplifier.

Abstract: A bucket brigaded device is provided which includes first and second clocking signal generators for generating a first set and a second set of clocking signals respectively, a plurality of successive capacitors for sequentially holding charge level representing an input signal, and a plurality of transistors for controlling the transfer of charge levels from one capacitor to another. Each of the transistors is connected between adjacent capacitors.The bucket brigaded device further comprises a first clocking signal driver for supplying one of the first set of clocking signals to each capacitor, and a second clocking signal driver for supplying one of the second set of clocking signals to each transistor.

Abstract: An analog device for reading a quantity of electric charge, for example, in a transversal charge transfer filter. The device includes a capacitor and two MOS transistors which are connected in series to the point in the filter where the charge is to be read. The capacitor is connected to the common point of the two transistors which are controlled in phase opposition to insure charging of the capacitor. The capacitor maintains a potential at the charge reading point constant. Any variation in the quantity of charge under an electrode is converted into a variation of potential at the common point and this forms the read signal which is detected by means of a third MOS transistor.