Metal Coating (e.g., Electroless Deposition, Etc.) Patents (Class 427/304)
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Patent number: 6645557Abstract: A method of forming a conductive metal layer on a non-conductive surface, including providing a non-conductive surface; contacting the non-conductive surface with an aqueous solution or mixture containing a stannous salt to form a sensitized surface; contacting the sensitized surface with an aqueous solution or mixture containing a silver salt having a pH in the range from about 5 to about 10 to form a catalyzed surface; and electroless plating the catalyzed surface by applying an electroless plating solution to the catalyzed surface.Type: GrantFiled: October 17, 2001Date of Patent: November 11, 2003Assignee: Atotech Deutschland GmbHInventor: Nayan H. Joshi
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Patent number: 6638564Abstract: A method of electroless plating for processing a plating surface to form a barrier layer being capable of uniformly forming a barrier layer and reducing the consumption of a processing solution, comprising a step of feeding a processing solution used in at least one of the pre-processing steps of the electroless plating and the electroless plating step to the plating surface for puddling treatment, or, using a processing solution at least containing, with respect to one mole of a first metallic material supplying a main ingredient of the barrier layer, three or more moles of a completing agent and three or more moles of reducing agent and having a pH value adjusted to 9 or more and stored in an atmosphere of an inert gas or ammonia gas, and a corresponding electroless plating apparatus.Type: GrantFiled: April 9, 2001Date of Patent: October 28, 2003Assignee: Sony CorporationInventors: Yuji Segawa, Akira Yoshio, Masatoshi Suzuki, Katsumi Watanabe, Shuzo Sato
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Patent number: 6638411Abstract: The present invention relates to a method and apparatus for separating out metal copper according to an electroplating of copper using, for example, a solution of copper sulfate to produce copper interconnections on a surface of a substrate. The substrate is brought into contact, at least once, with a processing solution containing at least one of organic substance and sulfur compound which are contained in a plating solution. Thereafter, the substrate is brought into contact with the plating solution to plate the substrate.Type: GrantFiled: January 27, 2000Date of Patent: October 28, 2003Assignees: Ebara Corporation, Kabushiki Kaisha ToshibaInventors: Koji Mishima, Mizuki Nagai, Ryoichi Kimizuka, Tetsuo Matsuda, Hisashi Kaneko
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Publication number: 20030194494Abstract: ABSTRACT OF THE DISCLOSURE A method for forming the soldering layer of fiber array substrate surface has been disclosed herein. A plurality of fiber array bases having V-shape grooves are formed on a substrate, and a solder layer is formed on the whole substrate via chemical plating method of following steps: forming a layer of nickel/chromium (Ni/Cr) alloy or aluminum (Al) metal on said substrate through evaporation or sputtering; treating said surface of said substrate having V-shape grooves with a sensitizing solution for plating said surface with Sn2+, wherein said sensitizing solution comprises deionized water and SnCl2; treating said sensitized surface of said substrate with an activating solution for precipitating catalytic element Pd0 on said surface, wherein said sensitizing solution comprises 2 to 10 g/l of PdCl2 and 0.01 to 0.1 M HCl; and (E) immersing said treated surface into an electroless nickel plating solution to form a nickel metal layer on said treated surface.Type: ApplicationFiled: April 11, 2003Publication date: October 16, 2003Applicant: RiTek CorporationInventors: Chung-I Chiang, Ming-Jen Wang, Kun-Hsien Cheng, Hong-Jueng King, Huei-Pin Huang, Chwei-Jing Yeh
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Publication number: 20030190426Abstract: Methods and apparatus are provided for forming a metal or metal silicide layer by an electroless deposition technique. In one aspect, a method is provided for processing a substrate including depositing an initiation layer on a substrate surface, cleaning the substrate surface, and depositing a conductive material on the initiation layer by exposing the initiation layer to an electroless solution. The method may further comprise etching the substrate surface with an acidic solution and cleaning the substrate of the acidic solution prior to depositing the initiation layer. The initiation layer may be formed by exposing the substrate surface to a noble metal electroless solution or a borane-containing solution. The conductive material may be deposited with a borane-containing reducing agent. The conductive material may be used as a passivation layer, a barrier layer, a seed layer, or for use in forming a metal silicide layer.Type: ApplicationFiled: April 3, 2002Publication date: October 9, 2003Inventors: Deenesh Padhi, Joseph Yahalom, Sivakami Ramanathan, Chris R. McGuirk, Srinivas Gandikota, Girish Dixit
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Publication number: 20030189026Abstract: Methods and apparatus are provided for forming a metal or metal suicide layer by an electroless deposition technique. In one aspect, a method is provided for processing a substrate including depositing an initiation layer on a substrate surface, cleaning the substrate surface, and depositing a conductive material on the initiation layer by exposing the initiation layer to an electroless solution. The method may further comprise etching the substrate surface with an acidic solution and cleaning the substrate of the acidic solution prior to depositing the initiation layer. The initiation layer may be formed by exposing the substrate surface to a noble metal electroless solution or a borane-containing solution. The conductive material may be deposited with a borane-containing reducing agent. The conductive material may be used as a passivation layer, a barrier layer, a seed layer, or for use in forming a metal silicide layer.Type: ApplicationFiled: April 3, 2002Publication date: October 9, 2003Inventors: Deenesh Padhi, Joseph Yahalom, Sivakami Ramanathan, Chris R. McGuirk, Srinivas Gandikota, Girish Dixit
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Patent number: 6630203Abstract: The present invention provides a unique method for the electroless co-deposition of metal and hard particles on an electrical contact surface to provide electrical, thermal, and mechanical connections between the particle enhanced contact surface and an opposing contact surface, and to enhance the thermal and electrical conductivity between the contact surfaces and their corresponding substrates. The innovative method is able to uniformly deposit metal and particles of any shape, and with a wide range of density and sizes, on contact surfaces, and can be adjusted to provide any desired surface area coverage in desirable deposition patterns. The co-deposited contact surface can, for example, be easily joined to another surface of any type by nonconductive adhesive, resulting in a connection that is mechanically robust, chemically inert, and inherently electrically conductive.Type: GrantFiled: June 15, 2001Date of Patent: October 7, 2003Assignee: NanoPierce Technologies, Inc.Inventors: Robert J. Bahn, Fred A. Blum, Herbert J. Neuhaus, Bin Zou
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Patent number: 6623803Abstract: A method of patterning a layer of copper on a material surface includes providing a stamp having a base and a stamping surface and providing a copper plating catalyst on the stamping surface. The method can also include applying the stamping surface to the material surface, wherein a pattern of copper plating catalyst is applied to the material surface. The method can further include providing a copper solution over the copper plating catalyst, whereby a layer of copper is patterned on the material surface.Type: GrantFiled: November 14, 2000Date of Patent: September 23, 2003Assignee: Advanced Micro Devices, Inc.Inventor: Zoran Krivokapic
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Patent number: 6616967Abstract: An improved wire bonding process for copper-metallized integrated circuits is provided by a nickel layer that acts as a barrier against up-diffusing copper. In accordance with the present invention the nickel bath is placed and remains in hydrogen saturation by providing a piece of metal that remains in the nickel plating tank before and during the plating process.Type: GrantFiled: April 15, 2002Date of Patent: September 9, 2003Assignee: Texas Instruments IncorporatedInventor: Howard R. Test
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Patent number: 6610365Abstract: A method for producing conductor coating on dielectric surface may be used in many areas of industry for preparation of dielectric surfaces for selective electroplating. Using this method, conductor coatings are obtained when dielectric items are etched in acidic solutions containing oxidising agents, then treated in trivalent bismuth compound solution and additionally treated in sulphide solution.Type: GrantFiled: July 20, 2001Date of Patent: August 26, 2003Assignee: Shipley Company, L.L.C.Inventor: Mykolas Baranauskas
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Patent number: 6605161Abstract: A deposition process including applying an inoculant to at least a portion of the surface of a metal component, and then forming an intermetallic layer at the inoculant surface, such as by exposing at least the coated surface portion to a deposition environment.Type: GrantFiled: June 5, 2001Date of Patent: August 12, 2003Assignee: Aeromet Technologies, Inc.Inventor: David C. Fairbourn
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Patent number: 6602653Abstract: A patterning method includes providing a first material (e.g., copper) and transforming at a least a surface region of the first material to a second material (e.g., copper oxide). One or more portions of the second material (e.g., copper oxide) are converted to one or more converted portions of first material. (e.g., copper) while one or more portions of the second material (e.g., copper oxide) remain. One or more portions of the remaining second material (e.g., copper oxide) are removed selectively relative to converted portions of first material (e.g., copper). Further, a thickness of the converted portions may be increased. Yet further, a diffusion barrier layer may be used for certain applications.Type: GrantFiled: August 25, 2000Date of Patent: August 5, 2003Assignee: Micron Technology, Inc.Inventors: Joseph E. Geusic, Alan R. Reinberg
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Patent number: 6599563Abstract: A method and apparatus for improving interfacial chemical reactions in electroless depositions of metals, in which the substrate to be plated is pre-heated prior to its immersion in the various processing solutions that require elevated temperatures, and especially before immersion in the electroless plating solution. The pre-heating is carried out to a temperature that is needed to bring about the desired chemical reaction at the substrate-solution interface, allowing the bath of that process step to operate significantly below the temperature that would have been needed if the panel had not been pre-heated, and below the solution temperature of current practice. According to another aspect of the present invention, the electroless plating apparatus for plating a workpiece operates in a vertical mode and it comprises a heating station, with the panel to be plated returning to the heating station as dictated by the temperature required for a given process step.Type: GrantFiled: August 29, 2002Date of Patent: July 29, 2003Assignee: J.G. Systems Inc.Inventor: John Grunwald
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Patent number: 6599583Abstract: A method for forming segmented through holes in a printed circuit board. The segmented through holes comprise a plurality of electrically conductive pathways disposed on the walls of a single through hole. The segmented through hole can be disposed in a two sided circuit board assembly or in a composite, multi layer circuit board assembly.Type: GrantFiled: September 27, 2001Date of Patent: July 29, 2003Inventor: N. Edward Berg
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Publication number: 20030129310Abstract: The invention includes a method of electroless deposition of nickel over an aluminum-containing material. A mass is formed over the aluminum-containing material, with the mass predominantly comprising a metal other than aluminum. The mass is exposed to palladium, and subsequently nickel is electroless deposited over the mass. The invention also includes a method of electroless deposition of nickel over aluminum-containing materials and copper-containing materials. The aluminum-containing materials and copper-containing materials are both exposed to palladium-containing solutions prior to electroless deposition of nickel over the aluminum-containing materials and copper-containing materials. Additionally, the invention includes a method of forming a solder bump over an aluminum-containing material.Type: ApplicationFiled: January 9, 2002Publication date: July 10, 2003Inventor: Nishant Sinha
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Publication number: 20030124255Abstract: A method of manufacturing ULSI wiring in which wiring layers are separately formed via a diffusion prevention layer with an insulating interlayer portion made of SiO2. The method comprises the steps of treating, with a silane compound, an SiO2 surface on which the insulating interlayer portion is to be formed, performing catalyzation with an aqueous solution containing a palladium compound, forming the diffusion prevention layer by electroless plating, and then forming the wiring layer on this diffusion prevention layer. Furthermore, a capping layer is formed on the wiring layer by electroless plating. In consequence, the diffusion prevention layer having good adhesive properties can all be formed through a simple process by wet processes, and further, the wiring layer can directly be formed on this diffusion prevention layer by the wet process. In addition, the capping layer can directly be formed on this wiring layer by the electroless plating.Type: ApplicationFiled: December 10, 2002Publication date: July 3, 2003Applicant: NEC CORPORATIONInventors: Kazuyoshi Ueno, Tetsuya Osaka, Nao Takano
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Publication number: 20030124256Abstract: This invention pertains to a process for plating metal onto textile products, and the metal plated textile products made by this process. The process can employ an apparatus that is conventionally used for dyeing fabric.Type: ApplicationFiled: February 21, 2003Publication date: July 3, 2003Applicant: OMNISHIELD, INC.Inventors: John Scofield, Gerald Scofield
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Publication number: 20030124262Abstract: A method for forming a metal interconnect on a substrate is provided. In one aspect, the method comprises depositing a refractory metal containing barrier layer having a thickness that exhibits a crystalline like structure and is sufficient to inhibit atomic migration on at least a portion of a metal layer by alternately introducing one or more pulses of a metal-containing compound and one or more pulses of a nitrogen-containing compound; depositing a seed layer on at least a portion of the barrier layer; and depositing a second metal layer on at least a portion of the seed layer.Type: ApplicationFiled: October 25, 2002Publication date: July 3, 2003Inventors: Ling Chen, Hua Chung, Sean M. Seutter, Michael X. Yang, Ming Xi, Vincent Ku, Dien-Yeh Wu, Alan Ouye, Norman Nakashima, Barry Chin, Hong Zhang
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Patent number: 6586043Abstract: The invention includes a method of electroless deposition of nickel over an aluminum-containing material. A mass is formed over the aluminum-containing material, with the mass predominantly comprising a metal other than aluminum. The mass is exposed to palladium, and subsequently nickel is electroless deposited over the mass. The invention also includes a method of electroless deposition of nickel over aluminum-containing materials and copper-containing materials. The aluminum-containing materials and copper-containing materials are both exposed to palladium-containing solutions prior to electroless deposition of nickel over the aluminum-containing materials and copper-containing materials. Additionally, the invention includes a method of forming a solder bump over an aluminum-containing material.Type: GrantFiled: January 9, 2002Date of Patent: July 1, 2003Assignee: Micron Technology, Inc.Inventor: Nishant Sinha
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Patent number: 6586049Abstract: A method of patterning at least one object layer, includes a step of forming a mask on the object layer, and a step of selectively etching the object layer using the mask. The mask is made of a magnetic metallic compound with a basic metal of nickel or cobalt containing at least group 3B element and/or group 5B element.Type: GrantFiled: December 11, 2000Date of Patent: July 1, 2003Assignee: TDK CorporationInventors: Yasufumi Uno, Toru Inoue, Tetsuya Mino, Koji Matsukuma
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Patent number: 6582767Abstract: A method for forming a metal pattern by the micro-stamping process involves the steps of treating a substrate bearing a thin film of a reducing silicon polymer with a solution containing a salt of a metal having a standard oxidation-reduction potential of at least 0.54 volt, allowing metal colloid to deposit on the substrate surface, stamping a pattern of an alkane thiol to the substrate surface for transferring the pattern to the metal colloid-bearing silicon polymer thin film, and effecting electroless metal plating for forming a metal pattern only on the region of the silicon polymer thin film which is not covered with the alkane thiol pattern. The finely defined metal pattern can be formed on any type of substrate though inexpensive simple steps and has good adhesion to the substrate.Type: GrantFiled: November 1, 2000Date of Patent: June 24, 2003Assignee: Shin-Etsu Chemical Co., Ltd.Inventors: Motoo Fukushima, Eiichi Tabei, Tomoyoshi Furihata, Masaya Arakawa
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Publication number: 20030113452Abstract: A method of forming a conductive metal layer on a non-conductive surface, including providing a non-conductive surface; contacting the non-conductive surface with an aqueous solution or mixture containing a stannous salt to form a sensitized surface; contacting the sensitized surface with an aqueous solution or mixture containing a silver salt having a pH in the range from about 5 to about 10 to form a catalyzed surface; and electroless plating the catalyzed surface by applying an electroless plating solution to the catalyzed surface.Type: ApplicationFiled: October 17, 2001Publication date: June 19, 2003Inventor: Nayan H. Joshi
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Publication number: 20030113448Abstract: The invention relates to a method for the interior metal-coating of glass tubes, with the metal-coated surface being a cylindrical shell.Type: ApplicationFiled: October 7, 2002Publication date: June 19, 2003Inventors: Stephan Tratzky, Heinz Dotzler, Matthias Muller, Joachim Pfeifer, Michael Siller, Leonid Schulz, Gottfried Haas
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Publication number: 20030108751Abstract: In the silver mirror pre-treating step, a tin[II] chloride solution with tin[II] actually serving as a co-catalyst is used for supporting tin[II] on the surface of the basecoat layer in the co-catalyst-supporting step. In the next washing step, the surface of the basecoat layer is washed with water. In the still next catalyst-supporting step, a palladium chloride solution with palladium[II] actually serving as a catalyst is used for supporting palladium[II] on the surface of the basecoat layer. After that, the resulting laminate is washed in the next washing step and then plated through silver mirror reaction in the still next plate layer-forming step.Type: ApplicationFiled: November 14, 2002Publication date: June 12, 2003Inventors: Yukitaka Hasegawa, Yosuke Maruoka, Hiroshi Watarai, Yasuhiko Ogisu
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Publication number: 20030082307Abstract: A method for forming a metal interconnect on a substrate is provided. The method includes depositing a refractory metal-containing barrier layer having a thickness less than about 20 angstroms on at least a portion of a metal layer by alternately introducing one or more pulses of a metal-containing compound and one or more pulses of a nitrogen-containing compound. The method also includes depositing a seed layer on at least a portion of the barrier layer, and depositing a second metal layer on at least a portion of the seed layer. The barrier layer provides adequate barrier properties and allows the grain growth of the metal layer to continue across the barrier layer into the second metal layer thereby enhancing the electrical performance of the interconnect.Type: ApplicationFiled: July 10, 2002Publication date: May 1, 2003Applicant: Applied Materials, Inc.Inventors: Hua Chung, Ling Chen
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Patent number: 6555171Abstract: Provided herein is a method of utilizing electroless copper deposition to form interconnects in a semiconductor device. An opening is formed in a dielectric layer in the form of a trench, via or combination thereof, and a diffusion barrier layer is blanket deposited in the opening. Then, a contact displacement technique is used to form a seed layer on the diffusion barrier layer which includes copper, tin and palladium. Electroless deposition of copper is been undertaken to autocatalytically deposit copper on the activated barrier layer. The process continues to create a conformal, void free electroless copper deposition.Type: GrantFiled: April 26, 2000Date of Patent: April 29, 2003Assignee: Advanced Micro Devices, Inc.Inventor: Sergey D. Lopatin
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Patent number: 6555158Abstract: There is a method and apparatus for plating in which electroless copper plating is performed in a contact hole and an interconnect trench on a minute scale of a semiconductor integrated circuit device, and a plating structure. Organic material originated from an organic gas carried over from the preceding step is removed from the inner surface of a blind hole, thereafter the surface of the barrier layer is subjected to predetermined pretreatments comprising a hydroxylation treatment, a coupling treatment, a Pd colloidal solution treatment and the like, and following the pretreatments, electroless plating with copper is effected desirably under influence of ultrasonic waves. Hence, a uniform, good quality plating layer is formed inside and outside the hole and a CMP processing following the plating is performed with ease.Type: GrantFiled: January 20, 2000Date of Patent: April 29, 2003Assignee: Sony CorporationInventors: Akira Yoshio, Yuji Segawa
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Patent number: 6551929Abstract: A method and system to form a refractory metal layer on a substrate features a bifurcated deposition process that includes nucleating a substrate using ALD techniques to serially expose the substrate to first and second reactive gases followed forming a bulk layer, adjacent to the nucleating layer, using CVD techniques to concurrently exposing the nucleation layer to the first and second gases.Type: GrantFiled: June 28, 2000Date of Patent: April 22, 2003Assignee: Applied Materials, Inc.Inventors: Moris Kori, Alfred W. Mak, Jeong Soo Byun, Lawrence Chung-Lai Lei, Hua Chung, Ashok Sinha, Ming Xi
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Patent number: 6544584Abstract: A process for removal of undesirable conductive material (e.g., catalyst material and seeped circuit material) on a circuitized substrate and the resultant circuitized substrates disclosed. Such process and resultant circuit effectively address the electrical shorting problems caused by nonremoval of the residual catalyst material and circuit material which has seeped under the residual catalyst material. The process includes the steps of: a) providing a catalyst layer (e.g., palladium and tin) having circuit pattern (e.g., copper) thereon; b) pretreating the catalyst layer and the circuit pattern (e.g., with a cyanide dip) for removal of undesirable portions of each which cause electrical leakage between circuit lines of the circuit pattern; c) oxidizing the catalyst layer and the circuit pattern (e.g.Type: GrantFiled: March 7, 1997Date of Patent: April 8, 2003Assignee: International Business Machines CorporationInventors: Edward Lee Arrington, John Christopher Camp, Robert Jeffrey Day, Edmond Otto Fey, Curtis Michael Gunther, Thomas Richard Miller
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Patent number: 6544585Abstract: A high quality metallic deposit can be produced inside the micro-cavities formed on a surface of a substrate by the present invention. The method involves immersing the substrate in a liquid held in a processing chamber, evacuating the processing chamber so as to remove residual bubbles from the micro-cavities and to degas the liquid within the micro-cavities, and subjecting the liquid to boiling in at least those regions adjacent to the substrate.Type: GrantFiled: September 2, 1998Date of Patent: April 8, 2003Assignee: Ebara CorporationInventors: Fumio Kuriyama, Akihisa Hongo, Hiroaki Inoue, Tsuyoshi Tokuoka
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Patent number: 6541080Abstract: Process for the direct metallizing of the surface of a plastic object. The surface of the plastic object is roughened by pickling. The surface is activated with the aid of a colloidal or ionogenic aqueous solution of a first precious metal, which colloidal or ionogenic aqueous solution also contains a second base metal. This forms an activation coat on the surface containing the first precious and the second base metals. Electron conductivity of the activation coat is provided with the aid of a treatment solution, with which the second base metal is at least partially dissolved out of the activation coat and an electron conducting substance is adsorb in the activation coat. Then the electron-conductive activation coat is metallized. Before the electron conducting activation coat is metallized, the sequence of steps “activation of the surface and establishment of electronic conductivity” is repeated at least once.Type: GrantFiled: September 19, 2001Date of Patent: April 1, 2003Assignee: Enthone Inc.Inventor: Peter Pies
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Publication number: 20030059538Abstract: The present invention generally relates to filling of a feature by depositing a barrier layer, depositing a seed layer over the barrier layer, and depositing a conductive layer over the seed layer. In one embodiment, the seed layer comprises a copper alloy seed layer deposited over the barrier layer. For example, the copper alloy seed layer may comprise copper and a metal, such as aluminum, magnesium, titanium, zirconium, tin, and combinations thereof. In another embodiment, the seed layer comprises a copper allloy seed layer deposited over the barrier layer and a second seed layer deposited over the copper alloy seed layer. The copper alloy seed layer may comprise copper and a metal, such as aluminum, magnesium, titanium, zirconium, tin, and combinations thereof The second seed layer may comprise a metal, such as undoped copper. In still another embodiment, the seed layer comprises a first seed layer and a second seed layer.Type: ApplicationFiled: September 26, 2001Publication date: March 27, 2003Applicant: Applied Materials, Inc.Inventors: Hua Chung, Ling Chen, Jick Yu, Mei Chang
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Patent number: 6534124Abstract: A process for producing an electrolessly plated molded article, which includes molding a resin composition made of a thermoplastic resin having a specific Izod impact strength and a Rockwell surface hardness and an inorganic filler, then treating the surface of the molded article with air blast using an abrasive having a sharp granular shape, and then conducting catalyst coating, activation treatment and electroless plating. It has been possible to apply the electroless plating with a high adhesion strength to the molded article of the thermoplastic resin composition without conducting the chemical etching treatment.Type: GrantFiled: May 31, 2002Date of Patent: March 18, 2003Assignee: Idemitsu Petrochemical Co., Ltd.Inventors: Eiji Tamura, Wataru Kosaka, Toshimi Arashi
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Publication number: 20030039754Abstract: A plastic surface to be metallized is contacted with a preactivation solution after an etching step and before an activation step. The solution comprises permanganate, a crosslinking agent, and a pH buffer material. As a result of the preactivation treatment with the solution, the plastic surface is changed in such a manner that the activation step can be carried out more efficiently. The method enables plastics to be metallized more efficiently and at lower cost, or in some cases to be metallized at all.Type: ApplicationFiled: August 5, 2002Publication date: February 27, 2003Applicant: Enthone IncInventor: Andreas Johannes Konigshofen
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Patent number: 6524645Abstract: A process for the metalization of substrates is disclosed. The metal either forms a coating over the entire substrate, or it is patternwise deposited on the substrate surface. Metal is patternwise formed on the substrate either by forming a pattern of resist material on the substrate and depositing the material in the interstices defined by the pattern or by forming a patterned resist layer over a metal layer and transferring the pattern into the substrate using conventional techniques. The patterned resist layer is formed on the substrate using conventional techniques. The substrate is treated with reagents that promote the electroless plating of metal on the substrate surface. If the resist material has been previously formed on the substrate surface, the substrate surface is then dried. The remaining resist is then removed from the substrate surface.Type: GrantFiled: October 18, 1994Date of Patent: February 25, 2003Assignee: Agere Systems Inc.Inventors: Michael D. Evans, Tae Yong Kim, Henry Hon Law, Te-Sung Wu
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Patent number: 6524663Abstract: An activated substrate surface suitable for electronics and microsystems preparation is prepare by contacting the surface with a surface activation compound, e.g. organometallic based on palladium, platinum, rhodium or iridium. The photo labile ligand has an optical absorption band which overlaps with the wavelength of the UV. A UV lamp is used, in combination with a mask, to selectively irradiate the contacted surface. Irradiation of the surface with light of a suitable wavelength decomposes the organometallic compound to the activating metal. The surface is then ready for electroless plating with the desired conducting material. The mask is patterned to delineate areas where surface activation is not to occur. The organometallic compound absorbs ultraviolet radiation in the wavelength range 210-260 nm, or in the wavelength range 290-330 nm, in the solid state if the compound exists as a solid at 25° C. or in the liquid state if the compound exists as a liquid at 25° C.Type: GrantFiled: June 15, 1999Date of Patent: February 25, 2003Assignee: University College Cork-National University of IrelandInventors: Patrick V. Kelly, Gabriel M. Crean, Daniel J. Macauley
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Patent number: 6521285Abstract: Methods for electroless deposition of conductive material on a substrate using in both cases a stamp having a patterned surface which is pressed onto the surface of a substrate for printing the substrate and providing a pattern of a catalyst on the substrate on which metal deposition occurs in the course of electroless deposition by immersing the printed substrate in a plating bath are provided. In one case, the stamp is pretreated to render the pattern of the stamp wettable with a catalytic ink which is transformed to the surface of the substrate. In the other case, a catalytic layer is provided on the surface of the substrate which is patterned by the stamp transferring a resist material onto the catalytic layer so that a subsequent etching process lays open the desired pattern of the catalytic layer for electroless deposition.Type: GrantFiled: June 27, 2001Date of Patent: February 18, 2003Assignee: International Business Machines CorporationInventors: Hans Biebuyck, Emmanuel Delamarche, Matthias Geissler, Hannes Kind, Bruno Michel
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Publication number: 20030031803Abstract: A process for metallizing a substrate part includes the following three steps: coating the part with a precursor composite material layer consisting of a polymer matrix doped with photoreducer material dielectric particles, irradiating the surface to be metallized of the substrate part with a light beam emitted by a laser, and immersing the irradiated part in an autocatalytic bath containing metal ions, with deposition of the latter in a layer on the irradiated surface. The dimension of the dielectric particles is less than or equal to 0.5 microns. The method is intended in particular for producing a metallized part including a substrate part consisting of a flexible film.Type: ApplicationFiled: March 13, 2002Publication date: February 13, 2003Inventors: Christian Belouet, Bertrand Joly, Didier Lecomte, Patricia Laurens
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Patent number: 6518198Abstract: A method for forming an oxidation barrier including at least partially immersing a semiconductor device structure in an electroless plating bath that includes at least one metal salt and at least one reducing agent. The reaction of the at least one metal salt with the at least one reducing agent simultaneously deposits metal and a dopant thereof. The oxidation barrier may be used to form conductive structures of semiconductor device structures, such as a capacitor electrode, or may be formed adjacent conductive or semiconductive structures of semiconductor device structures to prevent oxidation thereof. The oxidation barrier is particularly useful for preventing oxidation during the formation and annealing of a dielectric structure from a high dielectric constant material, such as Ta2O5 or BST.Type: GrantFiled: August 31, 2000Date of Patent: February 11, 2003Assignee: Micron Technology, Inc.Inventor: Rita J. Klein
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Publication number: 20030026994Abstract: The present invention provides a reflective optical element being excellent in reflectivity and transmittance having a metallic thin film being excellent in durability and abrasion resistance wherein, in the reflective optical element in which light impinges in the transparent substrate and projects out after repeating reflection on the back plane, the reflection plane is formed by laminating the transparent substrate, metallic thin film and amorphous fluorocarbon resin in this order while forming a layer of the amorphous fluorocarbon resin on the incident and projection planes simultaneously with forming the layer on the outermost layer to allow durability and abrasion resistance to be improved with the amorphous fluorocarbon resin on the reflection plane, silver being deposited on the metallic layer by electroless plating in depositing the films while the amorphous fluorocarbon resin being preferably deposited by a wet film-deposition method such as a dip-coating method.Type: ApplicationFiled: September 13, 1999Publication date: February 6, 2003Inventors: HIDEYUKI HATAKEYAMA, MASANOBU OHGANE
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Publication number: 20030008075Abstract: A method of manufacturing ULSI wiring in which wiring layers are separately formed via a diffusion prevention layer with an insulating interlayer portion made of SiO2. The method comprises the steps of treating, with a silane compound, an SiO2 surface on which the insulating interlayer portion is to be formed, performing catalyzation with an aqueous solution containing a palladium compound, forming the diffusion prevention layer by electroless plating, and then forming the wiring layer on this diffusion prevention layer. Furthermore, a capping layer is formed on the wiring layer by electroless plating. In consequence, the diffusion prevention layer having good adhesive properties can all be formed through a simple process by wet processes, and further, the wiring layer can directly be formed on this diffusion prevention layer by the wet process. In addition, the capping layer can directly be formed on this wiring layer by the electroless plating.Type: ApplicationFiled: May 28, 2002Publication date: January 9, 2003Applicant: WASEDA UNIVERSITY, NEC CORPORATIONInventors: Kazuyoshi Ueno, Tetsuya Osaka, Nao Takano
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Publication number: 20030003233Abstract: A method is provided for the preparation of metal/porous substrate composite membranes by flowing a solution of metal to be plated over a first surface of a porous substrate and concurrently applying a pressure of gas on a second surface of the porous substrate, such that the porous substrate separates the solution of metal from the gas, and the use of the resulting membrane for the production of highly purified hydrogen gas.Type: ApplicationFiled: July 22, 2002Publication date: January 2, 2003Inventor: Ashok S Damle
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Publication number: 20020192379Abstract: The present invention provides a method for metal plating which makes it possible to perform electroless plating in a favorable manner even on materials difficult to apply electroless plating, and a pretreatment agent for this method.Type: ApplicationFiled: July 8, 2002Publication date: December 19, 2002Inventor: Toru Imori
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Publication number: 20020192363Abstract: The present invention provides a unique method for the electroless co-deposition of metal and hard particles on an electrical contact surface to provide electrical, thermal, and mechanical connections between the particle enhanced contact surface and an opposing contact surface, and to enhance the thermal and electrical conductivity between the contact surfaces and their corresponding substrates. The innovative method is able to uniformly deposit metal and particles of any shape, and with a wide range of density and sizes, on contact surfaces, and can be adjusted to provide any desired surface area coverage in desirable deposition patterns. The co-deposited contact surface can, for example, be easily joined to another surface of any type by nonconductive adhesive, resulting in a connection that is mechanically robust, chemically inert, and inherently electrically conductive.Type: ApplicationFiled: June 15, 2001Publication date: December 19, 2002Inventors: Robert J. Bahn, Bin Zou, Herbert J. Neuhaus, Fred A. Blum
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Publication number: 20020187267Abstract: A process for producing an electrolessly plated molded article, which includes molding a resin composition made of a thermoplastic resin having a specific Izod impact strength and a Rockwell surface hardness and an inorganic filler, then treating the surface of the molded article with air blast using an abrasive having a sharp granular shape, and then conducting catalyst coating, activation treatment and electroless plating. It has been possible to apply the electroless plating with a high adhesion strength to the molded article of the thermoplastic resin composition without conducting the chemical etching treatment.Type: ApplicationFiled: May 31, 2002Publication date: December 12, 2002Applicant: IDEMITSU PETROCHEMICAL CO., LTD.Inventors: Eiji Tamura, Wataru Kosaka, Toshimi Arashi
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Publication number: 20020187266Abstract: A SnO2 film having a prescribed pattern feature is formed on a substrate by a wet film-formation technology (e.g., sol-gel method). A Ni film is formed on the SnO2 film by an electroless plating method. The electroless plating method is conducted in the presence of at least one sulfur-containing compound selected from the group consisting of thiosulfates, thiocyanates and sulfur-containing organic compounds.Type: ApplicationFiled: May 22, 2002Publication date: December 12, 2002Inventors: Yoshihiro Izumi, Yoshimasa Chikama, Satoshi Kawashima, Takaharu Hashimoto, Itsuji Yoshikawa, Masaaki Ishikawa
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Patent number: 6491766Abstract: A coating composition and process have been developed to provide an activated coating on nickel screen for use as cathodes in electrolytic cells for the generation of hydrogen and oxygen. Compared to the earlier Classical Pack Cementation process, the disclosed process is less expensive, reduces processing time from 20 hours to a few minutes, eliminates dusts and toxic gases, and provides improved performance in cells for hydrogen and oxygen generation. The coating is characterized by the presence of two activated layers with a high surface area, a multitude of fissures and a nickel to aluminum weight ratio greater than 20/1 in the top layer and greater than 4/1 in the bottom layer adjacent to the nickel substrate.Type: GrantFiled: October 19, 2000Date of Patent: December 10, 2002Assignee: Alloy Surfaces Co., Inc.Inventors: Alfonso L. Baldi, Frank J. Clark
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Publication number: 20020182308Abstract: A method of electrolessly gold plating copper on a printed circuit board (PCB). Starting with a copper patterned PCB, steps include: clean with ultrasonic agitation with the PCB initially oriented vertically and gradually moved to a 45° angle; rinse; sulfuric acid bath with ultrasonic and mechanical agitation; rinse; another sulfuric acid bath with ultrasonic and mechanical agitation; plate the copper with palladium with ultrasonic agitation with the PCB initially oriented at a 45° angle and flipped half way through to opposing 45° angle; rinse; post dip in sulfuric acid; rinse; electrolessly nickel plate with mechanical agitation; rinse; nitrogen blow dry; visual inspection for nickel coverage of the copper; hydrochloric acid bath with manual agitation; rinse; if full nickel coverage was not achieved, repeat preceding steps starting with second sulfuric acid bath; gold flash plate to establish a first layer of gold; rinse; autocatalytic gold plate; rinse; and nitrogen blow dry.Type: ApplicationFiled: April 2, 2002Publication date: December 5, 2002Inventors: David M. Lee, Arthur S. Francomacaro, Seppo J. Lehtonen, Harry K. Charles
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Patent number: 6475644Abstract: Radioactive coating solutions and sol-gels, and corresponding methods for making a substrate radioactive by the application of the radioactive coating solutions and sol-gels thereto. The radioactive coating solution comprises at least one carrier metal and a radioisotope, which may be soluble or insoluble, and may further comprise a reducing agent. The radioactive sol-gel comprises at least one metal alkoxide and a radioisotope, which may be soluble or insoluble. Methods of making a substrate radioactive by coating with radioactive coating solutions or sol-gels are also disclosed, including electrodeposition, electroless deposition, spin coating and dip coating. In a particular embodiment, the radioactive coating formed by the method is a composite coating. Radioactive substrates are also disclosed, comprising a substrate and one or more radioactive coatings, which coatings may be the same or different.Type: GrantFiled: August 31, 1999Date of Patent: November 5, 2002Assignee: Radiovascular Systems, L.L.C.Inventors: Janet M. Hampikian, Neal A. Scott
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Patent number: 6472023Abstract: A process for the fabrication of submicron copper interconnection useful on IC structures without deposition of copper seed is described. A dense metal layer can be deposited through contact displacement reaction between diffusion barrier layer and metal ions in solution under appropriate conditions. The metal layer formed by the displacement deposition can serve as the conducting material for subsequent copper electroplating. Moreover, the costly process for applying seed layer through CVD or PVD can be eliminated.Type: GrantFiled: July 10, 2001Date of Patent: October 29, 2002Assignee: Chang Chun Petrochemical Co., Ltd.Inventors: Yang Wu, Chi-Chao Wan