With Posttreatment Of Coating Or Coating Material Patents (Class 427/98.2)
  • Patent number: 11602766
    Abstract: An electronic component manufacturing method includes a blotting process of bringing a conductive paste applied to an end portion of each electronic component body held by a jig into contact with a surface of a surface plate. The blotting process includes simultaneous performance of a distance changing process of changing the distance between an end face of each electronic component body and the surface of the surface plate and a position changing process of changing a two-dimensional position where the end face of the electronic component body is projected on the surface of the surface plate in such a manner that the direction of the movement of two-dimensional position in parallel to the surface of the surface plate successively varies (e.g., along a circular path).
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: March 14, 2023
    Assignee: Creative Coatings Co., Ltd.
    Inventors: Eiji Sato, Hitoshi Sakamoto
  • Publication number: 20150136466
    Abstract: Disclosed herein are a printed circuit board and a method for manufacturing the same. According to a preferred embodiment of the present invention, the printed circuit board includes: an insulating layer having a connection pad; and a resist layer formed on the insulating layer and provided with an opening so that the connection pad is exposed, wherein a wall surface of an opening of the resist layer may have at least one protrusion.
    Type: Application
    Filed: May 12, 2014
    Publication date: May 21, 2015
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventor: Jung Youn PANG
  • Patent number: 8808791
    Abstract: A method is provided which includes forming a metal layer and converting at least a portion of the metal layer to a hydrated metal oxide layer. Another method is provided which includes selectively depositing a dielectric layer upon another dielectric layer and selectively depositing a metal layer adjacent to the dielectric layer. Consequently, a microelectronic topography is formed which includes a metal feature and an adjacent dielectric portion comprising lower and upper layers of hydrophilic and hydrophobic material, respectively. A topography including a metal feature having a single layer with at least four elements lining a lower surface and sidewalls of the metal feature is also provided herein. The fluid/s used to form such a single layer may be analyzed by test equipment configured to measure the concentration of all four elements. In some cases, the composition of the fluid/s may be adjusted based upon the analysis.
    Type: Grant
    Filed: October 17, 2013
    Date of Patent: August 19, 2014
    Assignee: Lam Research Corporation
    Inventors: Igor C. Ivanov, Weiguo Zhang, Artur Kolics
  • Patent number: 8603574
    Abstract: A method of forming a curved touch surface is disclosed. The method can include depositing and patterning a conductive thin film on a flexible substrate to form at least one touch sensor pattern, while the flexible substrate is in a flat state. According to certain embodiments, the method can include supporting the flexible substrate in the flat state on at least one curved forming substrate having a predetermined curvature; and performing an anneal process, or an anneal-like high-heat process, on the conductive thin film, wherein the anneal process can cause the flexible substrate to conform to the predetermined curvature of the at least one curved forming substrate. According to an embodiment, the curved forming substrate can include a first forming substrate having a first predetermined curvature and a second forming substrate having a second predetermined curvature complementing the first predetermined curvature.
    Type: Grant
    Filed: November 5, 2010
    Date of Patent: December 10, 2013
    Assignee: Apple Inc.
    Inventors: Lili Huang, Seung Jae Hong, John Z. Zhong
  • Publication number: 20130313009
    Abstract: A method of manufacturing a printed circuit board (PCB) and the PCB are provided. The method includes: filling a resin in a via-hole formed at a substrate from one surface side of the substrate; emitting light for a predetermined period of time to the resin filled in the via-hole from the other surface side of the substrate; and applying another resin on the other surface of the substrate.
    Type: Application
    Filed: September 5, 2012
    Publication date: November 28, 2013
    Applicant: SAMSUNG TECHWIN CO., LTD.
    Inventors: Jeong-Hoon Seol, Youn-Kwon Jung, Sang-Kun Kim
  • Patent number: 8586133
    Abstract: A method is provided which includes forming a metal layer and converting at least a portion of the metal layer to a hydrated metal oxide layer. Another method is provided which includes selectively depositing a dielectric layer upon another dielectric layer and selectively depositing a metal layer adjacent to the dielectric layer. Consequently, a microelectronic topography is formed which includes a metal feature and an adjacent dielectric portion comprising lower and upper layers of hydrophilic and hydrophobic material, respectively. A topography including a metal feature having a single layer with at least four elements lining a lower surface and sidewalls of the metal feature is also provided herein. The fluid/s used to form such a single layer may be analyzed by test equipment configured to measure the concentration of all four elements. In some cases, the composition of the fluid/s may be adjusted based upon the analysis.
    Type: Grant
    Filed: July 2, 2012
    Date of Patent: November 19, 2013
    Assignee: Lam Research Corporation
    Inventors: Igor C. Ivanov, Weiguo Zhang, Artur Kolics
  • Publication number: 20120256707
    Abstract: Various embodiments of millimeter-wave systems on a printed circuit board, including a microstrip, a probe, and an RF integrated circuit, as well as methods for manufacturing said systems. Various embodiments have holes extending through lamina in the PCB, thereby improving radiation propagation. Various embodiments have conductive cages created by multiple through-holes extending through lamina in the PCB, thereby increasing radiation propagation. The manufacture of such systems is easier and less expensive than the manufacture of current systems.
    Type: Application
    Filed: June 20, 2012
    Publication date: October 11, 2012
    Applicant: Siklu Communication Ltd.
    Inventors: Yigal Leiba, Elad Dayan
  • Patent number: 8216503
    Abstract: A method for manufacturing a printed circuit board, in which an oxidant capable of polymerizing conductive polymers is selectively marked on a board using imprinting, and the monomer of a conductive polymer is filled in the selected pattern and polymerized, to provide a conductive polymer wiring pattern. With the method for manufacturing a printed circuit board, a printed circuit board can be given finer wiring widths to allow a highly integrated, highly efficient printed circuit board. Thus, a printed circuit board (PCB) or a flexible printed circuit boards (FPCB) can be manufactured that is applicable to industrial, clerical, and domestic electric electronic products, by forming conductive polymer wiring using imprinting.
    Type: Grant
    Filed: June 28, 2007
    Date of Patent: July 10, 2012
    Assignee: Samsung Electro-Mechanics Co., Ltd.
    Inventors: Jae-Choon Cho, Myeong-Ho Hong, Senug-Hyun Ra, Hyuk-Soo Lee, Jeong-Bok Kwak, Jung-Woo Lee, Choon-Keun Lee, Sang-Moon Lee
  • Patent number: 8075945
    Abstract: In a coating method, such as a droplet discharge method which requires baking, it is an object of the present invention to reduce the baking temperature at the time of forming a wiring and a conductive film. As a feature of the present invention, a composition, in which nanoparticles of a conductive material are dispersed in a solvent, is discharged using a droplet discharge method, and then dried to vaporize the solvent. Then, pretreatment using active oxygen is performed. After which, baking is then performed, whereby a wiring and a conductive film are formed. By performance of the pretreatment by active oxygen before the baking, a baking temperature at the time of forming the wiring and conductive film can be reduced.
    Type: Grant
    Filed: February 27, 2008
    Date of Patent: December 13, 2011
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Kensuke Yoshizumi, Noriko Harima, Tomoko Yamada
  • Patent number: 7867550
    Abstract: According to the present invention, when the electrode for electrochemical devices is fabricated, the treating method for removing off a binder solvent adsorbed to pores in an electrode-constituting activated charcoal or the like, using carbon dioxide in a supercritical state, is used or a method wherein the supercritical-state treating method is modified using a low-boiling solvent is used, whereby the electrostatic capacity of the carbonaceous material as the active substance and the reliability of the electro-chemical device can be improved.
    Type: Grant
    Filed: July 18, 2006
    Date of Patent: January 11, 2011
    Assignee: TDK Corporation
    Inventors: Hisashi Suzuki, Katsuo Naoi
  • Publication number: 20090294169
    Abstract: A printed circuit board includes a through hole constituted by a hole penetrating through the front and rear surfaces of the printed circuit board. A fabrication method of the printed circuit board, includes applying conductive material plating to the inner wall surface of the hole to form a through hole electrically connecting the front and rear surfaces of the printed circuit board, and removing the conductive material plated on the hole inner wall surface at least at a portion between the front and rear surfaces of the printed circuit board is carried out to thereby fabricate a printed circuit board having a through hole electrically isolates the front surface of the printed circuit board from the rear surface thereof.
    Type: Application
    Filed: February 2, 2009
    Publication date: December 3, 2009
    Applicant: FUJITSU LIMITED
    Inventors: Daita TSUBAMOTO, Hitoshi YOKEMURA, Masaki TOSAKA
  • Patent number: 7575776
    Abstract: A phase changeable memory element is formed by conformally forming a phase changeable material film in a contact hole on a substrate so as to create a void in the phase changeable material film in the contact hole. A capping film is formed on the phase changeable material film, and the void is at least partially closed by a thermal treatment that is sufficient to reflow the phase changeable material film in the void.
    Type: Grant
    Filed: August 23, 2007
    Date of Patent: August 18, 2009
    Assignee: Samsung Electronics Co., Ltd.
    Inventor: Hideki Horii
  • Patent number: 7425347
    Abstract: The present invention relates to a composition for forming anti-reflective coating for use in a lithography process in manufacture of a semiconductor device which comprises polymer (A) having a weight average molecular weight of 5,000 or less, and a polymer (B) having a weight average molecular weight of 20,000 or more. The composition provides an anti-reflective coating for use in a lithography which is excellent in step coverage on a substrate with an irregular surface, such as hole or trench, has a high anti-reflection effect, causes no intermixing with a resist layer, provides an excellent resist pattern, and has a higher dry etching rate compared with the resist layer.
    Type: Grant
    Filed: October 4, 2002
    Date of Patent: September 16, 2008
    Assignee: Nissan Chemical Industries, Ltd
    Inventors: Satoshi Takei, Yoshiaki Yasumi, Ken-ichi Mizusawa
  • Publication number: 20080008824
    Abstract: The present invention relates to a method for manufacturing a printed circuit board, more particularly to a method for manufacturing a printed circuit board, in which an oxidant capable of polymerizing conductive polymers is selectively marked on a board using imprinting, and the monomer of a conductive polymer is filled in the selected pattern and polymerized, to provide a conductive polymer wiring pattern. With the method for manufacturing a printed circuit board according to certain aspects of the invention as set forth above, a printed circuit board can be given finer wiring widths to allow a highly integrated, highly efficient printed circuit board. Thus, a printed circuit board (PCB) or a flexible printed circuit boards (FPCB) can be manufactured that is applicable to industrial, clerical, and domestic electric electronic products, by a new technique of forming conductive polymer wiring using imprinting.
    Type: Application
    Filed: June 28, 2007
    Publication date: January 10, 2008
    Applicant: SAMSUNG ELECTRO-MECHANICS CO., LTD.
    Inventors: Jae-Choon Cho, Myeong-Ho Hong, Senug-Hyun Ra, Hyuk-Soo Lee, Jeong-Bok Kwak, Jung-Woo Lee, Choon-Keun Lee, Sang-Moon Lee
  • Patent number: 7255782
    Abstract: A process of providing a pattern of a metal on a non-conductive substrate to create loop antennae for wireless articles and for creating circuitry for smart cards, such as phone cards is provided. The method comprises the steps of catalyzing the non-conductive substrate by applying a catalytic ink, reducing a source of catalytic metal ions in the catalytic ink to its associated metal, depositing electroless metal on the pattern of catalytic ink on the surface of the substrate; and plating electrolytic metal on the electroless metal layer to produce the desired pattern of metal on the non-conductive substrate. The catalytic ink typically comprises one or more solvents, a source of catalytic metal ions, a crosslinking agent, one or more copolymers, a polyurethane polymer, and, optionally, one or more fillers.
    Type: Grant
    Filed: April 30, 2004
    Date of Patent: August 14, 2007
    Inventor: Kenneth Crouse
  • Patent number: 7201022
    Abstract: Methods of reducing the intrusions or migrations of photolithography materials by introducing a sol-gel layer onto a porous thin film prior to applying the photolithography/photoresist material layer. Curing the sol-gel layer results in the sol-gel layer merging or unifying with the underlying porous thin film layer so that the combined sol-gel/thin layer exhibits substantially the same properties as the untreated porous thin film layer before the sol-gel was applied. As a result, a greater etching accuracy is achieved.
    Type: Grant
    Filed: June 17, 2005
    Date of Patent: April 10, 2007
    Assignee: Xerox Corporation
    Inventors: James Charles Zesch, Joost J. Vlassak
  • Patent number: 7045198
    Abstract: The present invention provides a prepreg and a circuit board that can achieve, e.g., low interstitial via connection resistance, excellent connection stability, and high durability, regardless of materials, physical properties, and a combination of the materials of an insulating layer. The present invention also provides a method for manufacturing the prepreg and the circuit board. The prepreg of the present invention includes a laminate including at least one first layer and at least one second layer. The first layer is an insulating layer that includes a resin. The second layer has pores that connect an upper and a lower surface of the second layer, and the upper and the lower surface of the second layer differ from each other in at least one selected from open are ratio and average pore diameter. Using this prepreg makes it possible to provide a circuit board that is characterized, e.g., by low interstitial via connection resistance, excellent connection stability, and high durability.
    Type: Grant
    Filed: October 24, 2002
    Date of Patent: May 16, 2006
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Yasushi Nakagiri, Takeshi Suzuki, Fumio Echigo
  • Patent number: 6849294
    Abstract: A circuit pattern fabrication method of a printed circuit board includes: a first step of forming a resin layer at a surface of an insulation material; a second step of selectively removing the resin layer; a third step of forming a metal plated layer at the surface of the resin layer-removed portion of the insulation material to form circuit patterns and a connection pad; and a fourth step of forming a gold plated layer on the connection pad. By doing that, a fine circuit pattern can be easily formed.
    Type: Grant
    Filed: June 9, 2003
    Date of Patent: February 1, 2005
    Assignee: LG Electronics Inc.
    Inventor: Sung-Gue Lee