Printed Circuit Patents (Class 428/901)
  • Publication number: 20030035979
    Abstract: A polarized organic photonics device, including an LED or photovoltaic device, is comprised of a first conductive layer or electrode coated with a friction transferred alignment material, a photoactive material, and a second electrically conductive layer or electrode. The alignment material provides for the orientation of the subsequently deposited photoactive material such that the photoactive material interacts with or emits light preferentially along a selected polarization axis. Additional layers and sublayers optimize and tune the optical and electronic responses of the device.
    Type: Application
    Filed: October 8, 2002
    Publication date: February 20, 2003
    Inventors: Xiaochun Linda Chen, Zhenan Bao
  • Patent number: 6521328
    Abstract: The present invention is a persulfate etchant composition especially useful for dissolving copper during fabrication of microelectronic packages. The etchant is characterized by its ability to selectively etch copper in the presence of nickel, nickel-phosphorous and noble metal alloys therefrom. Furthermore, no deleterious galvanic etching occurs in this etchant-substrate system so that substantially no undercutting of the copper occurs. The combination of high selectivity and no undercutting allows for a simplification of the microelectronic fabrication process and significant improvements in the design features of the microelectronic package, in particular higher density circuits. The persulfate etchant composition is stabilized with acid and phosphate salts to provide a process that is stable, fast acting, environmentally acceptable, has high capacity, and can be performed at room temperature. A preferred etchant composition is 230 gm/liter sodium persulfate, 3 volume % phosphoric acid and 0.
    Type: Grant
    Filed: September 5, 2000
    Date of Patent: February 18, 2003
    Assignee: International Business Machines Corporation
    Inventors: John M. Lauffer, Kathleen L. Covert, Peter A. Moschak
  • Patent number: 6519161
    Abstract: A packaged electronic circuit using molded plastics, Thick Film, and Polymer Thick Film technology, and achieving shielding of the circuitry and components of the package. In this invention at least one of electronic devices in the package is supported in a molded pocket in the molded substrate, and circuit traces are added to the surface of the substrate and the electronic device, simultaneously creating the circuit traces and making the interconnections with the components at the same time. Shielding, which is optional, can easily be printed over the planar surface of the circuit traces and components.
    Type: Grant
    Filed: June 30, 2000
    Date of Patent: February 11, 2003
    Inventor: William J. Green
  • Patent number: 6519157
    Abstract: Disclosed are systems and methods which utilize mounting members adapted to provide consistent compressive pressure with respect to strata of a laminated structure, such as the heat source, TEC, and heat absorbing layers of a TEC stack-up, throughout a range of operating temperatures. Preferably, mounting members of the present invention are adapted to provide uniform compressive pressure across a surface area, such as the heat transferring surfaces of a TEC, to thereby provide a sound structure which is relatively resistant to dynamic forces. Preferred embodiment mounting members are adapted to minimize the transfer of thermal energy therethrough, such as to substantially avoid a heat leak in a TEC stack-up configuration.
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: February 11, 2003
    Assignee: nLight Photonics Corporation
    Inventor: Andrew Xing
  • Patent number: 6517924
    Abstract: The present invention provides a laminated body, comprising: a first sheet layer comprising an aggregate of a first powder, at least a part of the first powder being in a sintered state; a second sheet layer disposed so as to make contact with the first sheet layer and comprising an aggregate of a second powder, the second powder being in a non-sintered state; and the first powder and the second powder being solidified to each other by allowing a part of the first sheet layer material to diffuse or to flow into the second sheet layer.
    Type: Grant
    Filed: April 28, 1999
    Date of Patent: February 11, 2003
    Assignee: Murata Manufacturing Co. Ltd
    Inventors: Hirokazu Kameda, Shuya Nakao, Kenji Tanaka
  • Publication number: 20030024666
    Abstract: The invention provides fluororesin fiber paper excellent in adhesion to a copper foil, heat resistance, chemical resistance, low water absorption and electric insulation and capable of being used as a substrate of a printed board suitable for use in high frequency, of which a low dielectric loss is required. The fluororesin fiber paper is a porous sheet obtained by forming a slurry comprising fluororesin fiber into a sheet by a wet paper making method and sintering the resultant sheet and has an average pore diameter of 0.5 to 50 &mgr;m and a maximum pore diameter of at most 250 &mgr;m. A copper-clad laminate for printed board is produced by laminating the fluororesin fiber paper and a copper foil having a ten point mean height of surface roughness profile (Rz) of 0.5 to 8.0 &mgr;m on each other by means of vacuum hot pressing.
    Type: Application
    Filed: July 31, 2002
    Publication date: February 6, 2003
    Applicant: TOMOEGAWA PAPER CO., LTD.
    Inventors: Takanori Suzuki, Hajime Tsuda
  • Publication number: 20030026962
    Abstract: A method of forming a magnetic body, alternative to a ferrite core, on a printed circuit board is provided. A printed circuit board is set in a mold and injection molding is conducted. The mold comprises a fixed plate, an intermediate plate and a movable plate. A cavity in the intermediate plate is filled with a melted material (i.e., mixture of resin and magnetic filler) supplied via a sprue and a runner. A cavity in the movable plate is also filled with the material supplied to the cavity in the intermediate plate through a hole in the printed circuit board. When a magnetic body for noise control is directly injection molded onto the printed circuit board in such a way, no gap appears between the magnetic body and the printed circuit board. As a result, the magnetic body functions well as desired.
    Type: Application
    Filed: July 30, 2002
    Publication date: February 6, 2003
    Inventors: Hideharu Kawai, Toru Matsuzaki
  • Publication number: 20030021968
    Abstract: A method and structure to form a conductive pattern on a ceramic sheet deposits a photosensitive conductive material on a carrier and exposes a pattern of x-ray energy on the material and sinters the carrier and the material to the ceramic sheet so that only the conductive pattern of the material remains on the ceramic sheet. The structure has a conductive patterned material which includes a photosensitive agent.
    Type: Application
    Filed: July 24, 2001
    Publication date: January 30, 2003
    Inventors: Lawrence A. Clevenger, David B. Goland, Louis L. Hsu, Joseph F. Shepard, Subhash L. Shinde
  • Publication number: 20030017324
    Abstract: A method and system of reversibly absorbing liquid penetrations into electronic devices having a body and circuitry is described. The method and system comprises providing an absorbent sponge membrane structure in sheet-like form. The structure contains a hydrogel-forming core integrated into a blown polymer foam. The method and system includes placing the absorbent structure within the electronic device such that the hydrogel-forming core and blown polymer foam at least partly covers the electronic circuitry to be protected. A method and system in accordance with the present invention has the further advantage that due to the inclusion of the crystals into the open cells of the sponge, that structure is much easier to manufacture into various templates by punching or stamping holes where the keys and other mechanical obstructions such as bosses and supports must be accommodated.
    Type: Application
    Filed: July 17, 2001
    Publication date: January 23, 2003
    Applicant: International Business Machines Corporation
    Inventors: James Lee Chao, Charles C. Sloop
  • Publication number: 20030015277
    Abstract: A process for the manufacture of a multilayer ceramic substrate includes fabricating the multilayer ceramic substrate from a monolith fabricated from universal layers and a monolith fabricated from custom layers. The universal layer monolith and the custom layer monolith are then joined to form the complete structure of the MLC substrate.
    Type: Application
    Filed: July 17, 2001
    Publication date: January 23, 2003
    Applicant: International Business Machines Corporation
    Inventors: Christopher D. Setzer, Harsaran S. Bahatia, Raymond M. Bryant, Michael S. Cranmer, Suresh Kadakia, Richard O. Seeger, Satyapal Singh Bhatia
  • Patent number: 6506831
    Abstract: A process for forming a planarization film on a substrate that does not smoke or fume on heating includes applying a polymeric solution including a novolac resin having a weight average molecular weight between about 1000 and 3000 amu, which has been fractionated to remove molecules with molecular weight below about 350 amu, a surfactant selected from a group consisting of a non-fluorinated hydrocarbon, a fluorinated hydrocarbon and combinations thereof, and an optional organic solvent to a substrate, followed by heating the substrate.
    Type: Grant
    Filed: December 2, 1998
    Date of Patent: January 14, 2003
    Assignee: Honeywell International Inc.
    Inventors: Nigel Hacker, Todd Krajewski, Richard Spear
  • Publication number: 20030008156
    Abstract: A composition for electrophoretic deposition of a protective coating. The composition comprises a cationic resin emulsion; and a curative mixed with the cationic resin emulsion. The composition after electrophoretic deposition and curing provides the protective coating that has a concentration of extractable ionic contaminants less than about 200 nanograms/cm2; and a concentration of labile components less than about 36,000 nanograms/cm2.
    Type: Application
    Filed: June 26, 2001
    Publication date: January 9, 2003
    Applicant: 3M Innovative Properties Company
    Inventors: Alphonsus V. Pocius, Rita A. Latourelle
  • Publication number: 20030007328
    Abstract: The present invention relates to a cooling device for electronic components, in particular for cooling microprocessors, which has at least one passive thermo-conducting cooling element 12, wherein at least part of said passive cooling element 12 contacts at least one heat transfer medium 20 which is in a solid state of aggregation. Said heat transfer medium 20 in this case is a phase change material (PCM) which has a much higher heat absorption capacity than water and which is, moreover, designed as a latent heat accumulator, which heat transfer medium 20 will store the amount of heat generated by the load on said electronic component that can no longer be absorbed and carried off by said passive cooling element 18, at the same time retaining its solid state of aggregation, and release said heat again at a time when the load on said electronic component is lower.
    Type: Application
    Filed: February 26, 2002
    Publication date: January 9, 2003
    Inventor: Ulrich Fischer
  • Patent number: 6500546
    Abstract: Curable flame-resistant substantially halogen free epoxy resin compositions, comprising: (a) one or more bifunctional or polyfunctional epoxy resin; (b) a specific phosphorous-containing compound; (c) a curing agent consisting of oligomers of styrene and maleic acid and/or maleic anhydride and/or salts or esters of maleic acid; (d) a curing catalyst; and optionally; (e) additives; prepregs derived from said compositions and laminates derived from said prepregs.
    Type: Grant
    Filed: November 1, 2000
    Date of Patent: December 31, 2002
    Assignee: Resolution Performance Products LLC
    Inventors: Francoise Marie Louise Heine, Jean Andre Alfred Riviere, Philippe Eric Stevens, Helga Leontina Andrea De Velder
  • Publication number: 20020197492
    Abstract: A process of selectively plating a metal pattern on the surface of a plastic component allows intricate and/or fine patterns of metal to be precisely electroplated onto either a two-dimensional or three-dimensional contoured surface of a plastic article or substrate. The selective metal plating may be either a decorative pattern or a functional pattern, such as for an electrical circuit. The process generally comprises electrolessly depositing a metal coating on the surface of a plastic component, depositing a photoresist coating over the electrolessly deposited metal, imaging and developing the photoresist coating to form a desired patterned photoresist, electroplating a metal on the electrolessly deposited metal that is exposed through the developed photoresist pattern, and stripping the cured photoresist coating and electrolessly deposited metal underneath the cured photoresist coating without damaging the decorative or functional electroplating.
    Type: Application
    Filed: June 25, 2001
    Publication date: December 26, 2002
    Inventors: Ling Hao, Lawrence P. Donovan
  • Patent number: 6495239
    Abstract: A dielectric structure, wherein two fully cured photoimageable dielectric (PID) layers of the structure are nonadhesively interfaced by a partially cured PID layer. The partially cured PID layer includes a power plane sandwiched between a first partially cured PID sheet and a second partially cured PID sheet. The fully cured PID layers each include an internal power plane, a plated via having a blind end conductively coupled to the internal power plane, and a plated via passing through the fully cured PID layer. The dielectric structure may further include a first PID film partially cured and nonadhesively coupled to one of the fully cured PID layers. The dialectric structure may further include a second PID film partially cured and nonadhesively coupled to the other fully cured PID layer.
    Type: Grant
    Filed: December 10, 1999
    Date of Patent: December 17, 2002
    Assignee: International Business Corporation
    Inventors: Anilkumar C. Bhatt, Stephen J. Fuerniss, Roy H. Magnuson, Voya R. Markovich
  • Patent number: 6495244
    Abstract: This invention relates to printed circuit boards having improved fire resistance and improved environmental stability. The invention provides halogen-free fire retardant printed circuit boards incorporating potentially flammable polymers. Flame resistant thermoplastic layers prevent combustion of thermosetting polymers, as well as adding strength to the laminate, resulting in a less brittle thin core than the prior art. The flame resistant circuit board is cost efficient, environmentally safe and has excellent properties, including a decreased probability of shorting, good dielectric breakdown voltage, a smooth surface and good electrical/thermal performance.
    Type: Grant
    Filed: September 7, 2000
    Date of Patent: December 17, 2002
    Assignee: Oak-Mitsui, Inc.
    Inventors: John A. Andresakis, Dave Paturel
  • Patent number: 6495069
    Abstract: A polymer composition comprises at least one substantially non-conductive polymer and at least one electrically conductive filler and in the form of granules, the granules preferably being in the size range up to 1 mm and more preferably between 0.04 mm and 0.2 mm, with the volume ratio of conductor to polymer preferably being at least 3:1.
    Type: Grant
    Filed: July 24, 2000
    Date of Patent: December 17, 2002
    Assignee: Peratech Limited of a Company of Great Britain and Northern Ireland
    Inventors: David Lussey, Andrew Brian King, Christopher John Lussey
  • Publication number: 20020185303
    Abstract: The invention relates to a wiring circuit board including an electronic device disposed in a hole of the wiring circuit board; a resin filling the hole such that the electronic device is embedded in the resin; a wiring layer formed on the resin; and an interface between the resin and the wiring layer. This interface has a roughness in a range of 2-6 &mgr;m in terms of ten-point mean roughness.
    Type: Application
    Filed: March 4, 2002
    Publication date: December 12, 2002
    Applicant: NGK SPARK PLUG CO., LTD.
    Inventors: Hiroki Takeuchi, Toshifumi Kojima, Kazushige Obayashi
  • Patent number: 6492008
    Abstract: The thermal expansion coefficient of a composite insulator layer is adjusted in order to suppress warping deformation in a multilayer printed wiring board caused by temperature change. The thicknesses and the covering ratios on the both sides of the electric conductor layer composing the multilayer printed wiring board are asymmetric with respect to the central plane. A multilayer printed wiring board is formed by laminating composite insulation layers and laminated bodies, the composite insulation layer being made of a cloth a resin impregnated into the cloth, the laminated body being composed of electric conductor layers formed by coating on a surface of the composite insulation layer. The thermal expansion coefficient of the composite insulation layer having a conductor layer with a higher covering ratio is set to be smaller than the thermal expansion coefficient of the composite insulation layer having a conductor layer with a lower covering ratio.
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: December 10, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Shigeo Amagi, Satoshi Murakawa
  • Patent number: 6492007
    Abstract: With a multi-layer printed circuit bare board has 2n circuit layers, where n is a natural number exceeding a unity, electrical connections are established between the (2i−1)-th layer and the 2i-th layer, where i=1, 2 . . . , n, by holes which are created through insulation material layers in between and filled with copper plating. Electrical connections are also accomplished between the 4i-th layer and the (4i−3)-th layer by holes created through insulation material layers in between and filled with copper plating. Higher dimensional accuracy and fewer process steps are achieved.
    Type: Grant
    Filed: September 20, 2000
    Date of Patent: December 10, 2002
    Assignee: Oki Printed Circuits Co., Ltd.
    Inventor: Hiroshi Iinaga
  • Patent number: 6492599
    Abstract: In a multilayer wiring board comprising: an insulating board (for example, a glass board 1); and a wiring layer (for example, wiring patterns 2a, 5a and 8a) superimposed on the insulating board through an insulating film (for example, insulating films 3 and 6), a sum (total film thickness) d (&mgr;m) of the thickness of the insulating films 3 and 6 and the internal stress f (MPa) of the insulating film satisfy the following relational expression (1): d×<700(MPa·&mgr;m)  (1)
    Type: Grant
    Filed: September 12, 2000
    Date of Patent: December 10, 2002
    Assignee: Hoya Corporation
    Inventor: Osamu Sugihara
  • Patent number: 6489012
    Abstract: A printed circuit board for high speed processing devices such as RAMBUS is disclosed. Adhesive means are interposed between a plurality of both-face copper clad laminates, and each of the adhesive means consists of a clad laminate and prepreg layers formed on both faces of the clad laminate. The sum total of the thicknesses of the clad laminates and the prepreg layers is smaller than that of the conventional printed circuit board. Therefore, when carrying out a pressing to attach the copper foils, the thickness deviations are decreased compared with the conventional case, and therefore, the occurrence of impedance defects can be prevented.
    Type: Grant
    Filed: October 20, 2000
    Date of Patent: December 3, 2002
    Assignee: Samsung Electro-Mechanics Co., LTD
    Inventors: Deok Jin Yang, Keon Yang Park, Byong Ho Lee, Yang Je Lee, Myong Gun Chong
  • Patent number: 6489014
    Abstract: A wiring board with high reliability capable of effectively preventing the occurrence of migration includes a substrate 1, a glass layer 2 deposited on the top face of the substrate 1, a plurality of conductive layers 3 deposited on the surface of the glass layer 2, and a plurality of plating layers 4 correspondingly deposited for covering the surface of each of the conductive layers 3. The glass layer 2 is partially protruded so as to surround and to overlap both sides of each conductive layer 3, and top ends of the protruded portions 2a are interposed between the conductive layer 3 and the plating layer 4. Even when a large difference in potentials is created between the adjacent conductive layers 3, 3 while the wiring board is used, the protruded portions 2a of the glass layer 2 sufficiently prevents the growth of the metal toward the adjacent conductive layer 3, and effectively prevents the occurrence of migration.
    Type: Grant
    Filed: January 30, 2002
    Date of Patent: December 3, 2002
    Assignee: Kyocera Corporation
    Inventors: Akitoshi Tomiyama, Yasuhiko Shigeta
  • Patent number: 6489042
    Abstract: An electronic circuit device comprising at least one substrate having a photoimageable covercoat, comprising at least 95 weight percent of at least one epoxy-modified aromatic vinyl-conjugated diene block copolymer and a catalyst comprising an onium salt selected from a triarylsulfonium salt and a diaryliodonium salt, wherein the covercoat is formed by solvent coating or extrusion and then heat laminated onto at least a portion of the substrate.
    Type: Grant
    Filed: October 18, 2001
    Date of Patent: December 3, 2002
    Assignee: 3M Innovative Properties Company
    Inventors: Ronald L. Imken, Robert S. Clough
  • Patent number: 6488795
    Abstract: A method of producing a multilayered ceramic substrate in which wiring conductors can be provided on both main surfaces and the density of the wiring conductors can be increased by a non-shrinkage process. In the producing method, a green composite laminated product in which metallic foils are arranged to cover both main surfaces of a green laminated structure comprising a plurality of ceramic green sheets on which conductive paste is coated for forming internal wiring conductors is burned. In this burning step, shrinkage of the ceramic green sheets is suppressed by the metallic foils in the direction of the main surfaces thereof. After burning, the metallic foils are patterned by etching based on photolithographic technology to form external conductor films.
    Type: Grant
    Filed: September 5, 2000
    Date of Patent: December 3, 2002
    Assignee: Murata Manufacturing Co. Ltd
    Inventor: Norio Sakai
  • Publication number: 20020177072
    Abstract: According to the present invention, an improved photoimagable cationically polymerizable epoxy based solder mask is provided that contains a non-brominated epoxy resin system and from about 0.1 to about 15 parts, by weight per 100 parts of resin system, of a cationic photoinitiator. The non-brominated epoxy-resin system has solids that are comprised of from about 10% to about 80% by weight, of a polyol resin having epoxy functionality; from about 0% to about 90% by weight of a polyepoxy resin; and from about 25% to about 85% by weight of an difunctional epoxy resin. Since the photosensitive cationically polymerizable epoxy based solder mask does not contain bromine, it is particularly advantageous halogens in waste processing chemicals or in incinerated scrap circuit boards are regulated by environmental concerns. The photosensitive cationically polymerizable non-brominated epoxy based solder mask has a glass transition temperature greater than about 100° C., preferably greater than about 110° C.
    Type: Application
    Filed: May 9, 2002
    Publication date: November 28, 2002
    Applicant: International Business Machines Corporation
    Inventors: Richard Allen Day, David John Russell, Donald Herman Glatzel
  • Patent number: 6486235
    Abstract: A halogen-tree, flame-retardant insulating epoxy resin composition which comprises (1) an epoxy resin, (2) a curing agent for the epoxy resin, (3) a phosphate of a resorcinol type, (4) aluminum hydroxide, and (5) a cure accelerator for the epoxy resin. The composition displays necessary flame retardant properties and sufficient insulating properties after the formation of an insulating layer in a circuit board, withstands a plating process, and does not cause the bleedout of the insulation layer formed. A circuit board with flame retardant properties comprising insulation layers formed of the epoxy resin composition is also disclosed.
    Type: Grant
    Filed: December 7, 2000
    Date of Patent: November 26, 2002
    Assignee: Fujitsu Limited
    Inventors: Nawalage Florence Cooray, Koji Tsukamoto, Takeshi Ishitsuka
  • Publication number: 20020170747
    Abstract: The present invention discloses a PCB comprising a substrate, at least one circuit layer and at least one insulating layer, characterized in that the PCB further comprises at least one embedded functional material such as a PTC, and NTC and ZTC material. If the PTC material is applied in the present invention, a normal resistance of the present invention will be substantially smaller than that of the conventional PTC protection apparatus since the area of the PTC material of the present invention is larger than that of the conventional PTC protection apparatus. Moreover, through an electrically conductive hole, an upper electrode and a lower electrode respectively lying on top and bottom surfaces of the functional material are respectively connected with an apparatus mounted on a surface of the PCB to form a conductive circuit. Thus, at least one over-current protection apparatus which is usually mounted on the surface of the PCB is eliminated, and the surface utilization rate of the PCB is improved.
    Type: Application
    Filed: February 5, 2002
    Publication date: November 21, 2002
    Inventors: Edward Fu-Hua Chu, Yun-Ching Ma, David Shau-Chew Wang
  • Patent number: 6479615
    Abstract: The polyamic acid of the invention can be obtained by the reaction of an acid anhydride component comprising pyromellitic anhydride and 2,2-bis(3,4-dicarboxyphenyl)hexafluoropropane with 2,2′-di-substituted-4,4′-diaminobiphenyls as a first aromatic diamine and any aromatic diamine component, as a second aromatic diamine, of 2,2-bis(4-aminophenoxyphenyl)propanes, 1,1-bis(4-(4-aminophenoxy)-3-t-butyl-6-methylphenyl)butane, 2,2-bis(3-amino-4-methylphenyl)hexafluoropropane and &agr;,&agr;′-bis(4-aminophenyl)diisopropylbenzenes in an organic solvent. The polyimide resin of the invention can be obtained by heating such a polyamic acid solution. In the production of a circuit board, by using a photosensitive polyamic acid having a sensitizer incorporated in such a polyamic acid solution, a patterned polyimide resin layer can be provided as an insulation layer on a metal foil.
    Type: Grant
    Filed: December 11, 2000
    Date of Patent: November 12, 2002
    Assignee: Nitto Denko Corporation
    Inventors: Takahiro Fukuoka, Amane Mochizuki, Naoki Kurata, Naotaka Kinjo, Toshihiko Omote
  • Patent number: 6480395
    Abstract: A printed circuit board (PCB) includes a first layer having first and second surfaces, with an above-board device mounted thereon. The PCB includes a second layer having third and fourth surfaces. One of the surfaces can include a recessed portion for securedly holding an interstitial component. A via, electrically connecting the PCB layers, is also coupled to a lead of the interstitial component.
    Type: Grant
    Filed: May 25, 2000
    Date of Patent: November 12, 2002
    Assignee: Hewlett-Packard Company
    Inventor: Dale R. Kopf
  • Patent number: 6475314
    Abstract: An adhesive lamination has patches of an adhesive layer which correspond to predetermined positions on a plurality of circuit boards, and the adhesive layer is applied across the plurality of circuit boards. This adhesive lamination is composed of a first separation sheet, a second separation sheet and the adhesive layer interposed between the first and second separation sheets. A number of patches of the adhesive layer are formed on the first separation sheet and arranged so that the length of the patch of the adhesive layer is approximately parallel to the short side of the first separation sheet.
    Type: Grant
    Filed: October 31, 1996
    Date of Patent: November 5, 2002
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Shirai Yoshihiro, Tani Shinichi
  • Patent number: 6475701
    Abstract: There is provided an active energy beam curable composition, which is useful for forming a solder resist film for a printed wiring board, which can be developed through an ultraviolet exposure and a dilute alkali aqueous solution, and is excel lent in heat resistance, adhesivity and chemical resistance. There is also proposed a printed wiring board provided with a cured film of such an active energy beam curable composition. This composition is featured in that it comprises not only an active energy beam curable vinyl copolymer modified resin wherein an epoxy compound having an ethylenic unsaturated group is added to a copolymer comprising styrene, (metha)acrylic acid, and, as an optional component, (metha)acrylate; but also an active energy beam curable bisphenol type epoxyacrylate resin.
    Type: Grant
    Filed: February 12, 2001
    Date of Patent: November 5, 2002
    Assignee: Tamura Kaken Corporation
    Inventors: Takao Ohno, Ken Ito, Ichiro Miura
  • Patent number: 6472065
    Abstract: A radiation detackifiable adhesive composition comprising a (meth)acrylate copolymer including from about 85 wt. % to about 97.5 wt. % of a (meth)acrylate ester and from about 2.5 wt. % to about 15 wt. % of a copolymerizable carboxylate monomer and a multi-functional urethane acrylate oligomer combined with the (meth)acrylate copolymer to provide from about 25 parts to about 40 parts of the oligomer per 100 parts of the copolymer. The adhesive composition becomes progressively detackified during exposure to ultraviolet radiation. The present invention further provides a clear adhesive coated sheet for supporting a silicon wafer during manufacture of semiconductor microchips. The coated sheet comprises a transparent film substrate coated with a radiation detackifiable adhesive composition.
    Type: Grant
    Filed: July 13, 2000
    Date of Patent: October 29, 2002
    Assignee: 3M Innovative Properties Company
    Inventors: Karunasena A. Alahapperuma, Steven S. Kantner
  • Patent number: 6468638
    Abstract: Apparatuses and methods for forming displays are claimed. One embodiment of the invention relates to depositing a plurality of blocks onto a substrate and is coupled to a flexible layer having interconnect deposited thereon. Another embodiment of the invention relates to forming a display along a length of a flexible layer wherein a slurry containing a plurality of elements with circuit elements thereon washes over the flexible layer and slides into recessed regions or holes found in the flexible layer. Interconnect is then deposited thereon. In another embodiment, interconnect is placed on the flexible layer followed by a slurry containing a plurality of elements.
    Type: Grant
    Filed: March 16, 1999
    Date of Patent: October 22, 2002
    Assignee: Alien Technology Corporation
    Inventors: Jeffrey Jay Jacobsen, Glenn Wilhelm Gengel, Mark A. Hadley, Gordon S. W. Craig, John Stephen Smith
  • Patent number: 6468665
    Abstract: Disclosed herein is a process for melt-bonding a molded article of a thermotropic liquid crystalline polyester with a metal, which comprises activating or irradiating a surface of a molded article of a thermotropic liquid crystalline polyester resin and melt-bonding the surface with a metal at or above the flow temperature of the thermotropic liquid crystalline polyester.
    Type: Grant
    Filed: December 15, 1999
    Date of Patent: October 22, 2002
    Assignee: Sumitomo Chemical Company, Limited
    Inventors: Tohru Nagashima, Hiroshi Nakamura
  • Patent number: 6468447
    Abstract: Provided is an electroconductive paste comprising copper powders, a glass powder, and an organic vehicle, wherein: the copper powders comprise (1) from about 50% to 90% by weight of a copper powder A containing from about 1% to 3% by weight of oxygen and having an average particle size of from about 0.9 to 1.5 &mgr;m; and (2) from about 10% to 50% by weight of a copper powder B containing from about 0.2% to 3% by weight of oxygen and having an average particle size of not more than about 0.6 &mgr;m. It has an excellent electroconductivity as well as a sufficiently large bonding strength to a board.
    Type: Grant
    Filed: April 25, 2001
    Date of Patent: October 22, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Shuji Matsumoto
  • Patent number: 6465083
    Abstract: A modified cyanate ester group curable resin composition, and varnishes, prepregs, laminated boards adhered with metal foil, films, printed circuit boards, and multilayered circuit boards using the same, comprising: (A) a cyanate ester group compound expressed by chemical formula (1), (where, R1 is and respective of and R2 and R3 is any one of hydrogen or methyl group, and the both can be the same or different from each other, (B) a monovalent phenolic group compound expressed by chemical formula (2), or formula (3), where R4 and R5 is any one of hydrogen atom or low alkyl group having 1 to 4 carbon atoms, and the both can be the same or different from each other, n is a positive integer of 1 or 2.  (where, R6 is or  (C) a polyphenylene ether resin,  (D) a flame retardant not reactive with the cyanate ester group compound, and  (E) a metal group reaction catalyst.
    Type: Grant
    Filed: September 20, 2000
    Date of Patent: October 15, 2002
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Shigeo Sase, Yasuyuki Mizuno, Takeshi Sugimura, Harumi Negishi
  • Patent number: 6465082
    Abstract: A stress relaxation type electronic component which is to be mounted on a circuit board, wherein a stress relaxation mechanism member is disposed on a surface of said electronic component, said surface being on a side of a connection portion where said electronic component is to be connected to said circuit board, and said stress relaxation mechanism member is electrically conductive.
    Type: Grant
    Filed: May 16, 2000
    Date of Patent: October 15, 2002
    Assignee: Matsushita Electric Industrial Co., Ltd.
    Inventors: Hiroaki Takezawa, Masahide Tsukamoto, Minehiro Itagaki, Yoshihiro Bessho, Hideo Hatanaka, Yasushi Fukumura, Kazuo Eda, Toru Ishida
  • Patent number: 6461540
    Abstract: A conductive paste for forming external electrodes of a multi-layer ceramic electronic component contains an Ag-based conductive component, an organic vehicle and a glass frit. The glass frit in the conductive paste contains B2O3, SiO2, PbO, and Al2O3. The total content of SiO2 and Al2O3 in the glass frit is in the range of about 40 to 56 molar percent, the SiO2 content being in the range of about 20 to 40 molar percent and the Al2O3 content being in the range of about 12 to 24 molar percent.
    Type: Grant
    Filed: March 20, 2001
    Date of Patent: October 8, 2002
    Assignee: Murata Manufacturing Co., Ltd.
    Inventor: Shinichi Taira
  • Patent number: 6462147
    Abstract: An epoxy resin composition for a printed circuit board includes an epoxy resin; a multi-functional phenol group; a hardening accelerator; and at least one of a compound having a triazine or isocyanurate ring, and a compound containing less than 60 weight percent nitrogen, but not containing a urea derivative. A printed circuit board comprising the epoxy resin composition has low water absorption, excellent heat endurance, and a good adhesion with copper foil.
    Type: Grant
    Filed: March 23, 1999
    Date of Patent: October 8, 2002
    Assignee: Hitachi Chemical Company, Ltd.
    Inventors: Michitoshi Arata, Nozomu Takano, Tomio Fukuda, Kenichi Tomioka
  • Patent number: 6461717
    Abstract: Disclosed are compositions and methods for providing substantially planarized surfaces in the manufacture of electronic devices. Also disclosed are compositions and methods for protecting apertures in the manufacture of electronic devices.
    Type: Grant
    Filed: April 24, 2000
    Date of Patent: October 8, 2002
    Assignee: Shipley Company, L.L.C.
    Inventors: Edward W. Rutter, Jr., Peter Trefonas, III, Edward K. Pavelchek
  • Patent number: 6459047
    Abstract: A substrate and a method of making the substrate is provided. The substrate includes a layer of metal with at least one through hole therein, the layer of metal having an adhesion promoting layer thereon. A layer of a partially cured low-loss polymer or polymer precursor is positioned on the adhesion promoting layer and a plurality of conductive circuit lines are positioned on a portion of the partially cured dielectric layer. The substrate can be used as a building block in the fabrication of a multilayered printed circuit board.
    Type: Grant
    Filed: September 5, 2001
    Date of Patent: October 1, 2002
    Assignee: International Business Machines Corporation
    Inventors: Robert M. Japp, Voya R. Markovich, Konstantinos I. Papathomas
  • Patent number: 6458465
    Abstract: A resonant tag is provided that comprises a circuit-like metallic foil pattern that is adhered to a dielectric film prepared from a liquid resin by a coating process. The circuit-like metal foil pattern on one side of the dielectric film may be so aligned with the circuit-like metal foil pattern on the other side of the dielectric film as to form a capacitor with the dielectric film. The dielectric film may have openings therein configured similarly to and aligned with openings in the circuit-like metal foil, and the configuration of the circuit-like metal foil pattern and dielectric film may be generally spiral in configuration. An adhesion adhesive may be coated on predetermined portions of a face of a resonant tag base so as to leave uncoated portions between the coated portions, and a release paper is applied to the adhesion adhesive, the width of the uncoated portions being such as to avoid the generation of static electricity when the release paper is peeled from the adhesion adhesive.
    Type: Grant
    Filed: December 22, 2000
    Date of Patent: October 1, 2002
    Assignee: Kabushiki Kaisha Miyake
    Inventor: Shinya Uchibori
  • Publication number: 20020136873
    Abstract: A method 10, 110 for making multi-layer circuit boards having metallized apertures 38, 40, 130, 132 which may be selectively and electrically grounded and having at least one formed air-bridge 92, 178.
    Type: Application
    Filed: March 20, 2001
    Publication date: September 26, 2002
    Inventors: Delin Li, Richard Keith McMillan
  • Patent number: 6455146
    Abstract: A baffle may conform to and be magnetically coupled to a body having a ferromagnetic component in proximity to the baffle. The baffle includes a first layer of a flexible thermally expansible baffle material which expands when subjected to an elevated temperature, and a second layer of a flexible magnetic material. The baffle may thereby be flexed to conform to an irregular or curved surface. In addition, the baffle may be preformed to provide an irregular or arcuate portion to conform to the body on which it is placed. The magnetic attachment facilitates attachment and removal without the need to provide holes in the body, and upon heating and expansion of the baffle, the baffle material expands to fill cavities and adhere to the inside wall surface of the body on which it is received.
    Type: Grant
    Filed: October 31, 2000
    Date of Patent: September 24, 2002
    Assignee: Sika Corporation
    Inventor: Gerald E. Fitzgerald
  • Patent number: 6448510
    Abstract: A substrate for electronic packaging, the substrate having a discrete, generally prismatoid, initially electrically conductive valve metal solid body with one or more spaced apart, original valve metal vias each individually electrically islolated by a porous oxidized body portion therearound. A pin jig fixture for mechanically masking a metal surface, the pin jig fixture having an anodization resistant bed of pins each pin having a leading end surface for intimate juxtaposition against a metal surface to mask portions thereof.
    Type: Grant
    Filed: June 22, 2000
    Date of Patent: September 10, 2002
    Assignee: Micro Components Ltd.
    Inventors: Shimon Neftin, Uri Mirsky
  • Patent number: 6447886
    Abstract: A base material for a printed circuit board, and a printed circuit board constructed therefrom. The base material is formed from a three-dimensional orthogonally woven fabric having a crimp-free fiber architecture in the x-y plane and an integrated multi-layer structure. The base material comprises a first system of straight first fibers extending along a first direction in a first plane, a second system of straight second fibers extending along a second direction in a second plane parallel to the first plane, and a third system of third fibers extending along a third direction through the first and second systems and binding the first and second fibers thereof. A filler material coats a portion of the first, second and third systems. The printed circuit board comprises the base material and one or more conductive layers attached to surfaces of the base material.
    Type: Grant
    Filed: March 20, 2000
    Date of Patent: September 10, 2002
    Assignee: 3Tex, Inc.
    Inventors: Mansour H. Mohamed, R. Bradley Lienhart, Pu Gu
  • Patent number: 6449167
    Abstract: A method and system with a magnetically attractive breadboard and associated devices for constructing and testing electronic circuits. The breadboard can comprise a single or multi-layer circuit board with metallic foil conductors that can be connected to magnetically attractive pads. Electrical contacts between the pads and foil conductors can be made by wrapping the foil over an edge of insulating material. The insulating material can comprise a flexible insulation sheet with the desired circuit printed thereon. The electronic components are preferably supported by component holders which contain magnets that are attracted to the breadboard. The component holders facilitate attachment of the components to the foil conductors. A circuit can be built by selecting the desired component holder, plugging he component into the component holder, and then attaching the component holder to the breadboard on the proper foil conductor to complete the circuit.
    Type: Grant
    Filed: October 13, 2000
    Date of Patent: September 10, 2002
    Inventor: Arthur F. Seymour
  • Publication number: 20020122923
    Abstract: Compositions and methods are provided whereby sublamination materials and layers may be produced that comprise a) a single layer etched reference plane having a top surface and a bottom surface; b) a first signal layer coupled to the top surface with a first bond-ply material; c) a second signal layer coupled to the bottom surface with a second bond-ply material; and d) at least one of a through via. Printed wiring boards may be produced that comprise a) a substrate layer, and b) a sublamination layer laminated onto the substrate layer, and c) at least one additional layer coupled to the sublamination layer or material.
    Type: Application
    Filed: December 28, 2000
    Publication date: September 5, 2002
    Inventor: Stephen S. Ohr