Abstract: A display device includes a buffer layer disposed on a substrate and comprising a first buffer film, and a second buffer film, wherein the first buffer film and the second buffer film are sequentially stacked in a thickness direction of the display device; a semiconductor pattern disposed on the buffer layer; a gate insulating layer disposed on the semiconductor pattern; and a gate electrode disposed on the gate insulating layer, wherein the first buffer film and the second buffer film comprise a same material, and a density of the first buffer film is greater than a density of the second buffer film.

Abstract: A method for manufacturing a semiconductor device includes providing a substrate including a first device region and a second device region spaced apart from each other, forming a first oxide layer on the first device region and the second device region, forming a second oxide layer below the first oxide layer, forming a mask layer on the first oxide layer on the first device region while exposing the first oxide layer on the second device region, removing the first and second oxide layers on the second device region using the mask layer as a mask, removing the mask layer, and forming a gate oxide layer on the second device region. The thus formed gate oxide layer structure has improved quality and reliability.

Abstract: An array substrate includes a base substrate; a first thin film transistor on the base substrate and including a first active layer, a first gate electrode, a first source electrode and a first drain electrode; a second thin film transistor on the base substrate and including a second active layer, a second gate electrode, a second source electrode and a second drain electrode; a first gate insulating layer between the first active layer and the first gate electrode; and a second gate insulating layer between the second active layer and the second gate electrode, the second gate insulating layer being different from the first gate insulating layer. The first source electrode, the first drain electrode, and the second gate electrode are in a same layer. The first source electrode and the first drain electrode are on a side of the second gate insulating layer distal to the base substrate.

Abstract: The invention relates to a method (100) for generating at least one recipe suggestion (230) when using a kitchen appliance (10) for preparing food, comprising the following steps: Detection (102) of food data (210), especially on the kitchen appliance (10), Assigning (103) the food data (210) to a data history (220) of a user profile (200). Furthermore, the invention relates to a kitchen appliance (10) for preparing food and a system (1) for preparing food comprising a kitchen appliance (10).

Abstract: In a top-gate transistor in which an oxide semiconductor film, a gate insulating film, a gate electrode layer, and a silicon nitride film are stacked in this order and the oxide semiconductor film includes a channel formation region, nitrogen is added to regions of part of the oxide semiconductor film and the regions become low-resistance regions by forming a silicon nitride film over and in contact with the oxide semiconductor film. A source and drain electrode layers are in contact with the low-resistance regions. A region of the oxide semiconductor film, which does not contact the silicon nitride film (that is, a region overlapping with the gate insulating film and the gate electrode layer) becomes the channel formation region.

Abstract: Provided is a method of manufacturing a nanowire semiconductor device, the method including: forming a seed layer on a substrate; forming, on the seed layer, a multilayer in which a first conductive layer, a semiconductor layer, a second conductive layer are sequentially stacked; forming a vertical nanowire above the substrate by patterning the multilayer; crystallizing the vertical nanowire by heat treatment; forming an insulating layer covering the vertical nanowire; forming a gate surrounding a channel area by the semiconductor silicon layer of the vertical nanowire; and forming a metal pad electrically connected to the gate, the first conductive layer, and the second conductive layer.

Abstract: A method of manufacturing a thin film transistor includes: removing an oxide film on a surface of an amorphous silicon layer by performing a surface cleaning; and forming an active layer by performing a heat treatment on the amorphous silicon layer, where the amorphous silicon layer is changed into crystalline silicon by the heat treatment.

Abstract: A method includes forming a doped region on a top portion of a substrate, forming a first epitaxial layer over the substrate, forming a recess in the first epitaxial layer, the recess being aligned to the doped region, performing a surface clean treatment in the recess, the surface clean treatment includes: oxidizing surfaces of the recess to form an oxide layer in the recess, and removing the oxide layer from the surfaces of the recess, and forming a second epitaxial layer in the recess.

Abstract: Example embodiments relate to monolithically integrated antenna devices. One embodiment includes a monolithically integrated antenna device that includes a substrate having a first surface and a second surface. The monolithically integrated antenna device also includes a transistor component layer that includes at least one electronic component therein. Further, the monolithically integrated antenna device includes at least one antenna structure formed on the substrate or the transistor component layer. The antenna structure is configured to operate in a frequency range of between 30 kHz and 2.4 GHz. The substrate is configured to have a size that is the same or larger than the at least one antenna structure. The at least one antenna structure is formed in a stack with the transistor component layer and the substrate. The monolithically integrated antenna device is configured to shield the at least one electronic component in the transistor component layer from electromagnetic interference.

Abstract: A powder melting device for an additive manufacturing system is provided. The powder melting device includes at least one laser device configured to generate at least one energy beam for forming at least one melt pool in a layer of powdered material. The powder melting device also includes at least two optical elements configured to dynamically induce beam distortion in the at least one energy beam to modify a beam spot incident on the layer of powdered material. The at least two optical elements are configured to induce at least one of an aspect ratio adjustment of the at least one energy beam, an optical powder redistribution between a periphery and a center of the at least one energy beam, and a rotation of the at least one energy beam.

Abstract: A method of making polycrystalline silicon (p-Si), including: depositing amorphous silicon to produce an amorphous silicon super-mesa; dehydrogenating the amorphous silicon; patterning the super-mesa to produce a patterned substrate; depositing a capping oxide layer on the amorphous silicon on the patterned substrate; heating the capped, patterned substrate to the crystallization temperature of the a-Si; and flash lamp annealing the patterned substrate with a xenon lamp to produce p-Si having at least one super-mesa, and the super-mesa having supersized grains. Also disclosed are p-Si articles and devices incorporating the articles, and an apparatus for making the p-Si articles.

Abstract: Localized heating can use a fixed-frequency planar transmission line resonators arranged along a main-line, selected by tuning an electromagnetic input signal frequency applied to the main line for depositing heat in an adjacent active substrate. More generally, adjusting input signal frequency can be used to selectively address and energize an electromagnetic-to-heat, an electromagnetic-to-vibration, or other transducer to controllably direct energy toward a desired transducer load. Resonators or other electromagnetically energized transducers can be arranged to electromagnetically interfere, such that specifying or adjusting a relative phase of applied electrical signals can be used to specify or adjust the energy directed toward a desired transducer load. Temperature sensing can characterize a material in a target region near the transducer. A cold-hot-cold temperature profile can better manage temperature and avoid overheating a dielectric material such as the active substrate material.

Abstract: Localized heating can use a fixed-frequency planar transmission line resonators arranged along a main-line, selected by tuning an electromagnetic input signal frequency applied to the main line for depositing heat in an adjacent active substrate. More generally, adjusting input signal frequency can be used to selectively address and energize an electromagnetic-to-heat, an electromagnetic-to-vibration, or other transducer to controllably direct energy toward a desired transducer load. Resonators or other electromagnetically energized transducers can be arranged to electromagnetically interfere, such that specifying or adjusting a relative phase of applied electrical signals can be used to specify or adjust the energy directed toward a desired transducer load. Temperature sensing can characterize a material in a target region near the transducer. A cold-hot-cold temperature profile can better manage temperature and avoid overheating a dielectric material such as the active substrate material.

Abstract: To provide a laser annealing device capable of performing annealing whereby electron mobility is different depending on the part, a mask, a thin film transistor, and a laser annealing method. A laser annealing device of the present invention is provided with a mask in which a plurality of openings are formed along the scanning direction, moves a substrate in the scanning direction, and irradiates the substrate with laser light via the openings. The openings respectively have first opening regions, which are aligned in the scanning direction, and which have a same shape, and some of the openings among the openings respectively have second opening regions continuous to the first opening regions in the predetermined direction with respect to the first opening regions.

Abstract: An optical device includes a light-emitting device and a sensor device (a light receiving element). The light-emitting device includes a substrate, a plurality of light-emitting elements, and a plurality of light-transmitting units. The substrate has a first surface and a second surface. The second surface is opposite the first surface. The plurality of light-emitting elements are located on the first surface side of the substrate. Each of the plurality of light-transmitting units is located between light-emitting elements adjacent to each other. The light-emitting device has light-transmitting properties by the plurality of light-transmitting units. Light from the plurality of light-emitting elements is emitted mainly from the second surface of the substrate. The amount of light leakage from light emitted from each light-emitting element and leaked toward the outside of the first surface of the substrate is suppressed.

Abstract: An electrical device in which an interface layer is disposed in between and in contact with a conductor and a semiconductor.

Abstract: An electrical device in which an interface layer is disposed in between and in contact with a conductor and a semiconductor.

Abstract: The present disclosure relates to an organic compound, a light emitting diode and an organic light emitting diode display device using the same. The organic compound is represented by a following chemical formula 1.

Abstract: Some embodiments include a method of forming crystalline semiconductor material. A template is provided to have a polycrystalline region along a surface. Semiconductor material is deposited along the surface under conditions which grow crystalline semiconductor structures from grains of the polycrystalline region. The deposition is conducted at a temperature of less than or equal to 500° C. Some embodiments include a method of forming a transistor. A template is provided to have a polycrystalline region along a surface. Semiconductor material is deposited along the surface under conditions which grow crystalline semiconductor structures from grains of the polycrystalline region. The semiconductor material includes germanium. The crystalline semiconductor structures are doped to form a configuration having a first portion over a second portion. Insulative material is formed adjacent the second portion. A transistor gate is formed along the insulative material.

Abstract: In one embodiment, a motherboard to be cut, includes: a motherboard body provided, on a surface thereof, with a cutting line comprising a special-shaped cutting line section, wherein, a plurality of positional marker groups are provided on a portion of the surface where the special-shaped cutting line section is provided; each positional marker group includes a first marker assembly and a second marker assembly provided at both sides of the special-shaped cutting line section; and, in the arrangement direction of the first marker assembly and the second marker assembly, size of the first marker assembly is not less than tolerance size of a side of the special-shaped cutting line section where the first marker assembly is in, and size of the second marker assembly is not less than tolerance size of a side of the special-shaped cutting line section where the second marker assembly is in.

Abstract: Laser annealing systems and methods with ultra-short dwell times are disclosed. The method includes locally pre-heating the wafer with a pre-heat line image and then rapidly scanning an annealing image relative to the pre-heat line image to define a scanning overlap region that has a dwell time is in the range from 10 ns to 500 ns. These ultra-short dwell times are useful for performing surface or subsurface melt annealing of product wafers because they prevent the device structures from reflowing.

Abstract: There is provided a liquid crystal display (LCD) device that prevents light leaks near spacers. The LCD device controls the optical transmissivity of a liquid crystal layer interposed between substrates disposed opposite each other, by means of an electric field generated in the layer-thickness direction of the liquid crystal layer. The LCD device includes spacers on a liquid-crystal-side surface of one substrate, signal lines formed on a liquid-crystal-side surface of the other substrate, an insulating film formed to cover the signal lines, and electrodes on the insulating film's upper surface. Each electrode contributes to controlling the optical transmissivity of the liquid crystal layer. Each spacer has a vertex surface disposed opposite to the signal lines. A portion of each electrode extends to the upper surface of a corresponding signal line. The extended portion is opposite to a part of a spacer's vertex surface disposed opposite to the corresponding signal line.

Abstract: A laser processing apparatus and a stack processing apparatus are provided. The laser processing apparatus can perform steps selectively by switching of optical paths. The steps are a step in which a first surface of a flat-plate structure is irradiated with a laser and a step in which a surface opposite to the first surface of the structure is irradiated with the laser. The laser is a linear laser whose shape on the irradiated surface is a rectangle. By laser irradiation performed while the structure is moved in the horizontal direction, the whole or a desired region of the first surface or the opposite surface of the structure can be processed.

Abstract: Alight emitting device includes a package, alight emitting element, and a light-transmissive encapsulant. The package has a top surface and a recessed portion formed with an opening at the top surface. The light emitting element is located on a bottom surface of the recessed portion. The light-transmissive encapsulant is supplied in the recessed portion. The package is provided with a groove formed in the top surface and surrounding the opening. A surface of the groove includes depressed portions and projecting portions. The encapsulant covers at least a part of the surface of the groove, and a portion of the encapsulant that covers the surface of the groove includes a surface irregularity.

Abstract: A light irradiation apparatus for irradiating an object with light, includes a plurality of line-shaped light blockers arranged at a predetermined center-to-center interval, and configured to at least partially block light, and a plurality of line-shaped light irradiators arranged to overlap some of the plurality of light blockers so as to irradiate the object with light. The plurality of light irradiators are arranged to form a period not less than twice as large as the center-to-center interval of the plurality of light blockers.

Abstract: Methods disclosed herein include scanning a focus spot formed by a laser beam over either a metal layer or IC structures that include a metal and a non-metal. The focus spot is scanned over a scan path that includes scan path segments that partially overlap. The focus spot has an irradiance and a dwell time selected to locally melt the metal layer or locally melt the metal of the IC structures without melting the non-metal. This results in rapid melting and recrystallization of the metal, which decreases the resistivity of the metal and results in improved performance of the IC chips being fabricated. Also disclosed is an example laser melt system for carrying out methods disclosed herein is also disclosed.

Abstract: A semiconductor apparatus (100) is provided with: a substrate (1); and a thin-film transistor (10). The thin-film transistor has: an oxide semiconductor layer (11) that includes a channel region (11a) and first and second contact regions (11b, 11c); a gate insulating layer (12) that is provided so as to cover the oxide semiconductor layer; a gate electrode (13) that is provided on the gate insulating layer and that overlaps the channel region via the gate insulating layer; a source electrode (14) that is electrically connected to the first contact region; and a drain electrode (15) that is electrically connected to the second contact region. This semiconductor apparatus is further provided with a light-shielding layer (2) arranged between the oxide semiconductor layer and the substrate, and the channel region is aligned to the part of the light-shielding layer overlapping the oxide semiconductor layer.

Abstract: To provide a semiconductor device in which a layer to be peeled is attached to a base having a curved surface, and a method of manufacturing the same, and more particularly, a display having a curved surface, and more specifically a light-emitting device having a light emitting element attached to a base with a curved surface. A layer to be peeled, which contains a light emitting element furnished to a substrate using a laminate of a first material layer which is a metallic layer or nitride layer, and a second material layer which is an oxide layer, is transferred onto a film, and then the film and the layer to be peeled are curved, to thereby produce a display having a curved surface.

Abstract: A method includes forming a spacer layer over a semiconductor fin protruding above a substrate, doping the spacer layer using a first dopant while the spacer layer covers source/drain regions of the semiconductor fin, and performing a thermal anneal process after the doping.

Abstract: A laser beam irradiation device includes a light source that emits a laser beam; and a projection lens that irradiates a plurality of different areas of an amorphous silicon thin film attached to a thin-film transistor with the laser beam, wherein the projection lens irradiates the plurality of different areas of the amorphous silicon thin film with the laser beam such that a source electrode and a drain electrode of the thin-film transistor are connected in parallel to each other by a plurality of channel regions.

Abstract: A flexible organic EL display device includes a polycrystalline silicon layer in which an extent of alignment of a silicon crystal orientation by electron back scatter diffraction patterns with a 001 plane is greater than or equal to 3.

Abstract: The present invention provides a thin film transistor including a gate electrode, a source electrode, a drain electrode, and a semiconductor layer, which are laminated on a substrate. The semiconductor layer is a polysilicon thin film. The polysilicon thin film in regions corresponding to the source electrode and the drain electrode has a smaller crystal grain size than that of the polysilicon thin film in a channel region between the source electrode and the drain electrode.

Abstract: A method for depositing a semiconductor structure on a surface of a substrate is disclosed. The method may include: depositing a first group IVA semiconductor layer over a surface of the substrate; contacting an exposed surface of the first group IVA semiconductor layer with a first gas comprising a first chloride gas; and depositing a second group IVA semiconductor layer over a surface of the first group IVA semiconductor layer. Related semiconductor structures are also disclosed.

Abstract: A display panel and a manufacturing method of a display panel are provided. The manufacturing method of a display panel includes: forming the nanoporous silicon oxide material on a substrate to form a nanoporous silicon oxide layer; forming the amorphous silicon material on the nanoporous silicon oxide layer to form an amorphous silicon layer; irradiating the amorphous silicon layer by a laser to crystallize the amorphous silicon layer to form a polycrystalline silicon layer; forming the gate oxide material on the polycrystalline silicon layer to form a gate oxide layer.

Abstract: A solid phase crystallization method of the present invention includes: providing amorphous silicon; heating the amorphous silicon to a first crystallization temperature; continuously heating the amorphous silicon to cause a temperature rise, in a first time period, from the first crystallization temperature to a second crystallization temperature, keeping the amorphous silicon in the second crystallization temperature for a predetermined time interval, causing a temperature drop of the amorphous silicon so as to gradually drop, in a second time period, from the second crystallization temperature to the first crystallization temperature, allowing continuous temperature drop of the amorphous silicon to reach the room temperature to thereby obtain low-temperature poly-silicon.

Abstract: A light emitting device having high definition, a high aperture ratio, and high reliability is provided. The present invention achieves high definition and a high aperture ratio with a full color flat panel display using red, green, and blue color emission light by intentionally forming laminate portions, wherein portions of different organic compound layers of adjacent light emitting elements overlap with each other, without depending upon the method of forming the organic compound layers or the film formation precision.

Abstract: Embodiment of the present disclosure provides a motherboard of flexible display panel, a cutting method thereof, a flexible display panel and a display device. The motherboard of flexible display panel includes: a plurality of display units; a space region, disposed to at least separate adjacent ones of the display unis; and a barrier strip, disposed in the space region and configured to stop a crack from extending towards the display units across the barrier strip.

Abstract: There is provided a manufacturing method for a thin-film transistor substrate, which enables to excellently perform alignment between an annealed region of a semiconductor film and a mask pattern of a conductive film. The method comprises annealing a semiconductor film being formed on a gate insulation film covering a gate electrode with a laser beam by using a mask, the gate electrode being formed within a thin-film transistor substrate region on a substrate; forming a first alignment mark outside the thin-film transistor substrate region on the substrate, by irradiating the substrate through the mask with the laser beam; patterning the semiconductor film; forming a conductive film on the semiconductor film; positioning a photomask on the basis of the first alignment mark; and forming a source electrode and a drain electrode by patterning the conductive film through the photomask; wherein the first alignment mark is formed while annealing the semiconductor film.

Abstract: A display device includes a switching transistor, a driving transistor, a storage capacitor connected to the switching and driving transistors, and an organic light-emitting diode connected to the driving transistor. The driving transistor is connected to the switching transistor. The driving transistor includes a semiconductor layer having a channel region, first doped regions at sides of the channel region, and second doped regions doped with impurities of a concentration greater than the first doped regions. A first electrode layer is over an insulating layer, which covers the semiconductor layer. The electrode layer includes convex portions extending toward the first doped regions and covering an end of the channel region. At least one of the convex portions has a width greater than or equal to a width of the end of the channel region.

Abstract: The present disclosure provides vertical hetero- and homo-junction tunnel FET (TFET) based on multi-layer black phosphorus (BP) and transition metal dichalcogenides.

Abstract: A method for forming a semiconductor device includes forming an amorphous semiconductor layer adjacent to a lightly doped region of a semiconductor wafer. The lightly doped region forms at least part of a back side of the semiconductor wafer, and the lightly doped region has a first conductivity type. The method further includes incorporating dopants into the amorphous semiconductor layer during or after forming the amorphous semiconductor layer. The method further includes annealing the amorphous semiconductor layer to transform at least a part of the amorphous semiconductor layer into a substantially monocrystalline semiconductor layer and to form a highly doped region in the monocrystalline semiconductor layer at the back side of the semiconductor wafer. The highly doped region has the first conductivity type.

Abstract: The present disclosure provides a TFT, a manufacturing method thereof, an array substrate and a manufacturing method thereof. The TFT includes a substrate, a p-Si active layer arranged on the substrate, and a first a-Si layer arranged on a surface of the p-Si active layer at a side adjacent to the substrate. An orthogonal projection of the p-Si active layer onto the substrate at least partially overlaps an orthogonal projection of the first a-Si layer onto the substrate.

Abstract: An implantable device for the electrical and/or pharmaceutical stimulation of the central nervous system, especially the spinal cord, is suggested. The device comprises a conformable substrate which is primarily composed of a flexible and stretchable polymer, and a plurality of flexible electrodes and conductive leads embedded in the conformable substrate. Not only the substrate, but also the leads are stretchable. The substrate may consist of PDMS, and the leads may consist of a conductive PDMS, in particular, PDMS with an electrically conductive filler material, and may optionally be metal-coated. The device defines a multi-electrode array which may be employed for neurostimulation in the epidural or subdural space of an animal or human.

Abstract: Apparatus and methods of treating a substrate with an amorphous semiconductor layer, or a semiconductor layer having small crystals, to form large crystals in the substrate are described. A treatment area of the substrate is identified and melted using a progressive melting process of delivering pulsed energy to the treatment area. The treatment area is then recrystallized using a progressive crystallization process of delivering pulsed energy to the area. The pulsed energy delivered during the progressive crystallization process is selected to convert the small crystals into large crystals as the melted material freezes.

Abstract: The invention provides a preparation method of a low temperature poly-silicon thin film, a preparation method of a low temperature poly-silicon thin film transistor, and a laser crystallization apparatus, and belongs to the technical field of display. The preparation method of a low temperature poly-silicon thin film of the invention comprises: forming an amorphous silicon thin film on a transparent substrate; and performing laser annealing on said amorphous silicon thin film from a side of said amorphous silicon thin film departing from said substrate, and performing laser irradiation from a side of said substrate departing from said amorphous silicon thin film, to form a low temperature poly-silicon thin film.

Abstract: The present invention provides method for manufacturing an AMOLED backplane and a structure thereof. The method uses a drain terminal of a drive TFT to serve as an anode of AMOLED the anode, so that compared to the prior art, the steps of forming a planarization layer and an anode layer are eliminated and also, the same half-tone masking operation is used to form a pixel definition layer and photo spacers, whereby the method for manufacturing the AMOLED backplane according to the present invention requires only six masking operations and saves three masking operations compared to the prior art, thereby effectively simplifying the manufacturing process, improving manufacturing efficiency, and saving cost. The present invention provides a structure of an AMOLED backplane, which has a simple structure, is easy to manufacture, and has a low cost.

Abstract: Method including the steps consisting in: forming source and drain semiconductor blocks comprising a first layer based on a first crystalline semiconductor material surmounted by a second layer (16) based on a second crystalline semiconductor material different from the first semiconductor material, making amorphous and selectively doping the second layer (16) by means of one or more implantation(s), carrying out a recrystallisation of the second layer and an activation of dopants by means of at least one thermal annealing.

Abstract: A laser annealing apparatus includes: a substrate supporting unit which supports a substrate; a laser beam irradiating unit which irradiates a line laser beam extending in a first direction to an amorphous silicon layer provided on the substrate on the substrate supporting unit; a substrate moving unit which moves the substrate supporting unit in a second direction crossing the first direction; and a first beam cutter and a second beam cutter, which are disposed between the substrate supporting unit and the laser beam irradiating unit, where the first and second beam cutters move to increase or decrease a shielded area of the substrate, which is an area of the substrate overlapping the first or second beam cutter and the line laser beam, to shield from at least a portion of the line laser beam irradiated to a portion of the substrate at an outer portion of the amorphous silicon layer.

Abstract: An organic light emitting display device is disclosed. One inventive aspect includes a plurality of pixels provided at a region sectioned by scan lines and data lines and an initialization power unit. The plurality of pixels are configured to control the amount of a current flowing from a first power source to a second power source through an organic light emitting diode in response to a data signal. The initialization power unit supplies initialization power to a driving transistor within each pixel circuit. The initialization power unit further controls the voltage of the initialization power supply to maintain a substantially constant voltage difference between the second power source and the initialization power.

Abstract: An organic light emitting display device is disclosed. One inventive aspect includes a plurality of pixels provided at a region sectioned by scan lines and data lines and an initialization power unit. The plurality of pixels are configured to control the amount of a current flowing from a first power source to a second power source through an organic light emitting diode in response to a data signal. The initialization power unit supplies initialization power to a driving transistor within each pixel circuit. The initialization power unit further controls the voltage of the initialization power supply to maintain a substantially constant voltage difference between the second power source and the initialization power.