Abstract: An object of the present invention is to provide a laser annealing method and apparatus capable of performing uniform beam emission. By means of the present invention, uniform beam application to a sample can be achieved because a linear cross-sectional configuration can be created in an optical system with a beam having a Gaussian distribution while areas of strong light intensity are avoided by rotating the beam from a laser light source at a prescribed angle by means of rotating means even when the beam pattern of the beam from the laser light source has a non-uniform intensity distribution.

Abstract: A process for making a polycrystalline silicon film includes forming, on a glass substrate, an amorphous silicon film having a first region and a second region that contacts the first region, forming a first polycrystalline portion by irradiating the first region of the amorphous silicon film with laser light having a wavelength not less than 390 nm and not more than 640 nm and forming a second polycrystalline portion that contacts the first polycrystalline portion by irradiating the second region and the portion of the region of the first polycrystalline portion that contacts the second region of the amorphous silicon film with the laser light.

Abstract: Methods of positioning and orienting nanostructures, and particularly nanowires, on surfaces for subsequent use or integration. The methods utilize mask based processes alone or in combination with flow based alignment of the nanostructures to provide oriented and positioned nanostructures on surfaces. Also provided are populations of positioned and/or oriented nanostructures, devices that include populations of positioned and/or oriented nanostructures, systems for positioning and/or orienting nanostructures, and related devices, systems and methods.

Abstract: A method of performing irradiation of laser light is given as a method of crystallizing a semiconductor film. However, if laser light is irradiated to a semiconductor film, the semiconductor film is instantaneously melted and expands locally. The temperature gradient between a substrate and the semiconductor film is precipitous, distortions may develop in the semiconductor film. Thus, the film quality of the crystalline semiconductor film obtained will drop in some cases. With the present invention, distortions of the semiconductor film are reduced by heating the semiconductor film using a heat treatment process after performing crystallization of the semiconductor film using laser light. Compared to the localized heating due to the irradiation of laser light, the heat treatment process is performed over the entire substrate and semiconductor film. Therefore, it is possible to reduce distortions formed in the semiconductor film and to increase the physical properties of the semiconductor film.

Abstract: A semiconductor device that helps to prevent the occurrence of current localization in the vicinity of an electrode edge and improves the reverse-recovery withstanding capability. The semiconductor device according to the invention includes a first carrier lifetime region, in which the carrier lifetime is short, formed in such a configuration that the first carrier lifetime region extends across the edge area of an anode electrode projection, which projects the anode electrode vertically into a semiconductor substrate. The first carrier lifetime region also includes a vertical boundary area spreading nearly vertically between a heavily doped p-type anode layer and a lightly doped semiconductor layer. The first carrier lifetime region of the invention is formed by irradiating with a particle beam, such as a He2+ ion beam or a proton beam.

Abstract: When carrying workpieces from a loading area in which the workpieces are handled into a heat treatment furnace to make the workpieces subjected to a heat treatment process using a predetermined process gas, the loading area is evacuated and controlled at a predetermined low negative pressure. An exhaust for evacuating the loading area is connected to the loading area, and a controller controls the exhaust so that the loading area is maintained at the predetermined low negative pressure. A specific gas and particles contained in a gas discharged from the loading area are removed by filters.

Abstract: This invention is intended to provide a laser annealing method by employing a laser annealer lower in running cost so as to deal with a large-sized substrate, for preventing or decreasing the generation of a concentric pattern and to provide a semiconductor device manufacturing method including a step using the laser annealing method. While moving a substrate at a constant rate between 20 and 200 cm/s, a laser beam is radiated aslant to a semiconductor film on a surface of the semiconductor substrate. Therefore, it is possible to radiate a uniform laser beam to even a semiconductor film on a large-sized substrate and to thereby manufacture a semiconductor device for which the generation of a concentric pattern is prevented or decreased. By condensing a plurality of laser beams into one flux, it is possible to prevent or decrease the generation of a concentric pattern and to thereby improve the reliability of the semiconductor device.

Abstract: There is provided a beam homogenizer which can unify the energy distribution of a linear laser beam in a longitudinal direction. In the beam homogenizer including cylindrical lens groups for dividing a beam, and a cylindrical lens and a cylindrical lens group for condensing the divided beams, the phases, in the longitudinal direction, of linear beams passing through individual cylindrical lenses of the cylindrical lens group for condensing the divided beams are shifted, and then, the beams are synthesized, so that the intensity of interference fringes of the linear beam on a surface to be irradiated is made uniform.

Abstract: A method of irradiation of plural pulse laser beams onto one position of a non-single crystal semiconductor, wherein the pulse laser beams are not higher in energy density than an energy density threshold value necessary for causing a micro-crystallization of the non-single crystal semiconductor.

Abstract: A method and structure for forming an emitter in a vertical bipolar transistor includes providing a substrate having a collector layer and a base layer over the collector layer, forming a patterning mask over the collector layer, and filling openings in the mask with emitter material in a damascene process. The CMOS/vertical bipolar structure has the collector, base regions, and emitter regions vertically disposed on one another, the collector region having a peak dopant concentration adjacent the inter-substrate isolation oxide.

Abstract: A high temperature thermal annealing process creates a low resistance contact between a metal material and an organic material of an organic semiconductor device, which improves the efficiency of carrier injection. The process forms ohmic contacts and Schottky contacts. Additionally, the process may cause metal ions or atoms to migrate or diffuse into the organic material, cause the organic material to crystallize, or both. The resulting organic semiconductor device has enhanced operating characteristics such as faster speeds of operation. Instead of using heat, the process may use other forms of energy, such as voltage, current, electromagnetic radiation energy for localized heating, infrared energy and ultraviolet energy. An example enhanced organic diode comprising aluminum, carbon C60, and copper is described, as well as example insulated gate field effect transistors.

Abstract: A driver circuit integration type (monolithic type) active matrix display device having high performance is formed by using thin film transistors (TFT). While a nickel element is added t an amorphous silicon film 203, a head treatment is carried out to thereby crystallize the amorphous silicon film. Further, by carrying out a heat treatment in an oxidizing atmosphere containing a halogen element, a thermal oxidation film 209 is formed. At this time, cyrstallinity is improved and gettering of the nickel element proceeds. TFTs are formed by using the thus obtained crystalline silicon film, and various circuits are constituted by using the TFTs, so that a data driver circuit capable of driving the active matrix circuit having the dot number of fifty thousands to three millions can be obtained.

Abstract: A hybrid device is formed by bonding together a substrate on which a micromachine (MEMS) is formed, and a semiconductor layer on which a semiconductor device is formed through an adhesion layer. The semiconductor layer can be formed by, e.g., bonding together the substrate and a member which has a separation layer (e.g., a porous layer) under the semiconductor layer on which the semiconductor device is formed, and then dividing the member at the separation layer. Alternatively, the hybrid device includes a semiconductor layer on which a circuit is formed and an antenna substrate on which an antenna is formed. The semiconductor layer and antenna substrate are bonded together, and the semiconductor layer is formed by separating, at a separation layer, a substrate which includes the separation layer.

Abstract: A laser treatment apparatus is provided which is capable of irradiating a laser beam to the position where a TFT is to be formed over the entire surface of a large substrate to achieve the crystallization, thereby forming a crystalline semiconductor film having a large grain diameter with high throughput. A laser treatment apparatus includes a laser oscillation device, a lens for converging a laser beam, such as a collimator lens or a cylindrical lens, a fixed mirror for altering an optical path for a laser beam, a first movable mirror for radially scanning a laser beam in a two-dimensional direction, and an f&thgr; lens for keeping a scanning speed constant in the case of laser beam scanning. These structural components are collectively regarded as one optical system. A laser treatment apparatus shown in FIG. 1 has a structure in which five such optical systems are placed.

Abstract: An operating semiconductor layer is formed in such a manner that amorphous silicon layer is formed to be shaped so that it has a wide region and a narrow region and the narrow region is connected to the wide region at a position asymmetric to the wide region, and the amorphous silicon layer is crystallized by scanning a CW laser beam from the wide region toward the narrow region in a state that a polycrystalline silicon layer as a heat-retaining layer encloses the narrow region from a side face through the silicon oxide layer.

Abstract: A pan/tilt camera system includes a sensor spaced from a rotational shaft of a pan/tilt camera, a detected piece rotated with the rotational shaft so as to correspond to the sensor, an origin setting unit rotating the rotational shaft in a first direction upon turn-on of a power and thereafter in a second direction opposite to the first direction so that the sensor detects a rear end of the detected piece for setting an origin, a pulse counter applying a predetermined number of pulses to the motor after set of the origin so that the rotational shaft is continuously rotated in the second direction and counting pulses applied to the motor until a front end of the detected piece with respect to the rotation direction of the detected piece is detected, and a backlash calculating unit comparing a count of the pulse counter with the predetermined number of pulses applied to the motor thereby to calculate an amount of backlash of the drive mechanism.

Abstract: A laser beam irradiation method that achieves uniform crystallization, even if a film thickness of an a-Si film or the like fluctuates, is provided. The present invention provides a laser beam irradiation method in which a non-single crystal semiconductor film is formed on a substrate having an insulating surface and a laser beam having a wavelength longer than 350 nm is irradiated to the non-single crystal semiconductor film, thus crystallizing the non-single crystal silicon film. The non-single crystal semiconductor film has a film thickness distribution within the surface of the substrate, and a differential coefficient of a laser beam absorptivity with respect to the film thickness of the non-single crystal semiconductor film is positive.

Abstract: This invention embodies an improved process for annealing integrated circuits to repair fabrication-induced damage. An integrated circuit is annealed in a pressurized sealed chamber in which a forming gas comprising hydrogen is present. Pressurization of the chamber reduces the contribution made by the final anneal step to total thermal exposure by increasing the diffusion rate of the hydrogen into the materials from which the integrated circuit is fabricated. Ideally, the forming gas contains, in addition to hydrogen, at least one other gas such as nitrogen or argon that will not react with hydrogen and, thus, reduce the danger of explosion. However, the integrated circuit may be annealed in an ambiance containing only hydrogen gas that is maintained at a pressure greater than ambient atmospheric pressure.

Abstract: In order to easily and accurately manufacture a micromachine comprising a member which is made of a single-crystalline material and having a complicated structure, an uppermost layer (1104) of a single-crystalline Si substrate (1102) whose (100) plane is upwardly directed is irradiated with Ne atom currents from a plurality of prescribed directions, so that the crystal orientation of the uppermost layer (1104) is converted to such orientation that the (111) plane is upwardly directed. A masking member (106) is employed as a shielding member to anisotropically etch the substrate (1102) from its bottom surface, thereby forming a V-shaped groove (1112). At this time, the uppermost layer (1104) serves as an etching stopper. Thus, it is possible to easily manufacture a micromachine having a single-crystalline diaphragm having a uniform thickness. A micromachine having a complicated member such as a diagram which is made of a single-crystalline material can be easily manufactured through no junction.

Abstract: In a coated optical fiber comprising a quartz glass fiber, a primary coating and a secondary coating, the secondary coating is formed by curing a resin composition comprising (A) 20-90 wt % of a polyurethane (meth)acrylate oligomer which is synthesized from an alicyclic polyisocyanate, contains 5-90 wt % of a polyurethane (meth)acrylate oligomer having a Mn of up to 1,000, and has an overall Mn of up to 10,000, and (B) 80-10 wt % of an ethylenically unsaturated compound, with electron beams accelerated at 50-125 kV. The coated optical fiber has a minimized transmission loss.

Abstract: According to a structure of the present invention disclosed in this specification, there is provided a laser irradiation apparatus, characterized by including: a plurality of lasers; a unit for controlling oscillation of the plurality of lasers; a unit for synthesizing a plurality of laser lights emitted from the plurality of lasers into a laser light; a unit for condensing the laser light on an irradiation surface or in the vicinity of the irradiation surface; and a unit for moving the laser light at least in one direction. Laser light irradiation is performed to a semiconductor film by using the above-described laser irradiation apparatus, whereby crystallization of the semiconductor film and activation of an impurity element can be performed.

Abstract: A method for producing circuit structures on a semiconductor substrate is described. Photoresist structures are formed, which define functional circuit structures and dummy circuit structures, whereby the dummy circuit structures which are smaller than a minimum structural size are joined to an additional second dummy circuit structure. The additional circuit structure is provided in such a way that the minimum structural size, which is determined by a smallest required joint surface of the photoresist on the substrate, is exceeded. A semiconductor circuit is also provided, which includes functional circuit structures and dummy circuit structures, the dummy circuit structures being joined to the additional dummy circuit structures.

Abstract: To shift the bandgap of a quantum well microstructure, the surface of the microstructure is selectively irradiated in a pattern with ultra violet radiation to induce alteration of a near-surface region of said microstructure. Subsequently the microstructure is annealed to induce quantum well intermixing and thereby cause a bandgap shift dependent on said ultra violet radiation.

Abstract: A process for forming a thin film transistor includes steps of (a) forming a gate on a portion of a substrate, (b) forming a gate dielectric layer, a semiconductor layer, a source, a drain, and a passivation in order on the substrate, and (c) proceeding a thermal treatment under atmosphere of a specific assistant gas. The specific assistant gas is one selected from a group consisting of hydrogen, steam, inert gases, and gas mixtures thereof. After providing the specific assistant gas during the thermal treatment, the process can improve the output property of the thin film transistor for avoiding double hump phenomenon.

Abstract: A method of fabricating a semiconductor device capable of fabricating a semiconductor device including a polycrystalline semiconductor film having excellent characteristics with a high yield is provided. A first amorphous semiconductor film is formed on a substrate. A conductive film is formed on the first amorphous semiconductor film. The conductive film is irradiated with an electromagnetic wave such as a high-frequency wave or a YAG laser beam thereby making the conductive film generate heat and converting the first amorphous semiconductor film to a first polycrystalline semiconductor film through the heat. Thus, polycrystallization is homogeneously performed without dispersion through the heat from the conductive film irradiated with the electromagnetic wave. Consequently, an excellent first polycrystalline silicon film can be formed with an excellent yield.

Abstract: The present invention discloses a method for forming a polycrystalline semiconductor layer on a substrate at an atmospheric pressure, including: providing a chamber having an opening portion and a stage therein; forming an amorphous semiconductor layer on the substrate; positioning the amorphous semiconductor layer formed on the substrate on the stage of the chamber; and irradiating five to twelve laser beam shots to every position of a desired portion of the semiconductor layer over the stage through the opening portion of the chamber.

Abstract: A method is provided for forming a uniformly salicided single crystal silicon emitter structure in a semiconductor integrated circuit bipolar transistor structure. The bipolar transistor structure includes a collector region that has a first conductivity type formed in a semiconductor substrate and a base region having a second conductivity type, opposite the first conductivity type, formed in the collector region. A layer of dielectric material is formed on the surface of the base region. An emitter window is opened in the layer of dielectric material to expose a surface area of the base region. A layer of polysilicon is then formed over the layer of dielectric material and extending into the emitter window such that at least a portion of the layer of polysilicon is in contact with the surface area of the base region. Dopant of the first conductivity type is then introduced into the layer of polysilicon.

Abstract: A practical, low-cost method for forming an ultra-shallow junction in a semiconductor material is provided. The method is directed to an initial RTA process using a heat source at a selected temperature and time sufficient to eliminate lattice defects without significant diffusion of the dopants, along with subsequent exposure to electromagnetic radiation having a frequency in the range of the resonance frequency of interstitial impurity ions. The intensity of the electric field is selected to be proportional to the value of the activation barrier potential of the impurity ions. The method may be used for any dopant material.

Abstract: A method and apparatus are provided for repairing clear defects in photomasks such as attenuated photomasks having a patterned MoSi film on a glass substrate. The method and apparatus use an energy source in the form of an energy beam to undercut the sidewalls of the clear defect forming a clear defect having angled sidewalls. A repair material is then deposited in the angled opening to repair the clear defect. In a preferred embodiment, two repair steps are used with the first repair step using a first repair material to deposit a first repair material on the angled sidewalls of the clear defect and a second step using a second repair material to contact the first repair material and to fill the remainder of the clear defect opening. An apparatus for repairing clear defects and photomasks repaired by the method and apparatus of the invention is also provided.

Abstract: Method is provided for forming an emitter structure in a semiconductor integrated circuit bipolar transistor structure. The bipolar transistor structure includes a collector region that has a first conductivity type formed in a semiconductor substrate and a base region having a second conductivity type, opposite the first conductivity type, formed in the collector region. A layer of dielectric material is formed on the surface of the base region. An emitter window is opened in the layer of dielectric material to expose a surface area of the base region. A layer of conductive material is then formed over the layer of dielectric material and extending into the emitter window such that at least a portion of the layer of conductive material is in contact with the surface area of the base region. Dopant of the first conductivity type is then introduced into the layer of conductive material.

Abstract: A method and a related circuit structure are described for improving the effectiveness of ESD protection in circuit structures realized in a semiconductor substrate overlaid with an epitaxial layer and including at least one ESD protection lateral bipolar transistor realized in the surface of the epitaxial layer. The method consists of forming under the transistor an isolating well that isolates the transistor from the substrate. Advantageously, the transistor can be fully isolated from the substrate by first and second N wells which extend from the surface of the epitaxial layer down to and in contact with the buried well.

Abstract: A method and apparatus for repairing and improving the endurance characteristics of process damaged oxide film formed in a semiconductor device involving sonic annealing by vibrating or oscillating a wafer at a predetermined frequency, wave amplitude, and duration. A signal from a frequency generator is amplified by a voltage amplifier and then sent to a speaker or other acoustic device for the production of vibrating acoustical wave energy. This acoustical wave energy is then directed at a submicron device wafer during a specified time period in order to anneal the gate oxide and, thereby, improve the characteristics of the oxide film.

Abstract: Extremely high dopant concentrations are uniformly introduced into a semiconductor material by laser annealing aided by an anti-reflective coating (ARC). A spin-on-glass (SOG) film containing dopant is formed on top of the semiconductor material. An ARC is then formed over the doped SOG layer. Application of radiation from an excimer laser to the ARC heats and melts the doped SOG film and the underlying semiconductor material. During this melting process, dopant from the SOG film diffuses uniformly within the semiconductor material. Upon removal of the laser radiation, the semiconductor material cools and crystallizes, evenly incorporating the diffused dopant within its lattice structure. The ARC suppresses reflection of the laser by the doped material, promoting efficient transfer of energy from the laser to heat and melt the underlying doped layer and semiconductor material.

Abstract: A Pt alloyed reaction layer is formed under a base ohmic electrode. This alloyed reaction layer extends through a base protective layer so as to reach a base layer. Besides, a Pt alloyed reaction layer is formed under an emitter ohmic electrode. This alloyed reaction layer is formed only within a second emitter contact layer. With this constitution, the manufacturing cost for the HBT can be reduced and successful contact characteristics for the HBT can be obtained.

Abstract: A method of manufacturing a semiconductor device includes the step of doping an N-type impurity via a selective region formed on a semiconductor substrate by lithography, the step of doping a P-type impurity in the semiconductor substrate subsequent to the doping step without forming a selective region by lithography, and the step of self-aligningly forming an N-diffusion layer and a P-diffusion layer by performing wet oxidation with respect to the semiconductor substrate in which the N-type impurity and the P-type impurity are doped.

Abstract: The present invention employs a scanned atomic force probe to physical incorporate impurity atoms (dopant or bandgap) into a semiconductor substrate so that the impurity atoms have high resolution and improved placement. Specifically, the method of the present invention comprising a step of physically contacting a semiconductor surface having a layer of a dopant/bandgap source material thereon such that upon said physical contact impurity atoms from the dopant/bandgap source material are driven into the semiconductor substrate.

Abstract: The present invention relates to a method for fabricating an integrated circuit including an NPN-type bipolar transistor, including the steps of defining a base-emitter location of the transistor with polysilicon spacers resting on a silicon nitride layer; overetching the silicon nitride under the spacers; filling the overetched layer with highly-doped N-type polysilicon; depositing an N-type doped polysilicon layer; and diffusing the doping contained in the third and fourth layers to form the emitter of the bipolar transistor.

Abstract: Highly integrated bipolar junction transistors include a semiconductor region, a collector region of first conductivity type in the semiconductor region and a trench extending adjacent the collector region. A three-dimensional base region of second conductivity type is also provided. The base region extends along a bottom of the trench and forms a P-N junction with the collector region. An emitter region of first conductivity type is also provided in the base region. The emitter region extends along a sidewall of the trench. The base region preferably comprises an extrinsic base region extending opposite the bottom of the trench and an intrinsic base region extending opposite the sidewall of the trench. The conductivity of the extrinsic base region is greater than the conductivity of the intrinsic base region.

Abstract: A process for forming a structure of a high-frequency bipolar transistor on a layer of a semiconductor material with conductivity of a first type. The process includes forming a first shallow base region by implantation along a selected direction of implantation and using a dopant with a second type of conductivity. The region extends from a first surface of the semiconductor material layer and encloses, toward said first surface, an emitter region with conductivity of the first type. In accordance with the invention, the implantation step includes at least one process phase at which the direction of implantation is maintained at a predetermined angle significantly greatly than zero degrees from the direction of a normal line to said first surface. Preferably, the implantation angle is of about 45 degrees.

Abstract: A process is described for forming a heavily doped buried element below an active device region of a silicon wafer without the use of costly epitaxial layers and without incurring ion implantation damage within active device regions. The method is particularly applicable to active device regions which have small lateral dimensions. Thus, the technological trend towards shrinking devices favors the incorporation of the process of the invention. The process utilizes a silicon nitride hardmask to define a narrow band around the perimeter of the device active area. A deep implant is performed through this mask, placing a ring of dopant below and outside the active area. The silicon nitride hardmask is then patterned a second time to define the conventional field oxide isolation regions. The LOCOS field oxidation is then performed whereby the implanted dopant diffuses vertically, engaging the field oxide around the perimeter of the device region and laterally filling in the region under the device active area.

Abstract: A method of manufacturing a bipolar transistor having an improved polysilicon emitter is disclosed. More specifically, hydrogen terminations or OH group terminations adhered (bonded) to an emitter-forming region are eliminated by a heat treatment in an inert gas atmosphere before forming emitter polysilicon. Subsequently, an amorphous silicon film for forming an emitter polysilicon is formed at a low temperature.

Abstract: There is Disclosed a semiconductor device comprising a silicon film formed on a substrate having at least a surface formed of an insulative material, the silicon film being heat-treated at a temperature below 600.degree. C. and being partially coated with a silicon oxide film formed by electronic cyclotron resonance plasma CVD.

Abstract: There is disclosed a method for forming an ultra-shallow junction of a semiconductor device, comprising a four-stage RTA process following the ion implantation of dopants for source/drain junction, the RTA process being carried out with high temperature-elevating and -quenching rates between the stages, in such a way that relatively low temperatures are used for a short time in the first three stages in order to eliminate only the point defects, which greatly affect the diffusion of dopants, without diffusion of dopants while a relatively high temperature is taken in the last stage with the aim of allowing the dopants to diffuse a little to p.sup.+ and n.sup.+ shallow junctions, thereby obtaining an improvement in electrical activity and reducing junction current leakage and thus, improving the properties and reliability of the resulting semiconductor device.

Abstract: Integrated structure bipolar transistors with controlled storage time are manufactured by forming at least one bipolar transistor occupying a first area on a first surface of the silicon material, covering the first surface of the silicon material with an insulating material layer, and selectively removing the insulating material layer to open a window. The window has a second area much smaller than the first area occupied by the bipolar transistor. Therefore, by implanting into the silicon material a medium dose of platinum ions through the window and diffusing into the silicon material the implanted platinum ions, a uniform distribution of platinum inside the transistor is obtained.