Abstract: A first device comprising a first organic light emitting device (OLED) is described. The first OLED includes an anode, it cathode and an emissive layer disposed between the anode and the cathode. The emissive layer includes a phosphorescent emissive dopant and a host material, that includes nanocrystals. The phosphorescent emissive dopant is bonded to the host material by a bridge moiety.

Abstract: There is provided an organic light-emitting diode (OLED) display device, including: a first substrate on which a plurality of sub-pixel areas are defined; a plurality of first electrodes in the plurality of sub-pixel areas, respectively; and a plurality of light-emitting layers over the plurality of first electrodes and corresponding to the plurality of sub-pixel areas, respectively; wherein at least one of the plurality of light-emitting layers extends to a neighboring sub-pixel area among the plurality of sub-pixel areas, and has an occupied area in the neighboring sub-pixel area.

Abstract: Methods of performing fast thermal annealing in forming GaN light-emitting diodes (LEDs) are disclosed, as are GaN LEDs formed using fast thermal annealing having a time duration of 10 seconds or faster. An exemplary method includes forming a GaN multilayer structure having a n-GaN layer and a p-GaN layer that sandwich an active layer. The method includes performing fast thermal annealing of the p-GaN layer using either a laser or a flash lamp. The method further includes forming a transparent conducting layer atop the GaN multilayer structure, and adding a p-contact to the transparent conducting layer and a n-contact to the n-GaN layer. The resultant GaN LEDs have enhanced output power, lower turn-on voltage and reduced series resistance.

Abstract: A light-emitting element includes a n-type silicon oxide film and a p-type silicon nitride film. The n-type silicon oxide film and the p-type silicon nitride film formed on the n-type silicon oxide film form a p-n junction. The n-type silicon oxide film includes a plurality of quantum dots composed of n-type Si while the p-type silicon nitride film includes a plurality of quantum dots composed of p-type Si. Light emission occurs from the boundary between the n-type silicon oxide film and the p-type silicon nitride film by injecting electrons from the n-type silicon oxide film side and holes from the p-type silicon nitride film side.

Abstract: Disclosed is an improved semiconductor structure (e.g., a silicon germanium (SiGe) hetero-junction bipolar transistor) having a narrow essentially interstitial-free SIC pedestal with minimal overlap of the extrinsic base. Also, disclosed is a method of forming the transistor which uses laser annealing, as opposed to rapid thermal annealing, of the SIC pedestal to produce both a narrow SIC pedestal and an essentially interstitial-free collector. Thus, the resulting SiGe HBT transistor can be produced with narrower base and collector space-charge regions than can be achieved with conventional technology.

Abstract: Provided is a semiconductor laser, wherein (?a??w)>15 (nm) and Lt<25 (?m), where ?w is the wavelength of light corresponding to the band gap of the active layer disposed at a position within a distance of 2 ?m from one end surface in a resonator direction, ?a is the wavelength of light corresponding to the band gap of the active layer disposed at a position that is spaced a distance of equal to or more than ( 3/10)L and ?( 7/10)L from the one end surface in a resonator direction, “L” is the resonator length, and “Lt” is the length of a transition region provided between the position of the active layer with a band gap corresponding to a light wavelength of ?w+2 (nm) and the position of the active layer with a band gap corresponding to a light wavelength of ?a?2 (nm) in the resonator direction.

Abstract: A method for manufacturing a laser-active solid having a bonded passive Q-switch is provided. A plane-parallel first wafer plate may be manufactured from a laser-active material. A second plane-parallel wafer plate may be manufactured from a material that is suitable as a passive Q-switch. The first wafer plate and the second wafer plate may be bonded to form a wafer block, which may then be coated on both end faces with a resonator mirror. Subsequently, the wafer block may be separated into multiple passively Q-switched solid state lasers.

Abstract: A branched optical isolator includes, located over a substrate, at least two branches connected to a trunk at a junction location. At least one branch comprises an optical absorber material and at least one branch comprises an optical transmitter material. The optical isolator may be incorporated into an optical chip carrier such that: (1) an optical emitting portion of an optical chip integral to or attached to the optical chip carrier; and (2) a connection to the optical isolator, are butt connected with a gap less than 10 nanometers, and otherwise materials matched. The optical isolator provides for attenuated backscattered optical radiation into the optical chip.

Abstract: A method of manufacturing an organic EL element operating at low voltage to emit light at high intensity comprises: a first step of forming, on an anode, a hole injection layer including metal oxide; a second step of irradiating the hole injection layer with ultraviolet light, the ultraviolet light having a wavelength greater than a wavelength at which oxygen molecules decompose and yield oxygen radicals; a third step of forming functional layers containing organic material on or above the hole injection layer after the second step, the functional layers including a light-emitting layer; and a fourth step of forming a cathode on or above the functional layers.

Abstract: A method for producing a Group III-V semiconductor device, includes forming, on a base, a plurality of semiconductor devices isolated from one another, forming, through ion implantation, a high-resistance region in a surface layer of a side surface of each semiconductor device, after formation of the high-resistance region, forming a p-electrode and a low-melting-point metal diffusion prevention layer on the top surface of the semiconductor device, bonding the semiconductor device to a conductive support substrate via a low-melting-point metal layer, and removing the base through the laser lift-off process.

Abstract: A semiconductor device includes a semiconductor substrate having at least one surface provided with a semiconductor element, wherein the semiconductor substrate includes a region of a first conductivity type, the region being formed in a surface layer portion of the semiconductor substrate; a first diffusion region of a second conductivity type, the first diffusion region having a first impurity concentration and being formed in the surface layer portion, and a pn junction being formed between the first diffusion region and the region of the first conductivity type; and a first metal silicide film formed on part of a portion of the surface corresponding to the first diffusion region.

Abstract: A photodiode includes a first doped layer and a second doped layer that share a common face. A deep isolation trench has a face contiguous with the first and second doped layers. A conducting layer is in contact with a free face of the second doped layer. A protective layer is provided at an interface with the first doped layer and second doped layer. This protective layer is capable of generating a layer of negative charge at the interface. The protective layer may further be positioned within the second doped layer to form an intermediate protective structure.

Abstract: An organic light emitting display is disclosed. The display has a pixel which includes a transistor and a capacitor. The active layer of the transistor and at least one of the electrodes of the capacitor comprise a semiconductor oxide.

Abstract: A light-emitting diode (LED) device is provided. The LED device has a lower LED layer and an upper LED layer with a light-emitting layer interposed therebetween. A current blocking layer is formed in the upper LED layer such that current passing between an electrode contacting the upper LED layer flows around the current blocking layer. When the current blocking layer is positioned between the electrode and the light-emitting layer, the light emitted by the light-emitting layer is not blocked by the electrode and the light efficiency is increased. The current blocking layer may be formed by converting a portion of the upper LED layer into a resistive region. In an embodiment, ions such as magnesium, carbon, or silicon are implanted into the upper LED layer to form the current blocking layer.

Abstract: A light-emitting diode structure is disclosed. A substrate has a first semiconductor layer, a light-emitting layer and a second semiconductor layer formed thereon. The first and second semiconductor layers are of opposite conductivity types. A first contact electrode is disposed between the first semiconductor layer and the substrate, and has a protruding portion extending into the second semiconductor layer. A barrier layer is conformally formed on the first contact electrode and exposes a top surface of the protruding portion. A current blocking member is disposed on the barrier layer and around at least a sidewall of the protruding portion. A second contact electrode is disposed between the first semiconductor layer and the first contact electrode, and in direct contact with the first semiconductor layer, wherein the second contact electrode is electrically insulated from the first contact electrode by the barrier layer.

Abstract: A photoelectric conversion device with an excellent photoelectric conversion characteristic with a silicon semiconductor material effectively utilized. The photoelectric conversion device includes a first unit cell including a first electrode, a first impurity semiconductor layer, a single crystal semiconductor layer, and a second impurity semiconductor layer; and a second unit cell including a third impurity semiconductor layer, a non-single-crystal semiconductor layer, a fourth impurity semiconductor layer, and a second electrode. The second and third impurity semiconductor layers are in contact with each other so that the first and second unit cells are connected in series, and an insulating layer is provided for a surface of the first electrode and bonded to a supporting substrate.

Abstract: A semiconductor component comprising at least one optically active first region (112) for emitting electromagnetic radiation (130) in at least one emission direction and at least one optically active second region (122) for emitting electromagnetic radiation (130) in the at least one emission direction. The first region (112) is here arranged in a first layer (110) and the second region (122) in a second layer (120), the second layer (120) being arranged over the first layer (110) in the emission direction and comprising a first passage region (124) assigned to the first region (112), which first passage region is at least partially transmissive for the electromagnetic radiation (130) of the first region (112).

Abstract: A method for depositing material on a substrate is described. The method comprises directionally depositing a thin film on one or more surfaces of a substrate using a gas cluster ion beam (GCIB) formed from a source of precursor to the thin film, wherein the deposition occurs on surfaces oriented substantially perpendicular to the direction of incidence of the GCIB, and deposition is substantially avoided on surfaces oriented substantially parallel to the direction of incidence.

Abstract: A semiconductor light-emitting apparatus that has high luminous efficiency and a high breakdown voltage as well as reduced breakdown voltage variation among lots. The semiconductor light-emitting apparatus includes a first clad layer and a second clad layer. An average dopant concentration of the second clad layer is lower than that of the first clad layer. The light-emitting apparatus also includes an active layer having an average dopant concentration of 2×1016 to 4×1016 cm?3. The active layer is made of (AlyGa1-y)xIn1-xP (0<x?1, 0?y?1). The light-emitting apparatus also includes a third clad layer, and a second-conducting-type semiconductor layer made of Ga1-xInxP (0?x<1). If d is the layer thickness of the second clad layer (nm) and Nd1 is the average dopant concentration of the second clad layer (cm?3), then d?1.2×Nd1×10?15+150 is satisfied.

Abstract: A light emitting device (10) comprises a body (11) comprising a substrate (12) of a p-type semiconductor material. The substrate has an upper surface (14) and having formed therein on one side of the upper surface and according to a bulk semi-conductor fabrication process utilizing lateral active area isolation techniques: a first n+-type island (16) to form a first junction (24) between the first island and the substrate; and a second n+-type island (18) spaced laterally from the first island (16). The substrate provides a laterally extending link (20) between the islands having an upper surface. The upper surface of the link, an upper surface of the island (16) and an upper surface of the island (18) collectively form a planar interface (21) between the body (11) and an isolation layer (19) of the device. The device comprises a terminal arrangement to apply a reverse bias to the first junction, to cause the device to emit light. The device is configured to facilitate the transmission of the emitted light.

Abstract: The present invention relates to light-emitting devices and novel emitter materials as well as emitter systems and, in particular, organic light-emitting devices (OLEDs). In particular, the invention relates to the use of luminescent complexes as emitters in such devices.

Abstract: A group III nitride semiconductor light emitting device includes an n-type cladding layer and a p-type cladding layer on a primary surface of a substrate, the c-axes of which tilt relative to the normal axis of the primary surface of the substrate. The p-type cladding layer is doped with a p-type dopant providing an acceptor level, and the p-type cladding layer contains an n-type impurity providing a donor level. An active layer is disposed between the n-type cladding layer and the p-type cladding layer. The concentration of the p-type dopant is greater than that of the n-type impurity. The difference (E(BAND)?E(DAP)) between the energy E(BAND) of a band-edge emission peak value in the photoluminescence spectrum of the p-type cladding layer and the energy E(DAP) of a donor-acceptor pair emission peak value in the photoluminescence spectrum is not more than 0.42 electron volts.

Abstract: To provide a method of manufacturing an infrared light-emitting element having a wavelength of 1.57 ?m, including: forming a SiO2 film on a Si substrate containing C; and performing RTA treatment in an atmosphere containing oxygen, or implanting impurity ions therein and thereafter performing RTA treatment in an atmosphere containing oxygen, thereby forming C centers.

Abstract: A group-III nitride semiconductor device includes a light emitting layer emitting light of a wavelength in the range of 480 to 600 nm; a first contact layer over the light emitting layer; a second contact layer in direct contact with the first contact layer; and a metal electrode in direct contact with the second contact layer. The first and second contact layers comprise a p-type gallium nitride-based semiconductor. The p-type dopant concentration of the first contact layer is lower than that of the second contact layer. The light emitting layer comprises a gallium nitride-based semiconductor. The interface between the first and second contact layers tilts at an angle of not less than 50 degrees and smaller than 130 degrees from a plane orthogonal to a reference axis extending along the c-axis. The second contact layer has a thickness within the range of 1 to 50 nm.

Abstract: Gallium nitride material devices and related processes are described. In some embodiments, an N-face of the gallium nitride material region is exposed by removing an underlying region.

Abstract: A light emitting diode includes a thermal conductive substrate, an p-type GaN layer, an active layer and an n-type GaN layer sequentially stacked above the substrate and an electrode pad deposited on the n-type GaN layer. A surface of n-type GaN layer away from the active layer has a first diffusing section and a second diffusing section. The first diffusing section is adjacent to the electrode pad and the second diffusing section is located at the other side of the first diffusing section opposite to the electrode pad, wherein the doping concentration of the first diffusing section is less than that of the second diffusing section. The n-type GaN layer has an electrical resistance larger than that of the first diffusing section which in turn is larger than that of the second diffusing section.

Abstract: In a fabricating method of an LED, a first-type doped semiconductor material layer, a light emitting material layer, and a second-type doped semiconductor material layer are sequentially formed on a substrate. The first-type and second-type doped semiconductor material layers and the light emitting material layer are patterned to form a first-type doped semiconductor layer, an active layer, and a second-type doped semiconductor layer. The active layer is disposed on a portion of the first-type doped semiconductor layer. The second-type doped semiconductor layer is disposed on the active layer and has a first top surface. A wall structure is formed on the first-type doped semiconductor layer that is not covered by the active layer, and the wall structure surrounds the active layer and has a second top surface higher than the first top surface of the second-type doped semiconductor layer. Electrodes are formed on the first-type and second-type doped semiconductor layers.

Abstract: An organic light emitting device comprising, an anode, a cathode, and an emissive layer, located between the anode and the cathode, of a host compound, a first compound capable of phosphorescent emission at room temperature, and a second compound capable of phosphorescent emission at room temperature is provided. At least 95 percent of emission from the device is produced from the second compound when an appropriate voltage is applied across the anode and cathode.

Abstract: A method of adjusting a metal gate work function of an NMOS device comprises: depositing a layer of metal nitride film or metal film on a high K dielectric as a metal gate electrode by a physical vapor deposition process; implanting elements such as Tb, Er, Yb or Sr into the metal gate electrode by an ion implantation process; performing a high temperature annealing so that the doped metal ions are driven to and accumulate on the interface between the metal gate electrode and the high K gate dielectric, or form dipoles by an interface reaction on the interface between the high K gate dielectric and SiO2. The method is capable of adjusting the metal gate work function, and is well-compatible with CMOS process.

Abstract: An organic light emitting diode display includes a thin film transistor on a substrate (1). The thin film transistor includes a gate electrode (2), a gate insulating film (3) that covers the gate electrode (2), a first semiconductor film (4) provided on the gate insulating film (3), a second semiconductor film (5) provided on the first semiconductor film (4), a back channel protection insulating film (7) and an ohmic contact film (8) provided on the second semiconductor film (5), and source/drain electrodes (9). A crystallinity of the first semiconductor film (4) is higher than that of the second semiconductor film (5). The back channel protection insulating film (7) is formed as one of an organic insulating film and an organic/inorganic hybrid insulating film. The thin film transistor has excellent off-state characteristics, swing characteristics, and saturation characteristics.

Abstract: This disclosure provides a method of fabricating a semiconductor device layer and associated memory cell structures. By performing a surface treatment process (such as ion bombardment) of a semiconductor device layer to create defects having a deliberate depth profile, one may create multistable memory cells having more consistent electrical parameters. For example, in a resistive-switching memory cell, one may obtain a tighter distribution of set and reset voltages and lower forming voltage, leading to improved device yield and reliability. In at least one embodiment, the depth profile is selected to modulate the type of defects and their influence on electrical properties of a bombarded metal oxide layer and to enhance uniform defect distribution.

Abstract: A method of LED manufacturing is disclosed. A coating is applied to a mesa. This coating may have different thicknesses on the sidewalls of the mesa compared to the top of the mesa. Ion implantation into the mesa will form implanted regions in the sidewalls in one embodiment. These implanted regions may be used for LED isolation or passivation.

Abstract: Highly uniform silica nanoparticles can be formed into stable dispersions with a desirable small secondary particle size. The silican particles can be surface modified to form the dispersions. The silica nanoparticles can be doped to change the particle properties and/or to provide dopant for subsequent transfer to other materials. The dispersions can be printed as an ink for appropriate applications. The dispersions can be used to selectively dope semiconductor materials such as for the formation of photovoltaic cells or for the formation of printed electronic circuits.

Abstract: Methods of fabricating active device array and organic light emitting diode array are provided. A first pattern metal layer is formed over a substrate. An oxide semiconductor layer is formed entirely over the substrate. A first insulation layer covering the first patterned metal layer and the oxide semiconductor layer is formed entirely on the substrate. A second patterned metal layer is formed on the first insulation layer. The oxide semiconductor layer and the first insulation layer is patterned by using the second patterned metal layer as a mask to form a first patterned oxide semiconductor layer and a first patterned insulation layer. A second insulation layer is entirely formed on the substrate. A second patterned oxide semiconductor layer is formed over the second insulation layer. A third patterned metal layer is formed over the second insulation layer.

Abstract: A process for preparing color stable Mn+4 doped phosphors includes providing a phosphor of formula I; Ax[MFy]:Mn+4??I and contacting the phosphor in particulate form with a saturated solution of a composition of formula II in aqueous hydrofluoric acid; Ax[MFy];??II wherein A is Li, Na, K, Rb, Cs, NR4 or a combination thereof; M is Si, Ge, Sn, Ti, Zr, Al, Ga, In, Sc, Y, La, Nb, Ta, Bi, Gd, or a combination thereof; R is H, lower alkyl, or a combination thereof; x is the absolute value of the charge of the [MFy] ion; and y is 5, 6 or 7. In particular embodiments, M is Si, Ge, Sn, Ti, Zr, or a combination thereof. A lighting apparatus capable of emitting white light includes a semiconductor light source; and a phosphor composition radiationally coupled to the light source, and which includes a color stable Mn+4 doped phosphor.

Abstract: According to an embodiment, a semiconductor light emitting device includes an n-type semiconductor layer, a p-type semiconductor layer and a light emitting layer provided between the n-type semiconductor layer and the p-type semiconductor layer. The light emitting layer includes at least one quantum well, and the quantum well adjacent to the p-type semiconductor layer includes a first barrier layer and a second barrier layer, the first barrier layer nearer to the p-type semiconductor layer being doped with p-type impurity.

Abstract: An object of the present invention is to obtain, with respect to a semiconductor light-emitting element using a group III nitride semiconductor substrate, a semiconductor light-emitting element having an excellent light extraction property by selecting a specific substrate dopant and controlling the concentration thereof. The semiconductor light-emitting element comprises a substrate composed of a group III nitride semiconductor comprising germanium (Ge) as a dopant, an n-type semiconductor layer composed of a group III nitride semiconductor formed on the substrate, an active layer composed of a group III nitride semiconductor formed on the n-type semiconductor layer, and a p-type semiconductor layer composed of a group III nitride semiconductor formed on the active layer in which the substrate has a germanium (Ge) concentration of 2×1017 to 2×1019 cm?3.

Abstract: A method of manufacturing a semiconductor optical element having an active layer containing quantum dots, in which density of the quantum dots in a resonator direction in a portion of the active layer in which density of photons is high, relative to the density of the quantum dots in a portion of the active layer in which the density of photons is relatively low, includes forming the quantum dots in the active layer so that the distribution density is uniform in a resonator direction; and diffusing or implanting an impurity non-uniformly in the resonator direction in the active layer in which quantum dots are uniformly distributed, thereby disordering some of the quantum dots and forming a non-uniform density distribution of the quantum dots in the resonator direction in the active layer

Abstract: A MEMS-based display device is described, wherein an array of interferometric modulators are configured to reflect light through a transparent substrate. The transparent substrate is sealed to a backplate and the backplate may contain electronic circuitry fabricated on the backplane. The electronic circuitry is placed in electrical communication with the array of interferometric modulators and is configured to control the state of the array of interferometric modulators.

Abstract: A nitride-based semiconductor device includes a p-type AldGaeN layer 25 whose growing plane is an m-plane and an electrode 30 provided on the p-type AldGaeN layer 25. The AldGaeN layer 25 includes a p-AldGaeN contact layer 26 that is made of an AlxGayInzN (x+y+z=1, x?0, y>0, z?0) semiconductor, which has a thickness of not less than 26 nm and not more than 60 nm. The p-AldGaeN contact layer 26 includes a body region 26A which contains Mg of not less than 4×1019 cm?3 and not more than 2×1020 cm?3 and a high concentration region 26B which is in contact with the electrode 30 and which has a Mg concentration of not less than 1×1021 cm?3.

Abstract: An object is to provide a method of manufacturing a nitride semiconductor light emitting device having high light emission output and allowing decrease in forward voltage (Vf). The invention is directed to a method of manufacturing a nitride semiconductor light emitting device including at least an n-type nitride semiconductor, a p-type nitride semiconductor and an active layer formed between the n-type nitride semiconductor and the p-type nitride semiconductor, wherein the n-type nitride semiconductor includes at least an n-type contact layer and an n-side GaN layer, the n-side GaN layer consists of a single or a plurality of undoped and/or n-type layers, and the method includes the step of forming the n-side GaN layer by organic metal vapor deposition with the growth temperature set within the range of 500 to 1000° C., such that the n-side GaN layer is formed between the n-type contact layer and the active layer.

Abstract: A light-emitting device is disclosed. The light-emitting device comprises a substrate, an ion implanted layer on the substrate, a light-emitting stack layer disposed on the ion implanted layer, and an adhesive layer connecting the substrate with the light-emitting stack layer, wherein the adhesive layer comprises a thin silicon film disposed between the ion implanted layer and the light-emitting layer. This invention also discloses a method of manufacturing a light-emitting device comprising the steps of forming a light-emitting stack layer, forming a thin silicon film on the light-emitting stack layer, providing a substrate, forming an ion implanted layer on the substrate, and providing an electrode potential difference to form an oxide layer between the thin silicon film and the ion implanted layer.

Abstract: A template used for printing is implanted to change the properties of the materials it is composed of. This template may have multiple surfaces that define indentations. The ion species that is implanted may be C, N, H, F, He, Ar, B, As, P, Ge, Ga, Si, Zn, and Al and is configured to render the implanted regions hydrophobic in one instance. This will reduce adhesion of a polymer to the template during a printing process. The implant may be at a plurality of angles so all surfaces of the template are implanted. In other instances, a film on the surface of the template is knocked in or hardened using the ion species.

Abstract: A laser medium comprises a solid-state host material and dopant species provided within the solid-state host material. A first portion of the dopant species has a first valence state, and a second portion of the dopant species has a second valence state. In an embodiment, a concentration of the first portion of the dopant species decreases radially with increasing distance from a center of the medium, and a concentration of the second portion of the dopant species increases radially with increasing distance from the center of the medium. The laser medium further comprises impurities within the solid-state host material, the impurities converting the first portion of the dopant species having the first valence state into the second portion of dopant species having the second valence state.

Abstract: An optoelectronic semiconductor chip is specified, which has an active zone (20) containing a multi quantum well structure provided for generating electromagnetic radiation, which comprises a plurality of successive quantum well layers (210, 220, 230). The multi quantum well structure comprises at least one first quantum well layer (210), which is n-conductively doped and which is arranged between two n-conductively doped barrier layers (250) adjoining the first quantum well layer. It comprises a second quantum well layer (220), which is undoped and is arranged between two barrier layers (250, 260) adjoining the second quantum well layer, of which one is n-conductively doped and the other is undoped. In addition, the multi quantum well structure comprises at least one third quantum well layer (230), which is undoped and which is arranged between two undoped barrier layers (260) adjoining the third quantum well layer.

Abstract: Provided is a light emitting device fabricating apparatus, which includes a light emitting device, first and second contact parts, a power source part, a loading plate, and a chamber. The first and second contact parts are connected to the light emitting device to apply a first current to the light emitting device. The power source part supplies power to the first and second contact parts. The loading plate supports and heats the light emitting device. The chamber accommodates the light emitting device, the first and second contact parts, and the loading plate, and has a vacuum state or oxygen atmosphere.

Abstract: A microresonator comprising a single-crystal silicon resonant element and at least one activation electrode placed close to the resonant element, in which the resonant element is placed in an opening of a semiconductor layer covering a substrate, the activation electrode being formed in the semiconductor layer and being level at the opening.

Abstract: An improved bifacial solar cell is disclosed. In some embodiments, the front side includes an n-type field surface field, while the back side includes a p-type emitter. In other embodiments, the p-type emitter is on the front side. To maximize the diffusion of majority carriers and lower the series resistance between the contact and the substrate, the regions beneath the metal contacts are more heavily doped. Thus, regions of higher dopant concentration are created in at least one of the FSF or the emitter. These regions are created through the use of selective implants, which can be performed on one or two sides of the bifacial solar cell to improve efficiency.

Abstract: The present invention discloses a light-emitting device with a two-dimensional composition-fluctuation active-region obtained via two-dimensional thermal conductivity modulation of the material lying below the active-region. The thermal conductivity modulation is achieved via formation of high-density pores in the material below the active-region. The fabrication method of the light-emitting device and material with the high-density pores are also disclosed.

Abstract: An object is to provide a method of manufacturing a nitride semiconductor light emitting device having high light emission output and allowing decrease in forward voltage (Vf). The invention is directed to a method of manufacturing a nitride semiconductor light emitting device including at least an n-type nitride semiconductor, a p-type nitride semiconductor and an active layer formed between the n-type nitride semiconductor and the p-type nitride semiconductor, wherein the n-type nitride semiconductor includes at least an n-type contact layer and an n-side GaN layer, the n-side GaN layer consists of a single or a plurality of undoped and/or n-type layers, and the method includes the step of forming the n-side GaN layer by organic metal vapor deposition with the growth temperature set within the range of 500 to 1000° C., such that the n-side GaN layer is formed between the n-type contact layer and the active layer.