Compound Semiconductor Patents (Class 438/46)
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Patent number: 11220759Abstract: A method of manufacturing a group-III nitride crystal includes: a seed crystal preparation step of preparing a plurality of dot-shaped group-III nitrides on a substrate as a plurality of seed crystals for growth of a group-III nitride crystal; and a crystal growth step of bringing surfaces of the seed crystals into contact with a melt containing an alkali metal and at least one group-III element selected from gallium, aluminum, and indium in an atmosphere containing nitrogen and thereby reacting the group-III element with the nitrogen in the melt to grow the group-III nitride crystal.Type: GrantFiled: February 6, 2020Date of Patent: January 11, 2022Assignees: OSAKA UNIVERSITY, PANASONIC CORPORATIONInventors: Yusuke Mori, Masayuki Imanishi, Masashi Yoshimura, Kousuke Murakami, Shinsuke Komatsu, Masahiro Tada, Yoshio Okayama
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Patent number: 11211526Abstract: A semiconductor light-emitting element having an emission peak wavelength of 395 nm or more and 425 nm or less, comprises: a substrate including a first surface and a second surface, at least one surface selected from the group consisting of the first and second surfaces having an uneven region; a semiconductor layer on the first surface; and a multilayer reflective film on the second surface or the semiconductor layer, wherein the multilayer reflective film includes a structure having a plurality of first dielectric films and a plurality of second dielectric films, the first dielectric films and the second dielectric films being alternately stacked.Type: GrantFiled: September 16, 2019Date of Patent: December 28, 2021Assignees: TOSHIBA MATERIALS CO., LTD., MEIJO UNIVERSITYInventors: Satoshi Kamiyama, Atsuya Sasaki, Ryosuke Hiramatsu, Hideaki Hirabayashi
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Patent number: 11205739Abstract: Provided is a semiconductor light-emitting device which can mitigate a multipeak in an emission spectrum in a bonding-type semiconductor light-emitting device having an InP cladding layer. The semiconductor light-emitting device of the present disclosure includes a first conductive type InP cladding layer, a semiconductor light-emitting layer, and a second conductive type InP cladding layer provided sequentially over a conductive support substrate, the second conductive type InP cladding layer being on a light extraction side, and the semiconductor light-emitting device further includes a metal reflective layer, between the conductive support substrate and the first conductive type InP cladding layer, for reflecting light emitted from the semiconductor light-emitting layer; and a plurality of recesses provided in a surface of the second conductive type InP cladding layer.Type: GrantFiled: December 15, 2017Date of Patent: December 21, 2021Assignee: DOWA Electronics Materials Co., Ltd.Inventors: Jumpei Yamamoto, Tetsuya Ikuta
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Patent number: 11201300Abstract: A condensed cyclic compound represented by Formula 1: wherein, in Formula 1, groups and variables are the same as described in the specification.Type: GrantFiled: March 12, 2019Date of Patent: December 14, 2021Assignees: SAMSUNG ELECTRONICS CO., LTD., SAMSUNG SDI CO., LTD.Inventors: Sangmo Kim, Eunsuk Kwon, Jongsoo Kim, Jhunmo Son, Dongseon Lee, Soonok Jeon, Yeonsook Chung, Yongsik Jung
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Patent number: 11195975Abstract: Solid state light emitting micropixels array structures having hydrogen barrier layers to minimize or eliminate undesirable passivation of doped GaN structures due to hydrogen diffusion.Type: GrantFiled: June 6, 2019Date of Patent: December 7, 2021Assignee: Ostendo Technologies, Inc.Inventors: Hussein S. El-Ghoroury, Kameshwar Yadavalli, Andrew Teren, Qian Fan
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Patent number: 11139339Abstract: An array substrate including a base substrate; a thin film transistor disposed on the base substrate, the thin film transistor including a gate electrode connected to a gate line; an active layer; a gate insulating layer insulating the gate electrode from the active layer; a first electrode connected to a data line; and a second electrode spaced apart from the first electrode; a micro light emitting diode disposed on a side of the gate insulating layer away from the base substrate, the micro light emitting diode including a first electrode, a light emitting layer and a second electrode; and a common electrode. The second electrode of the thin film transistor is connected to one of the first and second electrodes of the micro light emitting diode. The other of the first and second electrodes of the micro light emitting diode is connected to the common electrode.Type: GrantFiled: November 16, 2018Date of Patent: October 5, 2021Assignee: BOE TECHNOLOGY GROUP CO., LTD.Inventor: Chunping Long
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Patent number: 11133435Abstract: Provided is a technique for manufacturing a nitride semiconductor substrate with which it is possible to manufacture a nitride semiconductor substrate having sufficiently reduced dislocation density with a large area even if manufactured on an inexpensive substrate made of sapphire, etc. A nitride semiconductor substrate in which a nitride semiconductor layer formed on a substrate is formed by laminating an undoped nitride layer and a rare earth element-added nitride layer to which a rare earth element is added as a doping material, and the dislocation density is of the order of 106 cm?2 or less.Type: GrantFiled: November 20, 2017Date of Patent: September 28, 2021Assignee: OSAKA UNIVERSITYInventors: Yasufumi Fujiwara, Wanxin Zhu, Atsushi Koizumi, Brandon Mitchell, Tom Gregorkiewicz
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Patent number: 11114591Abstract: A coated phosphors that include a shell comprising a first Mn4+ doped phosphor of formula I Ax[MFy]:Mn4+??I directly disposed on a core comprising a second phosphor. The second phosphor is a material other than a compound of formula I or formula II Ax[MFy]??II wherein A is, independently at each occurrence, Li, Na, K, Rb, Cs, or a combination thereof; M is, independently at each occurrence, Si, Ge, Sn, Ti, Zr, Al, Ga, In, Sc, Hf, Y, La, Nb, Ta, Bi, Gd, or a combination thereof; x is the absolute value of the charge of the [MFy] ion; and y is 5, 6 or 7.Type: GrantFiled: August 17, 2016Date of Patent: September 7, 2021Assignee: CURRENT LIGHTING SOLUTIONS, LLCInventors: James Edward Murphy, William Winder Beers, William Erwin Cohen
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Patent number: 11101454Abstract: A method of peeling a mother protective film from a mother display panel includes: laminating the mother display panel and the mother protective film, the mother display panel including a plurality of display cells each including a display area and a peripheral area around the plurality of display cell; forming a target area and a dummy area in the mother protective film by forming a cutting line in a closed loop shape enclosing the target area corresponding to each of the display cells and a first additional cutting line in a first direction near the cutting line; physically peeling off the dummy area from the mother display panel, including: primarily peeling off a portion of the mother protective film adjacent to the first additional cutting line; and secondarily peeling off rest of the mother protective film from the mother display panel along the cutting line.Type: GrantFiled: October 1, 2019Date of Patent: August 24, 2021Assignee: Samsung Display Co., Ltd.Inventors: Jiwon Jung, Youngji Kim, Yiseul Um, Younghoon Lee, Youngseo Choi
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Patent number: 11094747Abstract: An organic EL display apparatus (100) has a plurality of pixels including red pixels (R), green pixels (G) and blue pixels (B), the apparatus (100) including: a substrate (1); a plurality of organic EL elements (10) supported on the substrate, with one organic EL element provided in each pixel; a generally lattice-shaped first bank (21) defining the pixels, the first bank including a plurality of first portions (21A) extending in a first direction and a plurality of second portions (21B) extending in a second direction that crosses the first direction; and a plurality of second banks (22) provided on a top portion (21t) of the first bank, wherein the second banks are not formed at intersections (cr) between the first portions and the second portions of the first bank, and the second banks are more liquid repellent than the first bank.Type: GrantFiled: March 18, 2020Date of Patent: August 17, 2021Assignee: Sakai Display Products CorporationInventors: Yukiya Nishioka, Katsuhiko Kishimoto
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Patent number: 11038079Abstract: A light-emitting device and a manufacturing method thereof are provided. The light-emitting device includes a substrate, an epitaxial blocking layer, and a light-emitting epitaxial structure. The substrate has a surface, in which the surface includes a plurality of protruding parts and a plurality of recess parts relative to the protruding parts. The epitaxial blocking layer disposed on the substrate covers the recess parts and exposes the protruding parts. The light-emitting epitaxial structure disposed on the substrate is connected to the protruding parts and is disposed above the recess parts. The light-emitting epitaxial structure is formed by using the protruding parts as a growth surface thereof so as to have a better crystalline quality.Type: GrantFiled: July 2, 2019Date of Patent: June 15, 2021Assignees: KAISTAR LIGHTING (XIAMEN) CO., LTD., BRIDGELUX WUXI R&D CO., LTD.Inventors: Hung-Chih Yang, Xiao-Kun Lin, Jian-Ran Huang, Ben-Jie Fan, Ho-Chien Chen, Chan-Yang Lu, Shuen-Ta Teng, Cheng-Chang Hsieh
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Patent number: 11024769Abstract: A group III nitride semiconductor light-emitting element comprises, in the following order: an n-type group III nitride semiconductor layer; a group III nitride semiconductor laminated body obtained by alternately laminating a barrier layer and a well layer narrower in bandgap than the barrier layer in the stated order so that the number of barrier layers and the number of well layers are both N, where N is an integer; an AlN guide layer; and a p-type group III nitride semiconductor layer. The AlN guide layer has a thickness of 0.7 nm or more and 1.7 nm or less. An Nth well layer in the group III nitride semiconductor laminated body and the AlN guide layer are in contact with each other, or a final barrier layer is further provided between the Nth well layer and the AlN guide layer.Type: GrantFiled: September 12, 2019Date of Patent: June 1, 2021Assignee: DOWA Electronics Materials Co., Ltd.Inventors: Yasuhiro Watanabe, Takehiko Fujita
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Patent number: 11001940Abstract: A new GaN single crystal is provided. A GaN single crystal according to the present embodiment comprises a gallium polar surface which is a main surface on one side and a nitrogen polar surface which is a main surface on the opposite side, wherein on the gallium polar surface is found at least one square area, an outer periphery of which is constituted by four sides each with a length of 2 mm or more, and, when the at least one square are is divided into a plurality of sub-areas each of which is a square of 100 ?m×100 ?m, pit-free areas account for 80% or more of the sub-areas.Type: GrantFiled: November 20, 2018Date of Patent: May 11, 2021Assignee: MITSUBISHI CHEMICAL CORPORATIONInventors: Hideo Fujisawa, Yutaka Mikawa, Shinichiro Kawabata, Hideo Namita, Tae Mochizuki
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Patent number: 10991850Abstract: A group III nitride semiconductor light-emitting element comprises, in the following order: an n-type group III nitride semiconductor layer; a group III nitride semiconductor laminated body obtained by alternately laminating a barrier layer and a well layer narrower in bandgap than the barrier layer in the stated order so that the number of barrier layers and the number of well layers are both N, where N is an integer; an AlN guide layer; and a p-type group III nitride semiconductor layer. The AlN guide layer has a thickness of 0.7 nm or more and 1.7 nm or less. An Nth well layer in the group III nitride semiconductor laminated body and the AlN guide layer are in contact with each other, or a final barrier layer is further provided between the Nth well layer and the AlN guide layer.Type: GrantFiled: September 12, 2019Date of Patent: April 27, 2021Assignee: DOWA Electronics Materials Co., Ltd.Inventors: Yasuhiro Watanabe, Takehiko Fujita
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Patent number: 10916706Abstract: A composition having excellent dischargeability by an ink jet method and reduced clogging of an ink jet apparatus is provided. The composition contains a fluorinated alcohol A represented by the formula (1) and having a boiling point of 50° C. or more and less than 150° C., a fluorinated alcohol B represented by the formula (1) and having a boiling point of 150° C. or more and less than 300° C., and a charge transportable compound, in which the ratio rate of the fluorinated alcohol B with respect to 100 parts by mass of the sum of the fluorinated alcohol A and the fluorinated alcohol B is 10 parts by mass to 90 parts by mass: CnFH2nF+1-mFFnFOH ??(1) In formula (1), nF is an integer of 1 to 12 and mF is an integer of 1 to 25, provided that 2nF+1?mF.Type: GrantFiled: January 23, 2018Date of Patent: February 9, 2021Assignee: SUMITOMO CHEMICAL COMPANY, LIMITEDInventors: Masanobu Tanaka, Motoo Noda
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Patent number: 10910250Abstract: The present disclosure relates to a method for mechanically separating layers, in particular in a double layer transfer process. The present disclosure relates more in particular to a method for mechanically separating layers, comprising the steps of providing a semiconductor compound comprising a layer of a handle substrate and an active layer with a front main side and a back main side opposite the front main side, wherein the layer of the handle substrate is attached to the front main side of the active layer, then providing a layer of a carrier substrate onto the back main side of the active layer, and then initiating mechanical separation of the layer of the handle substrate, wherein the layer of the handle substrate and the layer of the carrier substrate are provided with a substantially symmetrical mechanical structure.Type: GrantFiled: June 1, 2016Date of Patent: February 2, 2021Assignee: SoitecInventors: Marcel Broekaart, Ionut Radu, Didier Landru
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Patent number: 10903352Abstract: A manufacturing method of a vertical GaN-based semiconductor device having: a GaN-based semiconductor substrate; a GaN-based semiconductor layer including a drift region having doping concentration of an n type impurity, which is lower than that of the GaN-based semiconductor substrate, and is provided on the GaN-based semiconductor substrate; and MIS structure having the GaN-based semiconductor layer, an insulating film contacting the GaN-based semiconductor layer, and a conductive portion contacting the insulating film, the method includes: implanting an n type dopant in a back surface of the GaN-based semiconductor substrate after forming of the MIS structure, and annealing the GaN-based semiconductor substrate after the implanting of the n type dopant.Type: GrantFiled: November 1, 2018Date of Patent: January 26, 2021Assignee: FUJI ELECTRIC CO., LTD.Inventors: Shinya Takashima, Katsunori Ueno, Masaharu Edo
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Patent number: 10851293Abstract: A method includes mixing a first fluoride phosphor powder that is doped with tetravalent manganese with a treatment solution for a designated period of time, stopping the mixing to allow the fluoride phosphor powder to settle, removing at least some liquid that has separated from the first fluoride phosphor powder, repeating (a) the mixing, (b) the stopping of the mixing, and (c) removing at least some of the liquid during one or more additional cycles, and obtaining a second fluoride phosphor powder following the repeating of the mixing, the stopping of the mixing, and the removing of at least some of the liquid. The second fluoride phosphor powder includes a reduced amount of the manganese relative to the first fluoride phosphor powder.Type: GrantFiled: January 20, 2017Date of Patent: December 1, 2020Assignee: CURRENT LIGHTING SOLUTIONS, LLCInventors: Fangming Du, William Winder Beers, William Erwin Cohen, Clark David Nelson
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Patent number: 10847759Abstract: A method of manufacturing a display apparatus according to some embodiments of the present disclosure includes preparing a display substrate in which at least one hole region is defined when viewed in a planar view, disposing a first adhesive film on the display substrate, etching the hole region of the display substrate by irradiating first light in the form of laser light, and peeling off the first adhesive film, wherein the first adhesive film transmits at least a portion of the first light.Type: GrantFiled: October 21, 2019Date of Patent: November 24, 2020Assignee: Samsung Display Co., Ltd.Inventors: Hyojin Kim, Sokwon Noh, Changhan Lee, Myunghwan Kim, Sangyeol Kim, Woohyun Kim, Taehyun Sung, Sejoong Shin, Horyun Chung
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Patent number: 10763392Abstract: A light emitting device including a substrate, a first semiconductor layer, a mesa disposed thereon and including a second semiconductor layer and an active layer, a first contact electrode contacting the first semiconductor layer exposed around the mesa, a second contact electrode contacting the second semiconductor layer, a passivation layer covering the first contact electrode, the mesa, and the second contact electrode and having openings disposed on the first and second contact electrodes, and first and second bump electrodes electrically connected to the first and second contact electrodes through the openings, respectively, in which the mesa has indentations in plan view, the first contact electrode is spaced apart from the mesa by a predetermined distance, surrounds the mesa, and contacts the first semiconductor layer in the indentations, and each of the first and second bump electrodes covers one of the openings of the passivation layer and a portion thereof.Type: GrantFiled: January 17, 2020Date of Patent: September 1, 2020Assignee: Seoul Viosys Co., Ltd.Inventors: Seong Kyu Jang, Hong Suk Cho, Kyu Ho Lee, Chi Hyun In
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Patent number: 10731076Abstract: Processes for producing stable Mn4+ doped phosphors include dispersing a compound of formula I in a solution comprising a compound of formula II to form a dispersion; applying pressure to the dispersion at a temperature less than 200° C. to form a phosphor product; and contacting the phosphor product with a fluorine-containing oxidizing agent in gaseous form at an elevated temperature; wherein A is Li, Na, K, Rb, Cs, or a combination thereof; M is Si, Ge, Sn, Ti, Zr, Al, Ga, In, Sc, Hf, Y, La, Nb, Ta, Bi, Gd, or a combination thereof; x is the absolute value of the charge of the [MFy] ion; and y is 5, 6 or 7.Type: GrantFiled: October 26, 2017Date of Patent: August 4, 2020Assignee: CURRENT LIGHTING SOLUTIONS, LLCInventors: Anant Achyut Setlur, James Edward Murphy
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Patent number: 10700135Abstract: An organic light-emitting diode (OLED) display panel and an OLED display device are provided. The OLED display panel comprises a first substrate; a first electrode layer disposed on the first substrate and including a plurality of first electrodes; a hole transport layer disposed on a surface of the first electrode layer far away from the first substrate, and formed by a first hole transport material and a second hole transport material having different carrier mobility; a plurality of light-emitting devices disposed on a surface of the hole transport layer far away from the first electrode layer and arranged in correspondence with the plurality of first electrodes respectively; an electron transport layer disposed on a surface of the plurality of light-emitting devices far away from the hole transport layer; and a second electrode layer disposed on a surface of the electron transport layer far away from the plurality of light-emitting devices.Type: GrantFiled: May 12, 2017Date of Patent: June 30, 2020Assignees: SHANGHAI TIANMA AM-OLED CO., LTD., TIANMA MICRO-ELECTRONICS CO., LTD.Inventors: Xiangcheng Wang, Jinghua Niu, Wei He, Yuji Hamada, Chen Liu, Honggang Yan
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Patent number: 10692825Abstract: A light emitting chip package includes a light-emitting chip, a molding compound, and a redistribution wiring structure. The light-emitting chip includes an emission zone, a first electrode, and a second electrode. The molding compound covers at least a sidewall of the light-emitting chip and supports the light-emitting chip. The redistribution wring structure disposed in the molding compound includes a first interconnect wiring structure electrically connected to the first electrode and a second interconnect wiring structure electrically connected to the second electrode. The first interconnect wiring structure and the second interconnect wiring structure respectively include a first pad and a second pad, and the first pad and the second pad are located at the same side of the light emitting chip package.Type: GrantFiled: February 15, 2019Date of Patent: June 23, 2020Assignee: HLJ TECHNOLOGY CO., LTD.Inventors: Chih-Hung Chuang, Jen-Hsiang Yang
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Patent number: 10636845Abstract: An organic EL display apparatus (100) has a plurality of pixels including red pixels (R), green pixels (G) and blue pixels (B), the apparatus (100) including: a substrate (1); a plurality of organic EL elements (10) supported on the substrate, with one organic EL element provided in each pixel; a generally lattice-shaped first bank (21) defining the pixels, the first bank including a plurality of first portions (21A) extending in a first direction and a plurality of second portions (21B) extending in a second direction that crosses the first direction; and a plurality of second banks (22) provided on a top portion (21t) of the first bank, wherein the second banks are not formed at intersections (cr) between the first portions and the second portions of the first bank, and the second banks are more liquid repellent than the first bank.Type: GrantFiled: December 25, 2017Date of Patent: April 28, 2020Assignee: Sakai Display Products CorporationInventors: Yukiya Nishioka, Katsuhiko Kishimoto
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Patent number: 10573783Abstract: A group III nitride semiconductor light-emitting element having longer element life than conventional group III nitride semiconductor light-emitting elements and a method of manufacturing the same are provided. A group III nitride semiconductor light-emitting element 100 comprises, in the following order: an n-type group III nitride semiconductor layer 30; a group III nitride semiconductor laminated body 40 obtained by alternately laminating a barrier layer 40a and a well layer 40b narrower in bandgap than the barrier layer 40a in the stated order so that the number of barrier layers 40a and the number of well layers 40b are both N, where N is an integer; an AlN guide layer 60; and a p-type group III nitride semiconductor layer 70, wherein the AlN guide layer 60 has a thickness of 0.5 nm or more and 2.0 nm or less.Type: GrantFiled: June 22, 2016Date of Patent: February 25, 2020Assignee: DOWA Electronics Materials Co., Ltd.Inventors: Yasuhiro Watanabe, Takehiko Fujita
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Patent number: 10573780Abstract: An ultraviolet light-emitting device including a substrate, a first conductive type semiconductor layer disposed on the substrate, a mesa disposed on the first conductive type semiconductor layer and including a second conductive type semiconductor layer and an active layer disposed between the semiconductor layers, a first contact electrode contacting the exposed first conductive type semiconductor layer around the mesa, a second contact electrode contacting the second conductive type semiconductor layer on the mesa, a passivation layer covering the first contact electrode, the mesa, and the second contact electrode and having openings disposed above the first and second contact electrodes, and first and second bump electrodes electrically connected to the first and second contact electrodes through the openings of the passivation layer, in which the mesa has depressions in plan view, and the first and second bump electrodes cover the openings and a portion of the passivation layer.Type: GrantFiled: January 11, 2017Date of Patent: February 25, 2020Assignee: Seoul Viosys Co., Ltd.Inventors: Seong Kyu Jang, Hong Suk Cho, Kyu Ho Lee, Chi Hyun In
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Patent number: 10516077Abstract: Provided is a display apparatus. The display apparatus may include a monolithic device in which a light emitting element array, a transistor array, and a color control member are monolithically provided on one substrate. The display apparatus may include a first layered structure including the light emitting element array, a second layered structure including the transistor array, and a third layered structure including the color control member, wherein the second layered structure may be between the first layered structure and the third layered structure. The light emitting element array may include a plurality of light emitting elements comprising an inorganic material. The plurality of light emitting elements may have a vertical nanostructure.Type: GrantFiled: June 5, 2018Date of Patent: December 24, 2019Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Chilhee Chung, Junhee Choi, Sungwoo Hwang, Shinae Jun, Deukseok Chung, Junseok Cho
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Patent number: 10403496Abstract: A method of forming a compound semiconductor substrate includes providing a crystalline base substrate having a first semiconductor material and a main surface, and forming a first semiconductor layer on the main surface and having a pair of tracks disposed on either side of active device regions. The first semiconductor layer is formed from a second semiconductor material having a different coefficient of thermal expansion than the first semiconductor material. The pair of tracks have a relatively weaker crystalline structure than the active device regions. The method further includes thermally cycling the base substrate and the first semiconductor layer such that the first semiconductor layer expands and contracts at a different rate than the base substrate. The pair of tracks physically decouple adjacent ones of the active device regions during the thermal cycling.Type: GrantFiled: August 30, 2017Date of Patent: September 3, 2019Assignee: Infineon Technologies Austria AGInventors: Simone Lavanga, Uttiya Chowdhury
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Patent number: 10396250Abstract: An exemplary light emitting diode is provided to comprise: a first semiconductor layer; a mesa disposed on the first semiconductor layer and including an active layer and a second semiconductor layer disposed on the active layer; a ZnO transparent electrode disposed on the mesa; a first electrode disposed on the first semiconductor layer; and a second electrode disposed on the ZnO transparent electrode, and including a second electrode pad and at least one second electrode extending portion extending from the second electrode pad. The second electrode extending portion contacts the ZnO transparent electrode. The ZnO transparent electrode includes a first region and a second region. The first region protrudes from the top surface of the ZnO transparent electrode, includes a plurality of projecting portions arranged in a predetermined pattern, the thickness of the first region greater than the thickness of the second region.Type: GrantFiled: January 12, 2018Date of Patent: August 27, 2019Assignee: SEOUL VIOSYS CO., LTD.Inventors: Chan Seob Shin, Myoung Hak Yang, Yeo Jin Yoon, Seom Geun Lee
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Patent number: 10392724Abstract: A process of forming an epitaxial wafer is disclosed. The process includes steps of (a) growing an aluminum nitride (AlN) layer at a first temperature and a first flow rate of ammonia (NH3); and (b) growing a gallium nitride (GaN) layer on the AlN layer. The step (b) includes a first period and a second period. At least one of a temperature from the first temperature to a second temperature that is lower than the first temperature and a flow rate of NH3 from the first flow rate to a second flow rate different from the first flow rate is carried out during the first period. The second period grows the GaN layer at the second temperature and the second flow rate of NH3.Type: GrantFiled: March 26, 2018Date of Patent: August 27, 2019Assignee: SUMITOMO ELECTRIC INDUSTRIES, LTD.Inventor: Keiichi Yui
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Patent number: 10297650Abstract: Disclosed is an organic light emitting diode (OLED) display device including a substrate including a pixel region and a boundary region outside the pixel region. The pixel region comprises an area having a short side and a long side. The pixel region comprises an array of pixels to emit light. The OLED display device includes a substrate in the pixel region and in the boundary region The OLED display device further includes a first electrode of a light emitting device in the pixel region over the substrate, a first bank covering edges of the first electrode in the pixel region on the substrate in the boundary region, wherein a width of an edge of the first bank along the short side of the pixel region is different from a width of an edge of the first bank along the long side of the pixel region, and a second bank on a portion of the first bank in the boundary region.Type: GrantFiled: March 20, 2018Date of Patent: May 21, 2019Assignee: LG Display Co., Ltd.Inventors: Hong-Ki Park, Hyo-Dae Bae
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Patent number: 10297976Abstract: A diode laser bar assembly is formed to exhibit a relatively low thermal resistance, which also providing an increased range of conditions over which the internal stress conditions may be managed. In particular, the submount configuration of the prior art is replaced by a pair of platelets, disposed above and below the diode laser bar so as to form a “sandwich” structure. The bottom platelet is disposed between the heatsink (cooler) and the diode laser bar. Thus, the bottom platelet may be relatively thin, creating a low thermal resistance configuration. The combination of the top and bottom platelets provides the ability to create various configurations and designs that best accommodate stress conditions for a particular situation.Type: GrantFiled: May 16, 2016Date of Patent: May 21, 2019Assignee: II-VI Laser Enterprise GmbHInventors: Jürgen Müller, Rainer Bättig, Reinhard Brunner, Stefan Weiss
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Patent number: 10170303Abstract: A system and method for growing a gallium nitride (GaN) structure that includes providing a template; and growing at least a first GaN layer on the template using a first sputtering process, wherein the first sputtering process includes: controlling a temperature of a sputtering target, and modulating between a gallium-rich condition and a gallium-lean condition, wherein the gallium-rich condition includes a gallium-to-nitrogen ratio having a first value that is greater than 1, and wherein the gallium-lean condition includes the gallium-to-nitrogen ratio having a second value that is less than the first value. Some embodiments include a load lock configured to load a substrate wafer into the system and remove the GaN structure from the system; and a plurality of deposition chambers, wherein the plurality of deposition chambers includes a GaN-deposition chamber configured to grow at least the first GaN layer on a template that includes the substrate wafer.Type: GrantFiled: May 26, 2017Date of Patent: January 1, 2019Inventor: Robbie J. Jorgenson
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Patent number: 10153404Abstract: In one embodiment, a solid cylindrical tablet is pre-formed for a reflective cup containing an LED die, such as a blue LED die. The tablet comprises uniformly-mixed phosphor particles and transparent/translucent particles of a high TC material, such as quartz, in a hardened silicone binder, where the index of refraction of the high TC material is matched to that of the silicone to minimize internal reflection. Tablets can be made virtually identical in composition and size. The bulk of the tablet will be the high TC material. After the tablet is placed in the cup, the LED module is heated, preferably in a vacuum, to melt the silicone so that the mixture flows around the LED die and fills the voids to encapsulate the LED die. The silicone is then cooled to harden.Type: GrantFiled: September 6, 2017Date of Patent: December 11, 2018Assignee: Lumileds LLCInventors: Grigoriy Basin, Mikhail Fouksman
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Patent number: 10096774Abstract: The present invention discloses an evaporation method and an evaporation device. The evaporation method includes successively providing at least one mask above a base substrate and forming at least one evaporation sub-pattern on the base substrate by an evaporation process so that an evaporation pattern is formed on the base substrate, wherein the evaporation pattern is constituted by the at least one evaporation sub-pattern. As the evaporation pattern finally formed is constituted by the at least one evaporation sub-pattern, only a small number of opening regions are required to be formed on each of the masks used for forming the evaporation sub-patterns compared with the prior art, so that the widths of the shield regions between the adjacent opening regions may be set to be larger.Type: GrantFiled: July 25, 2014Date of Patent: October 9, 2018Assignees: BOE Technology Group Co., Ltd., Ordos Yuansheng Optoelectronics Co., Ltd.Inventors: Junsheng Chen, Cheng Li
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Patent number: 10026704Abstract: An embodiment is a method including forming a first passive device in a first wafer, forming a first dielectric layer over a first side of the first wafer, forming a first plurality of bond pads in the first dielectric layer, planarizing the first dielectric layer and the first plurality of bond pads to level top surfaces of the first dielectric layer and the first plurality of bond pads with each other, hybrid bonding a first device die to the first dielectric layer and at least some of the first plurality of bond pads, and encapsulating the first device die in a first encapsulant.Type: GrantFiled: September 18, 2017Date of Patent: July 17, 2018Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Chi-Hsi Wu, Der-Chyang Yeh, Hsien-Wei Chen, Jie Chen
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Patent number: 9997665Abstract: A light emitting diode has a light emitting region including a multiple quantum well structure, including a first protection layer, a first intermediate layer over the first protection layer, a quantum barrier layer over the first intermediate layer, a second intermediate layer over the well layer, a second protection layer over the second intermediate layer, and a quantum barrier layer over the second protection layer.Type: GrantFiled: June 7, 2016Date of Patent: June 12, 2018Assignee: XIAMEN SANAN OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventors: Zhibin Liu, Shasha Chen, Dongyan Zhang, Xiaofeng Liu, Duxiang Wang
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Patent number: 9997672Abstract: An electrode structure of an LED includes an adhesion layer and a bond pad layer. The adhesion layer is stacked on the LED. The bond pad layer is stacked on the adhesion layer. The bond pad layer includes at least two first metal layers, at least two second metal layers and an outermost gold layer sequentially and alternately stacked. The first metal layers are selected from the group consisting Al and an Al alloy, and the second metal layers are selected from the group consisting of Ti, Ni, Cr, Pt, Pd, TiN, TiW, W, Rh and Cu. Thus, the main structure of the bond pad layer is a stacked structure of the first metal layers and the second metal layers. The first metal layers may be selected from a low-cost material, and the second metal layers improve issues of inadequate hardness and electromigration of the first metal layers.Type: GrantFiled: October 5, 2016Date of Patent: June 12, 2018Assignee: TEKCORE CO., LTD.Inventors: Hai-Wen Hsu, Jia-Hong Sun
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Patent number: 9991671Abstract: A method for producing a semiconductor laser element includes providing a semiconductor wafer comprising: a nitride semiconductor substrate, and a semiconductor stack located on the substrate, the semiconductor stack including a plurality of nitride semiconductor layers; forming in the substrate a fissure starting point and a fissure extending from the fissure starting point; forming a cleavage reference portion extending parallel to a cleavage plane of the semiconductor wafer as estimated from a plan view shape of the fissure; and cleaving the semiconductor wafer parallel to the cleavage reference portion to thereby obtain resonator end faces.Type: GrantFiled: September 7, 2016Date of Patent: June 5, 2018Assignee: NICHIA CORPORATIONInventors: Hiroki Sakata, Hiroki Koizumi
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Patent number: 9991414Abstract: In a method according to embodiments of the invention, a III-nitride layer is grown on a growth substrate. The III-nitride layer is connected to a host substrate. The growth substrate is removed. The growth substrate is a non-III-nitride material. The growth substrate has an in-plane lattice constant asubstrate. The III-nitride layer has a bulk lattice constant alayer. In some embodiments, [(|asubstrate?alayer|)/asubstrate]*100% is no more than 1%.Type: GrantFiled: April 7, 2017Date of Patent: June 5, 2018Assignee: Lumileds LLCInventors: Nathan Frederick Gardner, Melvin Barker McLaurin, Michael Jason Grundmann, Werner Goetz, John Edward Epler, Qi Ye
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Patent number: 9938148Abstract: A method of producing nitride nanoparticles comprises reacting at least one organometallic compound, for example an alkyl metal, with at least one source of nitrogen. The reaction may involve one or more liquid phase organometallic compounds, or may involve one or more liquid phase organometallic compounds dissolved in a solvent or solvent mixture. The reaction constituents may be heated to a desired reaction temperature (for example in the range 40° C. to 300° C.).Type: GrantFiled: November 12, 2013Date of Patent: April 10, 2018Assignee: Sharp Kabushiki KaishaInventors: Alastair James Daniel Grundy, Peter Neil Taylor, Michael Alan Schreuder, Stewart Edward Hooper, Jonathan Heffernan
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Patent number: 9941447Abstract: A method for producing a semiconductor light emitting device includes providing a light emitting element that includes a semiconductor layer structure on a side of a lower surface of a substrate. The light emitting element is placed on a supporting member via a connecting member so that the semiconductor layer structure of the light emitting element faces the supporting member. Surfaces of the substrate, and the semiconductor layer structure, and a side of the connecting member with a light reflection layer are coated using atomic layer deposition so as to expose at least a part of at least one of an upper surface and a side surface of the substrate as a light-extracting region after the light emitting element is placed on the supporting member.Type: GrantFiled: December 13, 2016Date of Patent: April 10, 2018Assignee: NICHIA CORPORATIONInventor: Masatsugu Ichikawa
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Patent number: 9876081Abstract: A method to remove epitaxial semiconductor layers from a substrate by growing an epitaxial sacrificial layer on the substrate where the sacrificial layer is a transition metal nitride (TMN) or a TMN ternary compound, growing one or more epitaxial device layers on the sacrificial layer, and separating the device layers from the substrate by etching the sacrificial layer to completely remove the sacrificial layer without damaging or consuming the substrate or any device layer. Also disclosed are the related semiconductor materials made by this method.Type: GrantFiled: July 15, 2014Date of Patent: January 23, 2018Assignee: The United States of America, as represented by the Secretary of the NavyInventors: David J. Meyer, Brian P. Downey
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Patent number: 9799512Abstract: A semiconductor substrate structure includes a seed layer on a substrate, a first gallium nitride layer on the seed layer, and a patterned first hard mask layer on the first gallium nitride layer, wherein the patterned first hard mask layer includes a first opening. The semiconductor substrate structure also includes a second gallium nitride layer in the first opening and on the patterned first hard mask layer, a patterned second hard mask layer on the second gallium nitride layer, wherein the patterned second hard mask layer includes a second opening, and at least a portion of a projection on the substrate of the first opening and a projection on the substrate of the second opening are non-overlapped. The semiconductor substrate structure further includes a third gallium nitride layer in the second opening and on the patterned second hard mask layer.Type: GrantFiled: November 25, 2016Date of Patent: October 24, 2017Assignee: Vanguard International Semiconductor CorporationInventors: Yu-Lung Chin, Shin-Cheng Lin
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Patent number: 9793166Abstract: A lift-off method for transferring an optical device layer in an optical device wafer to a transfer substrate, the optical device layer being formed on the front side of an epitaxy substrate through a buffer layer. A transfer substrate is bonded through a bonding layer to the front side of the optical device layer of the optical device wafer, thereby forming a composite substrate. A pulsed laser beam having a wavelength transmissive to the epitaxy substrate and absorptive to the buffer layer is applied from the back side of the epitaxy substrate to the buffer layer, thereby breaking the buffer layer, and the epitaxy substrate is peeled from the optical device layer, thereby transferring the optical device layer to the transfer substrate. Ultrasonic vibration is applied to the composite substrate in transferring the optical device layer.Type: GrantFiled: May 19, 2015Date of Patent: October 17, 2017Assignee: DISCO CORPORATIONInventors: Tasuku Koyanagi, Noboru Takeda, Hiroshi Morikazu
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Patent number: 9786867Abstract: A method for manufacturing an organic light emitting display device that includes a gate electrode, a source electrode, and a drain electrode in a display area of a display substrate, and an organic light emitting display device, the method including forming an auxiliary electrode in a non-display area of the display substrate; forming a first electrode that is electrically connected with the drain electrode and the auxiliary electrode; providing a magnetic particle on the first electrode in the non-display area of the display substrate, the magnetic particle being carried in an organic material; fixing the magnetic particle to the first electrode using a first electromagnet; removing the organic material; forming an organic light emitting material on the first electrode and the magnetic particle; removing the magnetic particle and the organic light emitting material formed on the magnetic particle using a second electromagnet provided at a distance from the magnetic particle; and forming a second electrode oType: GrantFiled: January 19, 2016Date of Patent: October 10, 2017Assignee: SAMSUNG DISPLAY CO., LTD.Inventor: Sung Jin Choi
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Patent number: 9761765Abstract: In one embodiment, a solid cylindrical tablet is pre-formed for a reflective cup containing an LED die, such as a blue LED die. The tablet comprises uniformly-mixed phosphor particles and transparent/translucent particles of a high TC material, such as quartz, in a hardened silicone binder, where the index of refraction of the high TC material is matched to that of the silicone to minimize internal reflection. Tablets can be made virtually identical in composition and size. The bulk of the tablet will be the high TC material. After the tablet is placed in the cup, the LED module is heated, preferably in a vacuum, to melt the silicone so that the mixture flows around the LED die and fills the voids to encapsulate the LED die. The silicone is then cooled to harden.Type: GrantFiled: April 2, 2014Date of Patent: September 12, 2017Assignee: KONINKLIJKE PHILIPS N.V.Inventors: Grigoriy Basin, Mikhail Fouksman
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Patent number: 9750150Abstract: A break resistant sapphire plate and a corresponding production process. The sapphire plate may include a planar sapphire substrate, and at least one shock absorbing layer arranged on a surface of the substrate. The shock absorbing layer may have a thickness of between 0.1% to 10% of the thickness of the substrate. The production process for producing the sapphire plate may include providing a planar sapphire substrate, and coating at least one surface of the substrate with a shock absorbing layer. The shock absorbing layer may include a layer thickness between 0.1% to 10% of the thickness of the substrate.Type: GrantFiled: August 6, 2014Date of Patent: August 29, 2017Assignee: APPLE INC.Inventors: Rudolf Beckmann, Sabine Nolker
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Patent number: 9748094Abstract: A semiconductor compound structure and a method of fabricating the semiconductor compound structure using graphene or carbon nanotubes, and a semiconductor device including the semiconductor compound structure. The semiconductor compound structure includes a substrate; a buffer layer disposed on the substrate, and formed of a material including carbons having hexagonal crystal structures; and a semiconductor compound layer grown and formed on the buffer layer.Type: GrantFiled: April 27, 2011Date of Patent: August 29, 2017Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jun-hee Choi, Un-jeong Kim, Sang-jin Lee
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Patent number: 9728610Abstract: There are disclosed herein various implementations of a semiconductor component with a multi-layered nucleation body and method for its fabrication. The semiconductor component includes a substrate, a nucleation body situated over the substrate, and a group III-V semiconductor device situated over the nucleation body. The nucleation body includes a bottom layer formed at a low growth temperature, and a top layer formed at a high growth temperature. The nucleation body also includes an intermediate layer that is formed substantially continuously using a varying intermediate growth temperature.Type: GrantFiled: February 5, 2016Date of Patent: August 8, 2017Assignee: Infineon Technologies Americas Corp.Inventors: Jianwei Wan, Scott Nelson, Srinivasan Kannan, Peter Kim