By Application Of Corpuscular Or Electromagnetic Radiation (e.g., Electron, Laser, Etc.) Patents (Class 438/535)
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Patent number: 6083779Abstract: A method for fabricating a thin film transistor of a liquid crystal display device comprising the steps of introducing a dopant into an indium tin oxide layer or gate insulating layer with an ion shower doping process, forming an amorphous silicon layer thereon, exposing the amorphous silicon layer with a laser beam to diffuse the dopant into the amorphous layer and activate the dopant. As a result of the laser annealing, an n or p-type ohmic polysilicon layer and an intrinsic polysilicon channel layer can be formed. A gate electrode can also be formed on a gate insulating layer using a gate mask.Type: GrantFiled: February 5, 1999Date of Patent: July 4, 2000Assignee: LG Electronics IncInventor: Seong Moh Seo
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Patent number: 6071762Abstract: A process for manufacturing a TFT without the use of ion implantation is described. Instead, heavily doped layers of amorphous silicon are used as diffusion sources. Two embodiments of the invention are described. In the first embodiment the gate pedestal is deposited first, followed by gate oxide and an amorphous layer of undoped silicon. This is followed by the layer of heavily doped amorphous silicon which is subjected to a relatively low energy laser scan which drives in a small amount of dopant and converts it to N-. After the N+ layer has been patterned and etched to form source and drain electrodes, a second, higher energy, laser scan is given. This brings the source and drain very close to, but not touching, the channel, resulting in an LDD type of structure. In the second embodiment a layer of intrinsic polysilicon is used for the channel. It is covered with a layer of gate oxide and a metallic gate pedestal.Type: GrantFiled: November 16, 1998Date of Patent: June 6, 2000Assignee: Industrial Technology Research InstituteInventors: Hong-Woei Wu, Yeong-E Chen, Gwo-Long Lin
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Patent number: 6054375Abstract: Laser apparatus and methods are provided for synthesizing areas of ceramic substrates or thin films, such ceramics as Silicon Carbide and Aluminum Nitride, to produce electronic devices and circuits as integral electron circuit components thereof. Circuit components such as conductive tabs, interconnects, wiring patterns, resistors, capacitors, insulating layers and semiconductors are synthesized on the surfaces and within the body of such ceramics. Selected groupings and arrangements of these electronic circuit components within the substrates or thin films provide a wide range of circuits for applications such as digital logic elements and circuits, transistors, sensors for measurements and monitoring effects of chemical and/or physical reactions and interactions of materials, gases, devices or circuits that may utilize sensors.Type: GrantFiled: June 1, 1998Date of Patent: April 25, 2000Inventor: Nathaniel R. Quick
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Patent number: 6001715Abstract: Bulk crystalline materials are annealed by introducing into them mechanical energy of sufficient intensity to create a large amplitude sound wave. The mechanical energy may be introduced into the material, for example, by laser ablation. Where the bulk crystalline material is a doped semiconductor, the process also electrically activates the material.Type: GrantFiled: June 26, 1996Date of Patent: December 14, 1999Assignee: The United States of America as represented by the Secretary of the NavyInventors: Charles Keith Manka, Jacob Grun, Billy Charles Covington, David William Donnelly
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Patent number: 5998272Abstract: A process in accordance with the invention minimizes the number of heat steps to which an source-drain extension region is exposed, thus minimizing source-drain extension region diffusion and allowing more precise control of source-drain extension region thickness over conventional processes. In accordance with the invention, spacers are formed abutting the gate and then heavily doped source and drain regions are formed. The gate and source and drain regions are silicided. The spacers are subsequently removed and source-drain extension regions are then formed. In one embodiment of the invention, a laser doping process is used to form the source-drain extension regions.Type: GrantFiled: November 12, 1996Date of Patent: December 7, 1999Assignee: Advanced Micro Devices, Inc.Inventors: Emi Ishida, Scott Luning, Dong-Hyuk Ju
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Patent number: 5994174Abstract: Display pixels driven by silicon thin film transistors are fabricated on plastic substrates for use in active matrix displays, such as flat panel displays. The process for forming the pixels involves a prior method for forming individual silicon thin film transistors on low-temperature plastic substrates. Low-temperature substrates are generally considered as being incapable of withstanding sustained processing temperatures greater than about 200.degree. C. The pixel formation process results in a complete pixel and active matrix pixel array. A pixel (or picture element) in an active matrix display consists of a silicon thin film transistor (TFT) and a large electrode, which may control a liquid crystal light valve, an emissive material (such as a light emitting diode or LED), or some other light emitting or attenuating material. The pixels can be connected in arrays wherein rows of pixels contain common gate electrodes and columns of pixels contain common drain electrodes.Type: GrantFiled: September 29, 1997Date of Patent: November 30, 1999Assignee: The Regents of the University of CaliforniaInventors: Paul G. Carey, Patrick M. Smith
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Patent number: 5953598Abstract: A fabrication sequence of a thin film transistor, in which a photoresist film is used as an ion doping mask to shield a portion of an amorphous semiconductor layer larger than a gate electrode formed above in width (gate length). The mask is designed by pre-calculating the accuracy of the alignment and etching, so that the gate electrode overlaps neither the source region nor drain region. Thus, it has become possible to form the gate electrode in such a manner not to overlap the source region or drain region while securing an impurity-free offset region. As a result, the present thin film transistor can reduce the OFF-state current and renders excellent OFF-state characteristics, and therefore, when employed in a liquid crystal display device, the resulting liquid crystal display device can prevent display defects, such as a flicker.Type: GrantFiled: August 15, 1996Date of Patent: September 14, 1999Assignee: Sharp Kabushiki KaishaInventors: Akihiro Hata, Masahiro Adachi
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Patent number: 5946587Abstract: The present invention aims to provide a continuous forming method and apparatus for functional deposited films having excellent characteristics while preventing any mutual mixture of gases between film forming chambers having different pressures, wherein each of semiconductor layers of desired conduction type is deposited on a strip-like substrate within a plurality of film forming chambers, by plasma CVD, while the strip-like substrate is being moved continuously in a longitudinal direction thereof through the plurality of film forming chambers connected via a gas gate having the structure of introducing a scavenging gas into a slit-like separation passage, characterized in that at least one of the gas gates connecting the i-type layer film forming chamber for forming the semiconductor junction and the n- or p-type layer film forming chamber having higher pressure than the i-type layer film forming chamber has the scavenging gas introducing position disposed on the n- or p-type layer film forming chamber sidType: GrantFiled: October 29, 1996Date of Patent: August 31, 1999Assignee: Canon Kabushiki KaishaInventors: Yasushi Fujioka, Shotaro Okabe, Masahiro Kanai, Takehito Yoshino, Akira Sakai, Tadashi Hori
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Patent number: 5937304Abstract: A method for fabricating a semiconductor device includes the steps of forming a semiconductor film containing silicon, implanting impurity elements to the semiconductor film, performing a dehydrogenation treatment to the semiconductor film, and activating the impurity elements in the dehydrogenated semiconductor film.Type: GrantFiled: June 19, 1996Date of Patent: August 10, 1999Assignee: Sharp Kabushiki KaishaInventors: Atsushi Yoshinouchi, Takeshi Hosoda, Tomohiko Yamamoto
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Patent number: 5918140Abstract: A semiconductor doping process which enhances the dopant incorporation achievable using the Gas Immersion Laser Doping (GILD) technique. The enhanced doping is achieved by first depositing a thin layer of dopant atoms on a semiconductor surface followed by exposure to one or more pulses from either a laser or an ion-beam which melt a portion of the semiconductor to a desired depth, thus causing the dopant atoms to be incorporated into the molten region. After the molten region recrystallizes the dopant atoms are electrically active. The dopant atoms are deposited by plasma enhanced chemical vapor deposition (PECVD) or other known deposition techniques.Type: GrantFiled: June 16, 1997Date of Patent: June 29, 1999Assignee: The Regents of the University of CaliforniaInventors: Paul Wickboldt, Paul G. Carey, Patrick M. Smith, Albert R. Ellingboe
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Patent number: 5871826Abstract: This invention relates to a method of altering the electrical characteristics of a material through a laser ablation process. It can achieve high doping levels and shallow junctions at low temperatures, which are desirable in the fabrication of thin film transistors.Type: GrantFiled: May 30, 1996Date of Patent: February 16, 1999Assignee: Xerox CorporationInventors: Ping Mei, Rene A. Lujan, James B. Boyce
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Patent number: 5858473Abstract: A laser annealing process for recovering crystallinity of a deposited semiconductor film such as of silicon which had undergone morphological damage, said process comprising activating the semiconductor by irradiating a pulsed laser beam operating at a wavelength of 400 nm or less and at a pulse width of 50 nsec or less onto the surface of the film, wherein,said deposited film is coated with a transparent film such as a silicon oxide film at a thickness of from 3 to 300 nm, and the laser beam incident to said coating is applied at an energy density E (mJ/cm.sup.2) provided that it satisfies the relation:log.sub.10 N.ltoreq.-0.02(E-350),where N is the number of shots of the pulsed laser beam.Type: GrantFiled: September 6, 1996Date of Patent: January 12, 1999Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hongyong Zhang, Hiroaki Ishihara
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Patent number: 5834368Abstract: A method for manufacturing an integrated circuit, wherein, before providing an IC composite by forming a metal film on an IC assembly which includes a semiconductor substrate and a silicon part formed along the substrate and consisting essentially of silicon, an amorphous region is formed into the silicon part. The IC composite is subjected to first primary and secondary heat treatments in a nitrogen atmosphere and then to a second heat treatment at 600.degree.-700.degree. C., 700.degree.-900.degree. C., and 700.degree.-900.degree. C. to turn the metal film on the silicon part into a metal silicide film of excellent uniformity. The assembly has a silicon dioxide portion, on which the metal film is turned during the first primary and secondary heat treatments into a metal nitride film. The second heat treatment is carried out after the removal of the metal nitride film.Type: GrantFiled: March 10, 1997Date of Patent: November 10, 1998Assignee: NEC CorporationInventors: Hiroshi Kawaguchi, Isami Sakai
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Patent number: 5817550Abstract: A process for formation of thin film transistors (TFTs) on plastic substrates replaces standard thin film transistor fabrication techniques, and uses sufficiently lower processing temperatures so that inexpensive plastic substrates may be used in place of standard glass, quartz, and silicon wafer-based substrates. The process relies on techniques for depositing semiconductors, dielectrics, and metals at low temperatures; crystallizing and doping semiconductor layers in the TFT with a pulsed energy source; and creating top-gate self-aligned as well as back-gate TFT structures. The process enables the fabrication of amorphous and polycrystalline channel silicon TFTs at temperatures sufficiently low to prevent damage to plastic substrates. The process has use in large area low cost electronics, such as flat panel displays and portable electronics.Type: GrantFiled: March 5, 1996Date of Patent: October 6, 1998Assignee: Regents of the University of CaliforniaInventors: Paul G. Carey, Patrick M. Smith, Thomas W. Sigmon, Randy C. Aceves
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Patent number: 5656511Abstract: A manufacturing method for a semiconductor device is preferably used for a semiconductor device using SOI (Silicon on Insulation) technology. At minimum, the method includes the following steps: the step of forming a gate electrode on a substrate by using a light-intercepting material; of forming a gate insulating film on the substrate including the gate electrode; of forming a semiconductor layer on the gate insulating film; and of forming a source region and a drain region by virtue of the fact that light, having a wavelength such that the light is absorbed into the semiconductor layer while not being absorbed into the substrate, is irradiated from the back of the substrate, before supplying impurities into the semiconductor layer.Type: GrantFiled: March 6, 1995Date of Patent: August 12, 1997Assignee: Canon Kabushiki KaishaInventor: Hitoshi Shindo
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Patent number: 5618741Abstract: In the manufacture of a large-area electronic device (e.g. an active-matrix liquid-crystal display or other flat panel display), a TFT of improved lifetime stability results from the inclusion of a field-relief region (22) which is of lower doping concentration than the drain region (12) and which is formed in an area (2) of lateral separation between the channel region (21) and the drain region (22). An energy beam (40), e.g. from an excimer laser, is used to provide the field-relief region (22), by laterally diffusing the doping concentration of the drain region (12) along an area (2) of the semiconductor film (20) significantly larger than the thickness of the semiconductor film (20). The method is simple and easily controllable, an advantageous doping profile (FIG. 3b) is obtained along the field-relief region (22) by this lateral diffusion.Type: GrantFiled: April 5, 1995Date of Patent: April 8, 1997Assignee: U.S. Philips CorporationInventors: Nigel D. Young, John R. Ayres