Abstract: A method for producing a Schottky diode formed of a doped guard ring in an edge area of the Schottky contact is described. The guard ring is produced by depositing a high barrier material, especially made of platinum, on the surface of the semiconductor layer. The surface is provided with a structured masking layer beforehand, and which is subsequently etch-backing.

Abstract: A ruthenium electrode with a low amount of oxygen contamination and high thermal stability is formed by a chemical vapor deposition method. In the chemical vapor deposition method using an organoruthenium compound as a precursor, the introduction of an oxidation gas is limited to when the precursor is supplying, and the reaction is allowed to occur at a low oxygen partial pressure. Consequently, it is possible to form a ruthenium film with a low amount of oxygen contamination. Further, after formation of the ruthenium film, annealing at not less than the formation temperature is performed, thereby forming a ruthenium film with high thermal stability.

Abstract: A method of manufacturing semiconductor devices forms a surface channel CMOSFET in the process of manufacturing a metal gate. The method forms a (TixAly)1-zNz film (where z ranges from about 0.0 to about 0.2) having a work function value ranging from about 4.2 to about 4.3 eV on a gate insulating film in a NMOS region, a (TixAly)1-zNz film (where z ranges from about 0.3 to about 0.6) having a work function value ranging from about 4.8 to about 5.0 eV on the gate insulating film in a pMOS region, thus implementing a surface channel CMOS device both in the nMOS region and the pMOS region. Therefore, the threshold voltage is reduced.

Abstract: A method of manufacturing an electrical interconnection of a semiconductor device produces an erosion protecting plug in a contact hole to protect a selected portion of an interlayer dielectric layer when the interlayer dielectric layer is being etched to form a recess for a conductive line. The contact hole is formed in the interlayer dielectric layer. The contact hole is filled with an organic material to form the erosion protecting plug. The organic material is a photoresist material or an organic polymer. A photoresist pattern is formed for exposing the erosion protecting plug and a portion of the interlayer dielectric layer adjacent to the erosion protecting plug. A recess which extends down to the contact hole is formed by etching the portion of the interlayer dielectric layer which is exposed by the photoresist pattern. The erosion protecting plug and the photoresist pattern are then removed. A conductive line filling the recess and a contact filling the contact hole are then formed.

Abstract: A semiconductor memory device includes: a capacitor formed on a substrate and including a lower electrode, a dielectric film and an upper electrode; a selection transistor formed at the substrate; an electrically conductive plug for providing electrical connection between the selection transistor and the capacitor; and a diffusion barrier film provided between the electrically conductive plug and the lower electrode of the capacitor. The diffusion barrier film is a TaxSi1−xNy film or a HfxSi1−xNy film (where 0.2<x<1 and 0<y<1). The lower electrode includes an Ir film and an IrO2 film which are sequentially formed.

Abstract: The present invention Is a fabrication method for a short-channel Schottky-barrier field-effect transistor device. The method of the present invention includes introducing channel dopants into a semiconductor substrate such that the dopant concentration varies in the vertical direction and is generally constant in the lateral direction. A gate electrode is formed on the semiconductor substrate, and source and drain electrodes are formed on the substrate to form a Schottky or Schottky-like contact to the substrate.

Abstract: A method of forming a rhodium-containing layer on a substrate, such as a semiconductor wafer, using complexes of the formula LyRhYz is provided. Also provided is a chemical vapor co-deposited platinum-rhodium alloy barriers and electrodes for cell dielectrics for integrated circuits, particularly for DRAM cell capacitors. The alloy barriers protect surrounding materials from oxidation during oxidative recrystallization steps and protect cell dielectrics from loss of oxygen during high temperature processing steps. Also provided are methods for CVD co-deposition of platinum-rhodium alloy diffusion barriers.

Abstract: By providing an area where an Au film 28b is removed and a Ti film 28a is exposed along the plane tangent to the side where the p-n junction of a semiconductor chip is exposed, sticking of the Au film 28b to the chip side or protruding of the film as a flash from the side is prevented, which normally provides a starting place for creep of a solder 42 on the chip side, which in turn causes p-n junction short-circuiting when dividing of chips.

Abstract: A process for producing, starting from a silicon substrate, a semiconductor device having a capacitor part comprising platinum group metal electrodes and a ferroelectric film, which process comprises a cleaning step of cleaning and removing the platinum group metal-derived contaminants adhering onto (1) the silicon-based insulating film formed in contact with the platinum group metal of the electrode(s) and (2) the back surface of the silicon substrate, by using a cleaning solution comprising a chemical solution for metal removal and very small amounts of hydrofluoric acid and a chelating agent. This process can remove platinum group metal-derived contaminants reliably and can prevent the re-adhesion of the once-removed contaminants.

Abstract: A Schottky rectifier has multiple stages with substantially identical or very similar structures. Each stage includes a nitride-based semiconductor layer, a Schottky contact formed on one surface of the semiconductor layer, and an ohmic contact formed on an opposite surface of the semiconductor layer. The Schottky layer is formed from a metallic material with a high metal work function, and the ohmic contact is formed from a metallic material with a low metal work function. At least one of the stages is a middle stage located between two adjacent stages, such that the Schottky contact of the middle stage and the ohmic contact of one of the adjacent stages are joined together, and such that the ohmic contact of the middle stage and the Schottky contact of another one of the adjacent stages are joined together.

Abstract: The semiconductor of the present invention comprises at least an oxide film and a metal thin film on the surface of the semiconductor. The metal thin film includes a metal serving as an oxidation catalyst and has a thickness in the range of 0.5-30 nm. The oxide film comprises a metal serving as an oxidation catalyst and having a thickness in the range of 1-20 nm. Thus, a high-quality oxide film can be formed on the surface of the semiconductor substrate with high controllability without conducting a high temperature heat treatment. The invention employs the method of manufacturing the semiconductor has a steps of forming the first oxidation film having thickness in the range of 0.1-2.5 nm on the semiconductor substrate; forming the metal thin film (for example platinum film) serving as an oxide catalyst to the thickness in the range of 0.5-30 nm on the first oxide thin film; and then forming the second oxide film by heat treating in an oxidizing atmosphere at temperatures from 25 to 600° C.

Abstract: A platinum source reagent liquid solution, comprising:(i) at least one platinum source compound selected from the group consisting of compounds of the formulae:(A) RCpPt(IV)R'.sub.3 compounds, of the formula: ##STR1## wherein: R is selected from the group consisting of hydrogen, methyl, ethyl, i-propyl, n-propyl, n-butyl, i-butyl, t-butyl, trimethylsilyl and trimethylsilyl methyl; and each R' is independently selected from the group consisting of methyl, ethyl, i-propyl, n-propyl, n-butyl, i-butyl, t-butyl, trimethylsilyl and trimethylsilyl methyl; and(B) Pt(.beta.-diketonates).sub.2 of the formula: ##STR2## wherein: each R" is independently selected from the group consisting of methyl, ethyl, n-propyl, i-propyl, n-butyl, i-butyl, t-butyl, trifluoromethyl, perfluoroethyl, and perfluoro-n-propyl, and(ii) a solvent medium therefor.

Abstract: Metallic osmium on SiC (either .beta. or .alpha.) forms a contact that remains firmly attached to the SiC surface and forms an effective barrier against diffusion from the conductive metal. On n-type SiC, Os forms an abrupt Schottky rectifying junction having essentially unchanged operating characteristics to at least 1050.degree. C. and Schottky diodes that remain operable to 1175.degree. C. and a barrier height over 1.5 ev. On p-type SiC, Os forms an ohmic contact with specific contact resistance of <10.sup.-4 ohm-cm.sup.2. Ohmic and rectifying contacts to a TiC layer on a SiC substrate are formed by depositing a WC layer over the TiC layer, followed by a metallic W layer. Such contacts are stable to at least 1150.degree. C. Electrodes connect to the contacts either directly or via a protective bonding layer such as Pt or PtAu alloy.

Abstract: Method and apparatus are disclosed for low temperature deposition of CVD and PECVD films utilizing a gas-dispersing showerhead position within one inch of a rotating substrate. The showerhead is positioned a suitable distance below a gas-dispensing apparatus such as a steady stay flow of gas develops between the ring and showerhead. A cylindrical structure extends between the gas-dispersing ring and a showerhead to contain the gas over the showerhead yielding a small boundary layer over the substrate to ensure efficient uniform deposition of a film on a substrate surface. In the one embodiment of the present invention the showerhead is bias with RF energy such that it acts as an electrode to incite a plasma proximate with the substrate for PECVD. The cylinder is isolated from the showerhead such as by a quartz insulator ring to prevent ignition of a plasma within the cylinder, or alternatively, the cylinder is fabricated of quartz material.

Abstract: A method for forming a Schottky diode. There is first provided a silicon layer. There is then formed upon the silicon layer an anisotropically patterned first dielectric layer which defines a Schottky diode contact region of the silicon layer. There is then formed and aligned upon the anisotropically patterned first dielectric layer a patterned second dielectric layer which is formed of a thermally reflowable material. There is then reflowed thermally the patterned second dielectric layer to form a thermally reflowed patterned second dielectric layer having a uniform sidewall profile with respect to the anisotropically patterned first dielectric layer while simultaneously forming a thermal silicon oxide layer upon the Schottky diode contact region of the silicon layer.

Abstract: A method for forming a Schottky diode structure is disclosed. The method includes the steps of: a) Providing a substrate; b) forming a rare-earth containing layer over the substrate; and c) forming a metal layer over the rare-earth containing layer. The Schottky diode structure with a rare-earth containing layer has the properties of high-temperature stability, high Schottky barrier height (SBH), and low reverse leakage current.

Abstract: A method of fabricating an oxidation barrier for a thin film is provided. The method may include forming a thin film (10) outwardly from a semiconductor substrate (12) and separated from the semiconductor substrate (12) by a primary insulator layer (14). A reactive layer (16) may be formed in-situ adjacent to the thin film (10). An oxidation barrier (20) may be formed by a chemical reaction between the thin film (10) and the reactive layer (16). The oxidation barrier (20) may comprise a silicide alloy that operates to reduce oxidation of the thin film (10).

Abstract: Provided are methods of forming a metal layer on the horizontal and vertical surfaces of a polysilicon gate electrode/interconnect in a MOS transistor, and devices having metal-encapsulated gates and interconnects. The metal encapsulation method of the present invention may also provide a layer of metal on the exposed surfaces of the source and drain regions of the transistor. The methods and apparatuses of the present invention allow reductions in device resistance and signal propagation delays.

Abstract: The present invention relates to semiconductor techniques using high dielectric oxides, more specifically to a thin film forming method for forming a thin film which is suitable as the electrodes of the oxide high dielectrics, a capacitor device using the oxide high dielectrics and a method for fabricating the same, an a semiconductor device using the capacitor device and a method for fabricating the semiconductor device. The capacitor device comprises at least one of a pair of electrodes which is formed of a material containing titanium nitride of (200) orientation. This permits the capacitor device to have good quality even in a case that the capacitor dielectric film is formed of a high dielectric thin film grown in an oxidizing atmosphere. The capacitor device includes the electrodes of titanium nitride film, whereby the electrodes can be patterned by RIE, which much improves processing precision of the electrode patterning, and throughputs.