Transparent Conductor Patents (Class 438/609)
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Patent number: 11891687Abstract: A method is provided for manufacturing an article comprising a transparent conductive material, wherein a transparent conductive material (e.g., indium tin oxide) is deposited onto a substrate (e.g., fused silica) by physical vapor deposition, then annealed at high temperature (i.e., at least 450° C.) in a nitrogen atmosphere. The resulting article comprises a transparent conductive material that reduces the trade-off between low resistivity (or sheet resistance) and high near infrared transmission. For example, the transparent conductive material thus obtained may possess a transmission of at least 80% at 1550 nm while having a resistivity of less than or equal to about 5×10?4 Ohm-cm and a Haacke figure of merit of at least about 40×10?4??1. Also provided is a method for modulating the resistivity and/or the near infrared transmission of a transparent conductive material by annealing the transparent conductive material at a high temperature under nitrogen atmosphere.Type: GrantFiled: September 30, 2020Date of Patent: February 6, 2024Assignees: CORNING INCORPORATED, ICREA, ICFOInventors: Rinu Maniyara, Prantik Mazumder, Valerio Pruneri
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Patent number: 11764333Abstract: A light emitting diode includes an n-type structure, a p-type structure, and an active-region sandwiched between the n-type structure and the p-type structure; a p-contact layer formed on the p-type structure; and a p-ohmic contact of a thickness in the range of 0.2-100 nm formed on the p-contact layer, wherein the p-ohmic contact comprises one or more layer of metal oxide.Type: GrantFiled: September 29, 2020Date of Patent: September 19, 2023Assignee: BOLB INC.Inventors: Jianping Zhang, Ling Zhou, Ying Gao
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Patent number: 11322366Abstract: A method for locally annealing and crystallizing a thin film by directing ultrashort optical pulses from an ultrafast laser into the film. The ultrashort pulses can selectively produce an annealed pattern and/or activate dopants on the surface or within the film.Type: GrantFiled: January 26, 2021Date of Patent: May 3, 2022Assignee: The Government of the United States of America, as represented by the Secretary of the NavyInventors: Marc Currie, Virginia D. Wheeler
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Patent number: 10566538Abstract: A method for forming an organic thin film solar battery includes steps of: providing a substrate and an evaporating source; forming a first electrode on a surface of the substrate; spacing the evaporating source from the first electrode, and heating the carbon nanotube film structure to gasify the photoactive material and form a photoactive layer on a surface of the first electrode; and forming a second electrode on a surface of the photoactive layer.Type: GrantFiled: April 14, 2017Date of Patent: February 18, 2020Assignees: Tsinghua University, HON HAI PRECISION INDUSTRY CO., LTD.Inventors: Yang Wei, Hao-Ming Wei, Shou-Shan Fan
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Patent number: 10297623Abstract: The present invention provides a TFT substrate manufacturing method. The method uses a photoresist material that contains crystallizable and precipitatable pigment to form a photoresist layer, so that a plurality of crystallization burrs can be formed on a surface of the photoresist layer, making it possible for a pixel electrode film not completely covering the surface of the photoresist layer and thus, allowing a peeling agent to pass through the crystallization burrs and penetrate into the photoresist layer to cause corrosion of the photoresist layer thereby peeling off the photoresist layer and a portion of the pixel electrode film located on the photoresist layer at the same time to form a pixel electrode, whereby, compared to the prior art, peeling can be conducted without adopting a special mask and involving special mask parameters and also requiring no plasma treatment so that the process of fabricating a TFT substrate can be simplified to enhance fabrication efficiency of the TFT substrate.Type: GrantFiled: June 20, 2017Date of Patent: May 21, 2019Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.Inventor: Ji Li
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Patent number: 9904386Abstract: The invention relates to a method for patterning one or more portions of a microstructure comprised of a flexible substrate, a conductor disposed on the substrate, and a metal layer disposed on the conductor, wherein the conductor is comprised of a stack of a first and a second transparent conductive oxide (TCO) layer, and a metal doped silicon oxide layer sandwiched between the two TCO layers.Type: GrantFiled: January 15, 2015Date of Patent: February 27, 2018Assignee: 3M INNOVATIVE PROPERTIES COMPANYInventors: Muthu Sebastian, Michael W. Dolezal
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Patent number: 9659975Abstract: Fabrication methods of a transparent conductive electrode (301) and an array substrate are provided. The fabrication method of the transparent conductive electrode (301) comprises: forming a sacrificial layer pattern (201) on a substrate (10) having a first region (A1) and a second region (A2) adjacent to each other, wherein the sacrificial layer pattern (201) is located in the second region (A2), and has an upper sharp corner profile formed on a side adjacent to the first region (A1); forming a transparent conductive thin-film (30) in the first region (A1) and the second region (A2) of the substrate (10) with the sacrificial layer pattern (201) formed thereon, wherein a thickness ratio of the transparent conductive thin-film (30) to the sacrificial layer pattern (201) is less than or equal to 1:1.Type: GrantFiled: September 15, 2014Date of Patent: May 23, 2017Assignee: BOE Technology Group Co., Ltd.Inventors: Meili Wang, Fengjuan Liu, Chunsheng Jiang
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Patent number: 9627363Abstract: A display device including a wiring substrate having a wiring electrode; a plurality of semiconductor light emitting devices which form pixels; and a conductive adhesive layer configured to electrically connect the wiring electrode with the plurality of semiconductor light emitting devices. Further, the conductive adhesive layer includes a body provided with a resin having an adhesive property; and a metallic aggregation part disposed in the body, and formed as metallic atoms precipitated from a metal-organic compound and aggregated with each other.Type: GrantFiled: July 8, 2015Date of Patent: April 18, 2017Assignee: LG ELECTRONICS INC.Inventors: Chisun Kim, Byungjoon Rhee, Bongchu Shim
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Patent number: 9256110Abstract: In a liquid crystal display (LCD) device having a thin film transistor (TFT), the TFT includes a source electrode, a drain electrode and a semiconductor layer. At least one of the source electrode and drain electrode includes a first layer including copper and a second layer forming an oxide layer and covering the first layer. The semiconductor layer has a substantially linear current-voltage relationship with said source electrode or drain electrode including said first and second layers, when a voltage is applied between the semiconductor layer and said source electrode or drain electrode.Type: GrantFiled: February 12, 2014Date of Patent: February 9, 2016Assignee: Xenogenic Development Limited Liability CompanyInventors: Junichi Koike, Hideaki Kawakami
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Patent number: 9224799Abstract: Provided are capacitor stacks for use in integrated circuits and methods of fabricating these stacks. A capacitor stack includes a dielectric layer and one or two inner electrode layers, such as a positive inner electrode layer and a negative inner electrode layer. The inner electrode layers directly interface the dielectric layer. The stack may also include outer electrode layers. The inner electrode layers are either chemically stable or weakly chemically unstable, while in contact with the dielectric layer based on the respective phase diagrams. Furthermore, the electron affinity of the positive inner electrode layer may be less than the electron affinity of the dielectric layer. The sum of the electron affinity and bandgap of the negative inner electrode layer may be less than that of the dielectric layer. In some embodiments, inner electrode layers are formed from heavily doped semiconducting materials, such as gallium arsenide or gallium aluminum arsenide.Type: GrantFiled: December 31, 2013Date of Patent: December 29, 2015Assignee: Intermolecular, Inc.Inventors: Sergey Barabash, Dipankar Pramanik
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Patent number: 9054245Abstract: Methods for doping an absorbent layer of a p-n heterojunction in a thin film photovoltaic device are provided. The method can include depositing a window layer on a transparent substrate, where the window layer includes at least one dopant (e.g., copper). A p-n heterojunction can be formed on the window layer, with the p-n heterojunction including a photovoltaic material (e.g., cadmium telluride) in an absorber layer. The dopant can then be diffused from the window layer into the absorber layer (e.g., via annealing).Type: GrantFiled: March 2, 2012Date of Patent: June 9, 2015Assignee: First Solar, Inc.Inventors: Scott Daniel Feldman-Peabody, Robert Dwayne Gossman
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Patent number: 9018088Abstract: Growing spin-capable multi-walled carbon nanotube (MWCNT) forests in a repeatable fashion will become possible through understanding the critical factors affecting the forest growth. Here we show that the spinning capability depends on the alignment of adjacent MWCNTs in the forest which in turn results from the synergistic combination of a high areal density of MWCNTs and short distance between the MWCNTs. This can be realized by starting with both the proper Fe nanoparticle size and density which strongly depend on the sheet resistance of the catalyst film. Simple measurement of the sheet resistance can allow one to reliably predict the growth of spin-capable forests. The properties of pulled MWCNTs sheets reflect that there is a relationship between their electrical resistance and optical transmittance. Overlaying either 3, 5, or 10 sheets pulled out from a single forest produces much more repeatable characteristics.Type: GrantFiled: April 1, 2013Date of Patent: April 28, 2015Assignee: Board of Regents, The University of Texas SystemsInventors: Jae Hak Kim, Gil Sik Lee, Kyung Hwan Lee, Lawrence J. Overzet
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Patent number: 9012904Abstract: In the transistor including an oxide semiconductor film, a gate insulating film of the transistor including an oxide semiconductor film has a stacked-layer structure of the hydrogen capture film and the hydrogen permeable film. At this time, the hydrogen permeable film is formed on a side which is in contact with the oxide semiconductor film, and the hydrogen capture film is formed on a side which is in contact with a gate electrode. After that, hydrogen released from the oxide semiconductor film is transferred to the hydrogen capture film through the hydrogen permeable film by the heat treatment.Type: GrantFiled: March 16, 2012Date of Patent: April 21, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yuki Imoto, Tetsunori Maruyama, Yuta Endo
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Patent number: 8999836Abstract: It is an object of the present invention to provide a technique for manufacturing a highly reliable display device at low cost with high yield. A first electrode layer is formed by a sputtering method using a gas containing hydrogen or H2O, an electroluminescent layer is formed over the first electrode layer, and a second electrode layer is formed over the electroluminescent layer. According to one aspect of the present invention, a display device is manufactured to include a first electrode layer including indium zinc oxide containing silicon oxide and tungsten oxide, an electroluminescent layer over the first electrode layer, and a second electrode layer over the electroluminescent layer, where the electroluminescent layer includes a layer containing an organic compound and an inorganic compound to be in contact with the first electrode layer.Type: GrantFiled: May 9, 2006Date of Patent: April 7, 2015Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yoshiaki Oikawa, Kengo Akimoto
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Patent number: 8980680Abstract: A method for fabricating a solar cell element, the method comprising a step (a) of preparing a laminate and a chamber, a step (b) of bringing the laminate into contact with the aqueous solution in such a manner that the second surface is immersed in the aqueous solution after the step (a); a step (c) of applying a voltage difference between an anode electrode and the laminate under an atmosphere of the inert gas to form a Zn layer on the second surface after the step (b); and a step (d) of exposing the Zn layer to oxygen so as to convert the Zn layer into a ZnO crystalline layer after the step (c).Type: GrantFiled: December 12, 2013Date of Patent: March 17, 2015Assignee: Panasonic Intellectual Property Management Co., Ltd.Inventors: Tomoyuki Komori, Tetsuya Asano
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Patent number: 8946004Abstract: A contact portion of wiring and a method of manufacturing the same are disclosed. A contact portion of wiring according to an embodiment includes: a substrate; a conductive layer disposed on the substrate; an interlayer insulating layer disposed on the conductive layer and having a contact hole; a metal layer disposed on the conductive layer and filling the contact hole; and a transparent electrode disposed on the interlayer insulating layer and connected to the metal layer, wherein the interlayer insulating layer includes a lower insulating layer and an upper insulating layer disposed on the lower insulating layer, the lower insulating layer is undercut at the contact hole, and the metal layer fills in the portion where the lower insulating layer is undercut.Type: GrantFiled: August 19, 2009Date of Patent: February 3, 2015Assignee: Samsung Display Co., Ltd.Inventors: Joo-Han Kim, Ki-Yong Song, Dong-Ju Yang, Hee-Joon Kim, Yeo-Geon Yoon, Sung-Hen Cho, Chang-Hoon Kim, Jae-Hong Kim, Yu-Gwang Jeong, Ki-Yeup Lee, Sang-Gab Kim, Yun-Jong Yeo, Shin-Il Choi, Ji-Young Park
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Patent number: 8940579Abstract: Disclosed are new methods of fabricating metal oxide thin films and nanomaterial-derived metal composite thin films via solution processes at low temperatures (<400° C.). The present thin films are useful as thin film semiconductors, thin film dielectrics, or thin film conductors, and can be implemented into semiconductor devices such as thin film transistors and thin film photovoltaic devices.Type: GrantFiled: March 15, 2013Date of Patent: January 27, 2015Assignees: Northwestern University, Polyera CorporationInventors: Antonio Facchetti, Tobin J. Marks, Mercouri G. Kanatzidis, Myung-Gil Kim, William Christopher Sheets, He Yan, Yu Xia
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Patent number: 8927436Abstract: The present invention relates to a method for forming a trench that can remove residual particles in a trench using a metal mask, a method for forming a metal wire, and a method for manufacturing a thin film transistor array panel. The method for forming a trench includes: forming a first insulating layer on a substrate; forming a first metal layer on the first insulating layer; forming an opening by patterning the first metal layer; forming a trench by dry-etching the first insulating layer using the patterned first metal layer as a mask; and wet-etching the substrate. The dry-etching is performed using a main etching gas and a first auxiliary etching gas, and the first auxiliary etching gas includes argon.Type: GrantFiled: May 24, 2012Date of Patent: January 6, 2015Assignee: Samsung Display Co., Ltd.Inventors: Dae Ho Kim, Bong-Kyun Kim, Yong-Hwan Ryu, Hong Sick Park, Wang Woo Lee, Shin Il Choi
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Patent number: 8912086Abstract: A method for manufacturing a transparent electrode using a print-based metal wire is provided, which enables the mass production of the transparent electrode as a substitute for ITO at low cost. The manufacturing method includes: the first step of forming a metal wire in a pattern set for a transparent substrate; and the second step of coating a solution type transparent electrode on the transparent substrate.Type: GrantFiled: September 1, 2011Date of Patent: December 16, 2014Assignee: Korea Institute of Machinery & MaterialsInventors: Jeong-Dai Jo, Jong-Su Yu, Jung Su Kim, Seong-Man Yoon, Sung Woo Bae, Dong-Soo Kim
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Patent number: 8895427Abstract: A zinc oxide transparent electroconductive oxide has been difficult to use as a substrate having a transparent electrode because the oxide, when configured as a thin film, because of increased resistivity due to air and/or moisture exposure. Though doping can inhibit increase of resistance to some extent, there has been difficulty in selecting a type and an amount of a doping substance and because doping causes high initial resistance. A substrate having a transparent electrode with stable resistivity against various environments is produced by a magnetron sputtering method using a target composed of a zinc oxide transparent electroconductive oxide containing 0.50 to 2.75% silicon dioxide by weight relative to the oxide.Type: GrantFiled: August 26, 2009Date of Patent: November 25, 2014Assignee: Kaneka CorporationInventors: Takashi Kuchiyama, Kenji Yamamoto
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Patent number: 8895428Abstract: Disclosed is a manufacture method of the thin film transistor array, comprising depositing a first transparent conductive layer and a first metal layer to perform patterning for forming a common electrode, a gate electrode and a transparent electrode array; depositing an insulating layer, an active layer, an ohmic contact layer and a second metal layer to perform patterning for forming a source and a drain; depositing a second transparent conductive layer to perform patterning for forming a source contact layer, a drain contact layer and a pixel electrode array connected to the drain contact layer. The present invention simplifies the manufacture process, saves the cost and time for the manufacture.Type: GrantFiled: February 10, 2012Date of Patent: November 25, 2014Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.Inventor: Shijian Qin
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Patent number: 8895429Abstract: A micro-channel structure having variable depths includes a substrate and a cured layer formed on the substrate. At least first and second micro-channels are embossed in the cured layer. The first micro-channel has a bottom surface defining a first depth and the second micro-channel has a bottom surface defining a second depth different from the first depth. A cured electrical conductor is making a micro-wire is formed in each of the first and second micro-channels over their respective bottom surfaces.Type: GrantFiled: March 5, 2013Date of Patent: November 25, 2014Assignee: Eastman Kodak CompanyInventor: Ronald Steven Cok
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Patent number: 8890195Abstract: According to one embodiment, a semiconductor light emitting device includes a stacked structural body, a first, a second and a third conductive layer. The stacked structural body includes first and second semiconductors and a light emitting layer provided therebetween. The second semiconductor layer is disposed between the first conductive layer and the light emitting layer. The first conductive layer is transparent. The first conductive layer has a first major surface on a side opposite to the second semiconductor layer. The second conductive layer is in contact with the first major surface. The third conductive layer is in contact with the first major surface and has a reflectance higher than a reflectance of the second conductive layer. The third conductive layer includes an extending part extending in parallel to the first major surface. At least a portion of the extending part is not covered by the second conductive layer.Type: GrantFiled: January 23, 2013Date of Patent: November 18, 2014Assignee: Kabushiki Kaisha ToshibaInventors: Taisuke Sato, Toshiyuki Oka, Koichi Tachibana, Shinya Nunoue
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Patent number: 8889440Abstract: An optical emitter includes a Light-Emitting Diode (LED) on a package wafer, transparent insulators, and one or more transparent electrical connectors between the LED die and one or more contact pads on the packaging wafer. The transparent insulators are deposited on the package wafer with LED dies attached using a lithography or a screen printing method. The transparent electrical connectors are deposited using physical vapor deposition, chemical vapor deposition, spin coating, spray coating, or screen printing and may be patterned using a lithography process and etching.Type: GrantFiled: December 11, 2013Date of Patent: November 18, 2014Assignee: TSMC Solid State Lighting Ltd.Inventors: Yung-Chang Chen, Hsin-Hsien Wu, Ming Shing Lee, Huai-En Lai, Fu-Wen Liu, Andy Wu
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Patent number: 8878212Abstract: A light emitting device includes a substrate, at least one electrode, a first contact layer, a second contact layer, a light emitting structure layer, and an electrode layer. The electrode is disposed through the substrate. The first contact layer is disposed on a top surface of the substrate and electrically connected to the electrode. The second contact layer is disposed on a bottom surface of the substrate and electrically connected to the electrode. The light emitting structure layer is disposed above the substrate at a distance from the substrate and electrically connected to the first contact layer. The light emitting structure layer includes a first conductive type semiconductor layer, an active layer, and a second conductive type semiconductor layer. The electrode layer is disposed on the light emitting structure layer.Type: GrantFiled: February 3, 2011Date of Patent: November 4, 2014Assignee: LG Innotek Co., Ltd.Inventors: Woo Sik Lim, Sung Kyoon Kim, Sung Ho Choo, Hee Young Beom
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Patent number: 8871628Abstract: An electrode structure comprises a semiconductor junction comprising an n-type semiconductor layer and a p-type semiconductor layer; a hole exnihilation layer on the p-type semiconductor layer; and a transparent electrode layer on the hole exnihilation layer. The electrode structure further comprises a conductive layer between the hole exnihilation layer and the transparent electrode layer. In the electrode structure, one or more of the hole exnihilation layer, the conductive layer and the transparent electrode layer may be formed by an atomic layer deposition. In the electrode structure, a transparent electrode formed of a degenerated n-type oxide semiconductor does not come in direct contact with a p-type semiconductor, and thus, annihilation or recombination of holes generated in the p-type semiconductor can be reduced, which increases the carrier generation efficiency.Type: GrantFiled: January 19, 2010Date of Patent: October 28, 2014Assignee: Veeco ALD Inc.Inventor: Sang In Lee
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Patent number: 8866137Abstract: A thin film transistor array panel includes: a gate electrode disposed on an insulation substrate; a gate insulating layer disposed on the gate electrode; a first electrode and an oxide semiconductor disposed directly on the gate insulating layer; a source electrode and a drain electrode formed on the oxide semiconductor; a passivation layer disposed on the first electrode, the source electrode, and the drain electrode; and a second electrode disposed on the passivation layer.Type: GrantFiled: February 3, 2012Date of Patent: October 21, 2014Assignee: Samsung Display Co., Ltd.Inventors: Jin-Won Lee, Woo Geun Lee, Kap Soo Yoon, Ki-Won Kim, Hyun-Jung Lee, Hee-Jun Byeon, Ji-Soo Oh
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Patent number: 8859332Abstract: The present invention relates to a liquid phase process for producing indium oxide-containing layers, in which a coating composition preparable from a mixture comprising at least one indium oxide precursor and at least one solvent and/or dispersion medium, in the sequence of points a) to d), a) is applied to a substrate, and b) the composition applied to the substrate is irradiated with electromagnetic radiation, c) optionally dried and d) converted thermally into an indium oxide-containing layer, where the indium oxide precursor is an indium halogen alkoxide of the generic formula InX(OR)2 where R is an alkyl radical and/or alkoxyalkyl radical and X is F, Cl, Br or I and the irradiation is carried out with electromagnetic radiation having significant fractions of radiation in the range of 170-210 nm and of 250-258 nm, to the indium oxide-containing layers producible with the process, and the use thereof.Type: GrantFiled: October 26, 2011Date of Patent: October 14, 2014Assignee: Evonik Degussa GmbHInventors: Juergen Steiger, Duy Vu Pham, Heiko Thiem, Alexey Merkulov, Arne Hoppe
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Patent number: 8853070Abstract: A method of increasing a work function of an electrode is provided. The method comprises obtaining an electronegative species from a precursor using electromagnetic radiation and reacting a surface of the electrode with the electronegative species. An electrode comprising a functionalized substrate is also provided.Type: GrantFiled: April 13, 2012Date of Patent: October 7, 2014Assignee: OTI Lumionics Inc.Inventors: Michael Helander, Zhibin Wang, Jacky Qiu, Zheng-Hong Lu
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Patent number: 8841164Abstract: The present invention relates to a liquid phase process for producing indium oxide-containing layers from nonaqueous solution, in which an anhydrous composition containing at least one indium halogen alkoxide of the generic formula InX(OR)2 where R=alkyl radical and/or alkoxyalkyl radical and X=F, Cl, Br or I and at least one solvent or dispersion medium is, in the sequence of points a) to d), in anhydrous atmosphere, a) applied to the substrate, b) the composition applied to the substrate is irradiated with electromagnetic radiation of wavelength ?360 nm and c) optionally dried, and then d) converted thermally to an indium oxide-containing layer, to the layers producible by the process and to the use thereof.Type: GrantFiled: November 25, 2010Date of Patent: September 23, 2014Assignee: Evonik Degussa GmbHInventors: Jürgen Steiger, Duy Vu Pham, Heiko Thiem, Alexey Merkulov, Arne Hoppe
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Patent number: 8835215Abstract: A simple method is developed in the present invention for fabricating periodic ripple microstructures on the surface of an ITO film by using single-beam femtosecond laser pulses. The periodic ripple microstructures composed of self-organized nanodots can be directly fabricated through the irradiation of the femtosecond laser, without scanning. The ripple spacing of ˜800 nm, ˜400 nm and ˜200 nm observed in the periodic ripple microstructures can be attributed to the interference between the incident light and the scattering light of the femtosecond laser from the surface of the ITO film. In the present invention, the self-organized dots are formed by the constructive interference formed in the surface of the ITO film, where includes higher energy to break the In—O and Sn—O bonds and then form the In—In bonds. Therefore, the dots have higher surface current greater than other disconstructive regions of the ITO film.Type: GrantFiled: July 31, 2012Date of Patent: September 16, 2014Assignee: National Tsing Hua UniversityInventors: Jih-perng Leu, Chih-Wei Luo, Chih Wang, Jwo-Huei Jou
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Patent number: 8822995Abstract: A display substrate includes a switching transistor electrically connected to a gate line and a data line, the data line extending in a first direction substantially perpendicular to the gate line extending in a second direction, the switching transistor including a switching active pattern comprising amorphous silicon, a driving transistor electrically connected to a driving voltage line and the switching transistor, the driving voltage line extended in the first direction, the driving transistor including a driving active pattern comprising a metal oxide; and a light-emitting element electrically connected to the driving transistor.Type: GrantFiled: June 17, 2009Date of Patent: September 2, 2014Assignee: Samsung Display Co., Ltd.Inventors: Chun-Gi You, Kap-Soo Yoon, Gug-Rae Jo, Sung-Hoon Yang, Ki-Hun Jeong, Seung-Hwan Shim, Jae-Ho Choi
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Patent number: 8766240Abstract: A permeation barrier film structure for organic electronic devices includes one or more bilayers having a hybrid permeation barrier composition. Each of the one or more bilayers includes a first region having a first composition corresponding to a first CF4—O2 Plasma Reactive Ion Etch Rate and a second region having a second composition corresponding to a second CF4—O2 Plasma Reactive Ion Etch Rate, wherein the second Etch Rate is greater than the first Etch Rate by a factor greater than 1.2 and the hybrid permeation barrier film is a homogeneous mixture of a polymeric material and a non-polymeric material, wherein the mixture is created from a single precursor material.Type: GrantFiled: September 21, 2010Date of Patent: July 1, 2014Assignee: Universal Display CorporationInventors: Prashant Mandlik, Jeffrey Silvernail, Ruiqing Ma
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Publication number: 20140159073Abstract: The present invention provides an array substrate and a method for manufacturing the same, and a display device. Wherein, after forming a pattern corresponding to a source/drain electrode layer, a transparent conducting layer is formed, and then a passivation layer is formed on the transparent conducting layer. Because the transparent conducting layer has a characteristic of anti-etching, it is hard to be damaged, so that the problem of damage of copper in the source/drain electrode layer is solved without increasing the process steps for forming the array substrate.Type: ApplicationFiled: December 6, 2013Publication date: June 12, 2014Applicant: BOE TECHNOLOGY GROUP CO., LTD.Inventor: Xuehui ZHANG
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Publication number: 20140145236Abstract: A method of increasing a work function of an electrode is provided. The method comprises obtaining an electronegative species from a precursor using electromagnetic radiation and reacting a surface of the electrode with the electronegative species. An electrode comprising a functionalized substrate is also provided.Type: ApplicationFiled: April 13, 2012Publication date: May 29, 2014Inventors: Michael Helander, Zhibin Wang, Jacky Qiu, Zheng-Hong Lu
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Publication number: 20140144501Abstract: A method of fabricating a transparent electrode includes preparing conductive nanoparticles, preparing a metal oxide sol, mixing and reacting the conductive nanoparticles with the metal oxide sol to form a metal oxide solution including a metal oxide combined with the conductive nanoparticles, coating the metal oxide solution on a substrate, and performing an annealing process on the coated metal oxide solution.Type: ApplicationFiled: June 18, 2013Publication date: May 29, 2014Inventors: Mi Hee Jung, Moo Jung Chu
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Patent number: 8735195Abstract: Disclosed is a method of manufacturing a ZnO-based semiconductor device having at least p-type ZnO-based semiconductor layer, which includes a step of forming a contact metal layer on the p-type ZnO-based semiconductor layer wherein the contact metal layer contains at least one of Ni and Cu; and a step of performing heat treatment of the contact metal layer and the p-type ZnO-based semiconductor layer under an oxygen-free atmosphere to form a mixture layer including elements of the p-type ZnO-based semiconductor layer and the contact metal layer at a boundary region therebetween while maintaining a metal phase layer on a surface of the contact metal layer.Type: GrantFiled: April 8, 2010Date of Patent: May 27, 2014Assignee: Stanley Electric Co., Ltd.Inventor: Naochika Horio
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Publication number: 20140134838Abstract: Methods are generally provided for forming a conductive oxide layer on a substrate by sputtering a target to deposit a transparent conductive oxide layer (e.g., comprising comprises cadmium, tin, and oxygen) on the substrate; positioning an anneal surface in close proximity to the transparent conductive oxide layer (e.g., about 3 cm or less); and, annealing the transparent conductive oxide layer while the anneal surface is in close proximity to the transparent conductive oxide layer (e.g., at an anneal temperature of about 500° C. to about 700° C.) to create a localized cadmium vapor between the transparent conductive oxide layer and the anneal surface. The anneal surface can include a material reactive with oxygen at the anneal temperature. Apparatus is also provided for annealing a thin film layer on a substrate.Type: ApplicationFiled: November 9, 2012Publication date: May 15, 2014Applicant: PrimeStar Solar, Inc.Inventors: Robert Dwayne Gossman, Kali Nicole Osborn, Hongying Peng
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Publication number: 20140124817Abstract: An electrical contact is formed on a III-V semiconductor comprising gallium. The contact is formed by depositing a first layer comprising In, Au, and a dopant on the surface of a III-V semiconductor and a second layer comprising a conductive oxide on the first layer. The deposited layers are annealed in an inert atmosphere. The annealing causes the formation of a Ga—Au compound at the interface between the III-V semiconductor and the first layer. At least a portion of the dopant migrates into the III-V semiconductor such that the dopant provides n-type or p-type conductivity to the III-V semiconductor. The specific contact resistivity between the III-V semiconductor and the second layer is less than about 10?5 ?cm2. The layers are further annealed in an oxidizing atmosphere such that the indium in the first layer is oxidized to form indium oxide.Type: ApplicationFiled: November 5, 2012Publication date: May 8, 2014Applicant: INTERMOLECULAR, INC.Inventor: Philip Kraus
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Patent number: 8716047Abstract: When a p-layer 4 composed of GaN is maintained at ordinary temperature and TNO is sputtered thereon by an RF magnetron sputtering method, a laminated TNO layer 5 is in an amorphous state. Then, there is included a step of thermally treating the amorphous TNO layer in a reduced-pressure atmosphere where hydrogen gas is substantially absent to thereby crystallize the TNO layer. At the sputtering, an inert gas is passed through together with oxygen gas, and volume % of the oxygen gas contained in the gas passed through is 0.10 to 0.15%. In this regard, oxygen partial pressure is 5×10?3 Pa or lower. The temperature of the thermal treatment is 500° C. for about 1 hour.Type: GrantFiled: August 31, 2009Date of Patent: May 6, 2014Assignees: Toyoda Gosei Co., Ltd., Kanagawa Academy of Science and TechnologyInventors: Koichi Goshonoo, Miki Moriyama, Taro Hitosugi, Tetsuya Hasegawa, Junpei Kasai
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Patent number: 8710520Abstract: Disclosed is a light emitting diode having a multi-cell structure including a number of unit cells. The light emitting diode is capable of reducing light loss of the light emitting diode surface and improving light efficiency by bonding pads to be formed for contact between mesa etching regions for forming an electrode of the existing n-type semiconductor layers and p-type semiconductor layers. The light emitting diode is also capable of controlling chip size and manufacturing chips of different sizes from each other even when going through the same chip manufacturing process as the related art.Type: GrantFiled: November 2, 2010Date of Patent: April 29, 2014Assignee: Korea Photonics Technology InstituteInventors: Sang-Mook Kim, Jong-Hyeob Baek, Kwang-Cheol Lee, Eun-Mi Yoo
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Patent number: 8658887Abstract: Provided in this invention is a low-cost substrate provided with a transparent conductive film for photoelectric conversion device, which can improve performance of the photoelectric conversion device by enhanced light confinement effect achieved with effectively increased surface unevenness of the substrate. A method for manufacturing said substrate and a photoelectric conversion device using said substrate which can show improved performance are also provided. The substrate provided with the transparent conductive film for the photoelectric conversion device comprises a transparent insulating substrate and a transparent electrode layer containing at least zinc oxide deposited on the transparent insulating substrate, wherein the transparent electrode layer is composed of a double layer structure wherein first and second transparent conductive films are deposited in this order from a substrate side.Type: GrantFiled: November 12, 2007Date of Patent: February 25, 2014Assignee: Kaneka CorporationInventor: Yuko Tawada
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Publication number: 20140034125Abstract: A method for creating electrically conducting or semiconducting patterns on a textured surface including plural reliefs of amplitude greater than or equal to 100 nanometers, including: preparing a substrate during which at least the textured surface of the substrate is made electrically conducting; coating during which at least one layer of an imprintable material is laid on the textured surface, made electrically conducting, of the substrate; pressing a mold including valleys or protrusions to transfer the valleys or the protrusions of the mold into the imprintable material to form patterns therein; removing the mold while leaving the imprint of the patterns in the imprintable material; exposing the textured surface, made electrically conducting, of the substrate, at a bottom of the patterns; and electrically depositing an electrically conducting or semiconducting material into the patterns to form conducting or semiconducting patterns.Type: ApplicationFiled: March 5, 2012Publication date: February 6, 2014Applicant: COMMISSARIAT A L'ENERGIE ATOMIQUE ET AUX ENE ALTInventors: Carole Pernel, Nicolas Chaix, Stefan Landis
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Patent number: 8624253Abstract: To improve the reliability of contact with an anisotropic conductive film in a semiconductor device such as a liquid crystal display panel, a terminal portion of a connecting wiring on an active matrix substrate is electrically connected to an FPC by an anisotropic conductive film. The connecting wiring is made of a lamination film of a metallic film and a transparent conductive film. In the connecting portion with the anisotropic conductive film, a side surface of the connecting wiring is covered with a protecting film made of an insulating material, thereby exposure to air of the metallic film can be avoided.Type: GrantFiled: January 24, 2013Date of Patent: January 7, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shunpei Yamazaki
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Patent number: 8592246Abstract: Methods of manufacturing a solar cell module are provided. The method may include forming lower electrodes on a substrate, forming a light absorption layer on the lower electrodes and the substrate, patterning the light absorption layer to form a trench exposing the lower electrodes, and forming window electrodes using a conductive film. The conductive film extends from a top surface of the light absorption layer to a bottom of the trench along one-sidewall of the trench and is divided at another-sidewall of the trench.Type: GrantFiled: May 18, 2012Date of Patent: November 26, 2013Assignee: Electronics and Telecommunications Research InstituteInventor: Rae-Man Park
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Patent number: 8586392Abstract: A manufacturing method of a display device including a gate electrode film, a first electrode film, a second electrode film, and a conductive film connected to the first electrode film and formed of a conductive layer including a first conductive layer and a second conductive layer formed overlapping the first conductive layer. The method includes the steps of forming the first electrode film and the second electrode film, forming the conductive layer such that the conductive layer is connected to the first electrode film and the second electrode film, and forming the conductive film by removing regions other than predetermined regions of the conductive layer, wherein the conductive layer forming step includes the steps of forming the first conductive layer on the respective upper surfaces of the first electrode film and the second electrode film and forming the second conductive layer on the upper surface of the first conductive layer.Type: GrantFiled: January 11, 2011Date of Patent: November 19, 2013Assignees: Hitachi Displays, Ltd., Panasonic Liquid Crystal Display Co., Ltd.Inventors: Jun Gotoh, Eisuke Hatakeyama, Kenji Anjo, Yoshitomo Ogishima
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Publication number: 20130270600Abstract: A method of increasing a work function of an electrode is provided. The method comprises obtaining an electronegative species from a precursor using electromagnetic radiation and reacting a surface of the electrode with the electronegative species. An electrode comprising a functionalized substrate is also provided.Type: ApplicationFiled: April 13, 2012Publication date: October 17, 2013Inventors: Michael Helander, Zhibin Wang, Jacky Qiu, Zheng-Hong Lu
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Patent number: 8557404Abstract: A transparent conductive film for lamination on a substrate and comprising an ITO film and an FTO film, wherein a part or all of the crystal structure of a surface of the FTO film is orthorhombic, and a transparent conductive film for lamination on a substrate and comprising an ITO film and an FTO film, wherein the thickness of the FTO film is within a range from 5 nm to 20 nm and the FTO film is a continuous film. A method of producing the transparent conductive films includes depositing the ITO film on a substrate using a pyrosol process, and subsequently depositing the FTO film continuously on top of the ITO film.Type: GrantFiled: June 22, 2009Date of Patent: October 15, 2013Assignee: Nippon Soda Co., Ltd.Inventors: Shigeo Yamada, Tatsuya Ooashi
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Publication number: 20130249094Abstract: The present invention discloses a method of preparing a transparent conducting oxide (TCO) film comprising the steps of: applying surface modified TCO nanoparticles onto a surface of a substrate; and cross-linking the surface modified TCO nanoparticles. The present invention also provides a transparent conducting oxide film prepared according to the method.Type: ApplicationFiled: November 28, 2011Publication date: September 26, 2013Applicant: National University of SingaporeInventors: Hansong Cheng, Guo Qin Xu
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Publication number: 20130242247Abstract: A liquid crystal display device includes: a first substrate; a second substrate spaced apart from the first substrate; and a plurality of liquid crystal molecules disposed between the first and second substrates. The first substrate includes a transparent substrate, an insulator layer formed on a surface of the transparent substrate and formed with a plurality of grooves, and a pixel electrode formed on a surface of the insulator layer and formed with a plurality of electrode slits.Type: ApplicationFiled: December 26, 2012Publication date: September 19, 2013Applicants: CHIMEI INNOLUX CORPORATION, INNOCOM TECHNOLOGY (SHENZHEN) CO., LTD.Inventors: Hsin-Yu LEE, Ching-Che YANG, Ker-Yih KAO, Yu-Ju CHEN