Abstract: The present invention relates to integrated thin film solar cells, and more particularly, to integrated thin film solar cells, which minimize the loss of integrated solar cells caused at the time of a manufacturing process and become available at a low cost process, and a method of manufacturing thereof, a processing method of a transparent electrode for integrated thin film solar cells, which widens an effective area and reduces manufacturing costs by minimizing a (insulating) gap between unit cells of the integrated thin film solar cells, and a structure thereof, and a transparent substrate having the transparent electrode.

Abstract: A method of making a light emitting device is disclosed. The method includes providing a light emitting diode and forming an encapsulant in contact with the light emitting diode; wherein forming the encapsulant includes contacting the light emitting diode with a photopolymerizable composition consisting of a silicon-containing resin and a metal-containing catalyst, wherein the silicon-containing resin consists of silicon-bonded hydrogen and aliphatic unsaturation, and applying actinic radiation having a wavelength of 700 nm or less to initiate hydrosilylation within the silicon-containing resin.

Abstract: A solid-state imaging device according to the present invention includes a semiconductor substrate; a photoelectric conversion portion formed on the semiconductor substrate; a gate insulating film formed on the semiconductor substrate and covering the photoelectric conversion portion; a vertical transfer portion for transferring a charge generated at the photoelectric conversion portion in a vertical direction; and a multilayer transfer gate electrode for transferring the charge of the vertical transfer portion. At least one layer of the multilayer transfer gate electrode is made of at least two impurity doped amorphous silicon films of different impurity concentration.

Abstract: CMOS optical receiver and optical transmitters are described. The optical receiver is formed from a CMOS CCD which is modified to immediately output all information indicative of incoming light, i.e., with no transfer gate. The optical transmitter is formed of a modulation window device. Both the optical transmitter and optical receiver are located on-chip with a microprocessor and form the I/O for the microprocessor. Since the modified I/O is serial, a serial to parallel converter, and parallel to serial converter are provided.

Abstract: A method for treating a semiconductor processing component, including: exposing the component to a halogen gas at an elevated temperature, oxidizing the component to form an oxide layer, and removing the oxide layer.

Abstract: A method of adjusting or locally modifying the direction of magnetization of a ferromagnetic layer in a magnetoresistive layer system using a heat stamp is described, the ferromagnetic layer being stabilized over an antiferromagnetic layer. The antiferromagnetic layer is heated, using a heat stamp, over a threshold temperature, above which the influence of this layer on the direction of magnetization of the adjacent ferromagnetic layer disappears; subsequently, the ferromagnetic layer is exposed to an external magnetic field of a predefined direction, and finally the antiferromagnetic layer is cooled again below the threshold temperature. In addition, a heat stamp having a base body and a heatable stamp structure connected to the base body and matching the dimensions of or similar to the magnetoresistive layer system is described.

Abstract: A 3D quantum dot optical path structure is provided, along with a method for selectively forming a 3D quantum dot optical path. The method comprises: forming a single crystal Si substrate with a surface; forming a Si feature in the substrate, such as a via, trench, or pillar; forming dots from a Ge or SiGe material overlying the Si feature; and, forming an optical path that includes the dots. In some aspects of the method, the Si feature has defect sites. For example, the Si feature may be formed with a miscut angle. As a result of the miscut angle, steps are formed in the Si feature plane. Then, the dots are formed in the Si feature steps. The miscut angle is in the range between 0.1 and 5 degrees, and the spacing between steps is in the range between 1 and 250 nanometers (nm).

Abstract: An ultrasonic slitting device cuts and seals the edges of photovoltaic cells and modules to encapsulate the photoactive components in an environment substantially impervious to the atmosphere.

Abstract: When changing a dopant species in an implantation tool, typically a clean process is performed to reduce cross-contamination, which is considered a major issue in implant cycles applied in advanced CMOS processes. Especially, the employment of an implanter previously used for heavy ions may generate increased cross-contamination when subsequently used for boron or phosphorus implants at moderate energies. A clean implant process using xenon gas may effectively reduce this cross-contamination at shorter process times compared to a conventional argon clean step.

Abstract: A method for preventing electrical short circuits in a multi-layer magnetic film stack comprises providing a film stack that includes a layer of magnetic material having an exposed surface. A protective layer is deposited on the exposed surface of the magnetic layer. The protective layer may comprise, for example, a fluorocarbon or a hydrofluorocarbon. The film stack is etched and the protective layer protects the exposed surface from a conductive residue produced while etching the film stack. The method may be used in film stacks to form a magneto-resistive random access memory (MRAM) device.

Abstract: In the step of thermally processing a semiconductor substrate by irradiating the semiconductor substrate with lamp light, a free carrier absorption layer for absorbing the irradiated lamp light is provided in advance in the semiconductor substrate. Thus, it is possible to increase the temperature controllability in a low temperature range during an RTP process, and to reduce, at a low cost, variations in the substrate temperature not only in a low temperature range but also in a processing temperature range. As a result, semiconductor devices that require precise thermal processing can be fabricated without degrading the characteristics of the resulting semiconductor devices.

Abstract: In the present invention a method is shown that uses three concurrent word line voltages in memory cell operations of an a NOR type EEPROM flash memory array. A first concurrent word line voltage controls the operation on a selected word line within a selected memory block. The second concurrent word line voltage inhibits cells on non selected word lines in the selected memory block, and the third concurrent word line voltage inhibits non-selected cells in non-selected blocks from disturb conditions. In addition the three consecutive word line voltages allow a block to be erased, pages within the block to be verified as erased, and pages within the block to be inhibited from further erasure. The three consecutive voltages also allow for the detection of over erasure of cells, correction on a page basis, and verification that the threshold voltage of the corrected cells are above an over erase value but below an erased value.

Abstract: In the present invention a method is shown that uses three concurrent word line voltages in memory cell operations of an a NOR type EEPROM flash memory array. A first concurrent word line voltage controls the operation on a selected word line within a selected memory block. The second concurrent word line voltage inhibits cells on non selected word lines in the selected memory block, and the third concurrent word line voltage inhibits non-selected cells in non-selected blocks from disturb conditions. In addition the three consecutive word line voltages allow a block to be erased, pages within the block to be verified as erased, and pages within the block to be inhibited from further erasure. The three consecutive voltages also allow for the detection of over erasure of cells, correction on a page basis, and verification that the threshold voltage of the corrected cells are above an over erase value but below an erased value.

Abstract: The present invention concerns a process for fabricating a solar cell, wherein material is deposited on a multicrystalline silicon substrate and passivation is performed by means of hydrogen plasma. It is proposed that the material be deposited by low-pressure CVD and the hydrogen passivation be effected by feeding in a hydrogen plasma induced remotely from the partially processed solar cells. A device for carrying out the process is also described.

Abstract: The present invention relates to manufacturing of regenerative photovolatic photoelectrochemical (RPEC) devices. The invention describes a method for manufacturing RPEC devices in a production line. The method comprises the steps of: dispensing a protective film in a substantially continuous sheet; attaching at least one substrate to the protective film in such a way that predetermined areas of the substrate are protected from being coated during at least one subsequent manufacturing process; using the protective films as a means to transport the substrate, along the production line through the at least one subsequent manufacturing process.

Abstract: In the present invention a method is shown that uses three concurrent word line voltages in memory cell operations of an a NOR type EEPROM flash memory array. A first concurrent word line voltage controls the operation on a selected word line within a selected memory block. The second concurrent word line voltage inhibits cells on non selected word lines in the selected memory block, and the third concurrent word line voltage inhibits non-selected cells in non-selected blocks from disturb conditions. In addition the three consecutive word line voltages allow a block to be erased, pages within the block to be verified as erased, and pages within the block to be inhibited from further erasure. The three consecutive voltages also allow for the detection of over erasure of cells, correction on a page basis, and verification that the threshold voltage of the corrected cells are above an over erase value but below an erased value.

Abstract: An electronic power device is integrated monolithically in a semiconductor substrate. The device includes a power region, itself having at least one P/N junction provided therein which comprises a first semiconductor region with a first type of conductivity extending into the substrate from the top surface of the device and being diffused into a second semiconductor region with the opposite conductivity from the first; and an edge protection structure of substantial thickness and limited planar size incorporating at least one trench filled with dielectric material.

Abstract: A continuous process for depositing a thin film layer or layers on a substrate during the production of thin film photovoltaic devices comprising moving the substrate at an elevated temperature in a reduced pressure environment past one or more sources of material to be deposited thereby forming on the substrate at least one thin film of the material from the source.

Abstract: A method for forming a non-single-crystal semiconductor thin film and a photovoltaic device using an apparatus, which has a film deposition chamber with a film-forming space surrounded by a film deposition chamber wall and a belt-like substrate. An external chamber surrounding the deposition chamber wall is provided in the apparatus. While the belt-like substrate is moved in a longitudinal direction, a film-forming gas is introduced through a gas supply device into the film-forming space and microwave energy is radiated from a microwave applicator into the film-forming space to induce a microwave plasma, and thereby form a non-single-crystal semiconductor thin film on a surface of the belt-like substrate. A cooling mechanism and a temperature-increasing mechanism covering a part of an outside surface of the deposition chamber wall provide temperature control.

Abstract: A substrate treatment process is disclosed which comprises plural steps of delivering a long substrate with application of tensile force to the substrate, wherein the strength of the tensile force is changed at least between a first delivery step and a second delivery step. This process prevents enlargement of edge waviness of a belt-shaped substrate to stabilize the plasma discharge.

Abstract: The present invention provides a process of forming a deposited film on a belt-like substrate by a roll-to-roll system, the process comprising the step of eliminating a curl deformation of the belt-like substrate resulting from application of a deformation stress, by exerting an external stress on a non-depositing surface of the belt-like substrate. It can prevent occurrence of flaws, defects of appearance, defects of electrode, and so on in succeeding steps etc. and can produce semiconductor elements and photovoltaic elements with high quality at a high yield.

Abstract: A film forming method is described using an apparatus with a plurality of vacuum chambers which communicate with each other via a connection, where the apparatus has one or more detachable treatment rooms and where the method includes continuously forming a plurality of films on a band-shaped substrate within the treatment rooms, while continuously moving the substrate through the treatment rooms. The treatment rooms within said desired vacuum chambers are replaced after forming the film for a predetermined period as a part of the film forming method.

Abstract: A process for producing a solar cell module comprising at least a photovoltaic element module is provided. The photovoltaic element module is formed by electrically connecting a plurality of photovoltaic elements with each other, after the individual photovoltaic elements are identified or classified into a plurality of groups which are different from each other in property and attribute. The photovoltaic element module is formed such that at least two kinds of photovoltaic elements having different property and attribute co-exist therein. A solar cell module having at least a photovoltaic element module comprising a plurality of photovoltaic elements electrically connected with each other is also provided; the plurality of photovoltaic elements comprises photovoltaic elements identified or classified into at least two kinds which are different in terms of property and attribute.

Abstract: A process is provided for producing a photovoltaic element which has at least one pin junction, and a buffering semiconductor layer constituted of plural sublayers between an n-type layer and an i-type layer and/or between an i-type layer and a p-type layer, through production steps of introducing a source material gas into an electric discharge space in a reaction chamber, and decomposing the source material gas by plasma discharge to form a non-monocrystalline semiconductor layer. In the process, in electric discharge generation for formation of at least one of the sublayers, the polarity of the electrode confronting the substrate for formation of a first sublayer and the polarity of the electrode confronting the substrate for formation of a second sublayer adjacent to the first sublayer is made different from each other, or the potential of one of the electrodes is set at zero volt. Thereby, diffusion of the dopant from the p-type layer or the n-type layer into the i-type layer is prevented effectively.

Abstract: A process for producing a thin film semiconductor solar cell, said solar cell at least comprising: a p-type layer, and an n-type layer, which are deposited on carrier material, wherein the composition of the p-type layer, especially the optical band gap and/or the specific conductivity, and/or the composition of the n-type layer, especially the optical band gap and/or the specific conductivity thereof, are varied on a continuous way in time and/or space, by controlling the composition and/or flow of predetermined gases at the location where the respective semiconductor layer is formed.

Abstract: This invention comprises deposition of thin film photovoltaic junctions on metal substrates which can be heat treated following deposition in a continuous fashion without deterioration of the metal support structure. In a separate operation, an interconnection substrate structure is produced in a continuous roll-to-roll fashion. In this way the interconnection substrate structure can be uniquely formulated from polymer-based materials since it does not have to endure high temperature exposure. Cells comprising the metal foil supported photovoltaic junctions are then laminated to the interconnection substrate structure. Conductive interconnections are deposited to complete the array. The conductive interconnections can be accomplished with a separately prepared interconnection component.

Abstract: An improved semiconductor device manufacturing system and method is shown. In the system, undesirable sputtering effect can be averted by virtue of a combination of an ECR system and at CVD system. Prior to the deposition according to the above combination, a sub-layer can be pre-formed on a substrate in a reaction chamber and transported to another chamber in which deposition is made according to the combination without making contact with air, so that a junction thus formed has good characteristics.

Abstract: The invention pertains to a method of manufacturing a photovoltaic foil supported by a carrier and comprising a plurality of photovoltaic layers which together have the ability of generating electric current from incident light, a back-electrode layer on one side adjacent and parallel to the photovoltaic layers, and a transparent conductor layer on the other side of, and adjacent and parallel to the photovoltaic layers, which method comprises the following subsequent steps: providing a temporary substrate, applying the transparent conductor layer, applying the photovoltaic layers, applying the back-electrode layer, applying the carrier, removing the temporary substrate, and, preferably, applying a top coat on the side of the transparent conductor layer.

Abstract: Processes and apparatus for manufacturing radio frequency transponders having substrates formed from a flexible tape or film are disclosed. The RF transponders are formed on the tape so that their longest dimension (e.g., their length ("L")) is oriented parallel to the length of the tape. This layout places few or no constraints in the transponder's length allowing the length of the transponder's antenna circuit to be adjusted to satisfy the requirements of various applications.

Abstract: It may be necessary to provide conductors at very small distances from one another when electronic circuits, for example integrated circuits, are manufactured on an insulating substrate. A multilayer wiring system is often used in that case. The invention renders it possible to make very small inter-electrode gaps in a single conductor layer. To achieve this, the conductor layer is covered with a comparatively thick dielectric layer 4, 5 in which windows 8 are formed which extend over only part of the dielectric layer. Then an auxiliary layer 9 is provided which has depressions at the areas of the windows 8. Windows 11 are formed in the dielectric layer by anisotropic etching-back with dimensions which are substantially smaller than the dimensions of the original windows 8. The windows 11 may be used as etching windows or oxidation windows for the subsequent formation of the definitive conductor pattern.

Abstract: The stainless steel sheet useful as a substrate for non-single crystalline semiconductor solar cells has minute ripples with undulations along a rolling direction, and its surface roughness is controlled in the range of R.sub.z 0.3-1.4 .mu.m and R.sub.max 0.5-1.7 .mu.m. It is manufactured by finish cold rolling a stainless steel strip with a reduction ratio of at least 20% at a rolling speed of at least 400 m/min. using work rolls polished with abrasives of gage #100-#400 at a final pass, annealing the rolled strip in an open-air atmosphere and then electrolytically pickling the annealed strip in a nitric acid solution. Since minute ripples with undulations are formed on the surface of the stainless steel sheet, an energy conversion efficiency is increased by acceleration of scattering and multiple reflection of incident light rays projected into a non-single crystalline semiconductor layer.

Abstract: A method for manufacturing a photoelectric conversion element containing at least one pin junction, wherein a diffusion preventing layer is provided between an n-type layer and an i-type layer and/or between an i-type layer and a p-type layer, and the diffusion preventing layer is deposited such that deposition temperature differs in its thickness direction.

Abstract: An integrated wafer loader is provided for use with a vacuum process chamber. At least one semipermeable membrane provided in the separator between upper and lower chambers of a load lock permits air flow while preventing particulate matter transfer. A micro-environment container is sealed within the upper chamber and a vacuum simultaneously produced in both upper and lower chambers. A movable carrier plate opens the micro-environment container and removes a cassette of wafers from therein and into the lower chamber. The micro-environment container remains supported by the separator and forms an impermeable barrier between the chambers. Wafers are transferred from the cassette to the process environment, and returned to the cassette after processing has been completed. The carrier plate returns the cassette containing the processed wafers to the micro-environment container for removal from the load lock chamber.

Abstract: A method of continuous manufacture of semiconductor integrated circuits, said method and apparatus adapted to contain the semiconductor substrate, semiconductor deposition coating processes, and etching processes within a substantially collocated series of process chambers so that the semiconductor travels from one chamber to the next without exposure to airborne impurities and contact with manufacturing personnel. The invention has particular utility in the high volume fabrication of large surface area semiconductor circuits such as active matrix liquid crystal displays. The present invention contains a roll-to-roll and continuous belt embodiment.