Responsive To Electromagnetic Radiation Patents (Class 438/57)
  • Patent number: 11976365
    Abstract: A method of forming one-dimensional metal oxide nanostructures includes forming a TiN film on a substrate to provide a TiN-coated substrate; providing an aqueous mixture including hexamethylenetetramine and a metal nitrate, contacting the TiN-coated substrate with the aqueous mixture such that the TiN film on the substrate is in the aqueous mixture, and heating the aqueous mixture at a temperature ranging from about 50° C. to about 100° C. for a period of time ranging from about 60 minutes to about 180 minutes to form the metal oxide nanostructures. The method offers a low-temperature approach for the growth of metal oxide nanostructures. In an embodiment, the metal oxide is zinc oxide (ZnO) and the metal nitrate is zinc nitrate. In an embodiment the substrate is a Si/SiO2 substrate. In an embodiment, the metal oxide nanostructures include one-dimensional nanostructures, such as nanorods.
    Type: Grant
    Filed: March 16, 2023
    Date of Patent: May 7, 2024
    Assignee: KING FAISAL UNIVERSITY
    Inventors: Faheem Ahmed, Nishat Arshi, Shalendra Kumar, Nagih Mohammed Shaalan, Ghazzai Almutairi, P. M. Z. Hasan, Naushad Ahmad, Thamraa Alshahrani, Afzal Hussain
  • Patent number: 11961930
    Abstract: The present disclosure relates to the technical field of solar cells, and relates to a crystalline silicon solar cell and a preparation method thereof, and a photovoltaic assembly. The crystalline silicon solar cell includes a crystalline silicon substrate, a passivation layer that is disposed on the crystalline silicon substrate and that is provided with through holes, a carrier collection layer that is disposed on the passivation layer, and electrodes that contact the carrier collection layer; the carrier collection layer contacts the crystalline silicon substrate by means of the through holes on the passivation layer. In the described crystalline silicon solar cell, through holes are provided on the passivation layer, and the carrier collection layer contacts the crystalline silicon substrate by means of the through holes on the passivation layer.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: April 16, 2024
    Assignee: JINGAO SOLAR CO., LTD.
    Inventors: Haipeng Yin, Wei Shan, Kun Tang
  • Patent number: 11927616
    Abstract: A method for measuring alpha particle emissions may include obtaining a wafer emission rate, wherein the wafer emission rate is measured with a counter. The method may further include covering the wafer with a metal mesh grounded to a cathode of the counter wherein the metal mesh is grounded to the cathode outboard of the wafer and obtaining a mesh and wafer emission rate, wherein the mesh and wafer emission rate is measured with the counter. The method may further include replacing the wafer with a wafer carcass, obtaining a wafer carcass and mesh emission rate, and calculating a wafer carcass emissivity.
    Type: Grant
    Filed: March 30, 2021
    Date of Patent: March 12, 2024
    Assignee: International Business Machines Corporation
    Inventors: Michael S. Gordon, Kenneth P. Rodbell, Conal Murray
  • Patent number: 11916095
    Abstract: To increase the capacity of a charge holding section of a pixel in an imaging device that performs imaging using a global shutter method. An imaging device includes a photoelectric converter, a first charge holding section, an auxiliary charge holding section, a transfer route, and an image signal generator. The first charge holding section is formed near a front surface of a semiconductor substrate. A first charge transfer section transfers charge from the photoelectric converter to the first charge holding section. The auxiliary charge holding section underlies the first charge holding section, and holds a portion of the charges held in the first charge holding section. The transfer route transfers the charge between the first charge holding section and the auxiliary charge holding section. The image signal generator generates an image signal based on the charges held in the first charge holding section and the auxiliary charge holding section.
    Type: Grant
    Filed: March 1, 2019
    Date of Patent: February 27, 2024
    Assignee: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Naoyuki Sato
  • Patent number: 11914257
    Abstract: A display device includes: a base substrate, a transistor disposed on the base substrate, an organic layer disposed on the transistor, a display element layer disposed on the organic layer, and a pixel electrode disposed between the organic layer and the display element layer. The pixel electrode includes a first electrode layer disposed between the organic layer and the display element layer and containing an organic matter derived from the organic layer, and a second electrode layer disposed between the first electrode and the display element layer and not containing the organic matter.
    Type: Grant
    Filed: September 6, 2022
    Date of Patent: February 27, 2024
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventor: Jung-Woo Lee
  • Patent number: 11901178
    Abstract: A production method of a quantum dot comprising a Group IIIA-VA compound, the quantum dot as prepared, and an electronic device including the same, and the production method includes: supplying a Group VA element precursor including a halide of a Group VA element and a first ligand of a phosphine compound or a first amine compound; and performing a reaction between the Group VA element precursor and a Group IIIA metal precursor in the presence of a reducing agent in an organic reaction medium including a second amine compound.
    Type: Grant
    Filed: March 1, 2021
    Date of Patent: February 13, 2024
    Assignees: SAMSUNG ELECTRONICS CO., LTD., THE TRUSTEES OF THE UNIVERSITY OF PENNSYLVANIA
    Inventors: Tae Gon Kim, Nuri Oh, Tianshuo Zhao, Cherie Kagan, Eun Joo Jang, Christopher Murray
  • Patent number: 11899890
    Abstract: A display device including a beam emitter and a display panel is provided. The beam emitter emits a first beam; the display panel includes a display screen body and a light control layer. The light control layer includes photosensitive devices that outputs a sensing signal according to a sensing result, a control module for controlling turning on and turning off of the photosensitive devices, and a reading module for reading the sensing signal output by the photosensitive devices and determining a projection position of the first beam on the display panel according to the sensing signal.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: February 13, 2024
    Assignee: Shenzhen China Star Optoelectronics Semiconductor Display Technology Co., Ltd.
    Inventors: Miao Jiang, Lixuan Chen, Xin Zhang, Lei Wen, Bao Zha
  • Patent number: 11901388
    Abstract: Various embodiments of the present application are directed towards a semiconductor-on-insulator (SOI) DoP image sensor and a method for forming the SOI DoP image sensor. In some embodiments, a semiconductor substrate comprises a floating node and a collector region. A photodetector is in the semiconductor substrate and is defined in part by a collector region. A transfer transistor is over the semiconductor substrate. The collector region and the floating node respectively define source/drain regions of the transfer transistor. A semiconductor mesa is over and spaced from the semiconductor substrate. A readout transistor is on and partially defined by the semiconductor mesa. The semiconductor mesa is between the readout transistor and the semiconductor substrate. A via extends from the floating node to a gate electrode of the readout transistor.
    Type: Grant
    Filed: June 23, 2021
    Date of Patent: February 13, 2024
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jhy-Jyi Sze, Dun-Nian Yaung, Alexander Kalnitsky
  • Patent number: 11901466
    Abstract: A photovoltaic cell includes a silicon substrate having two opposite main surfaces. A first main surface of the two main surfaces is covered with a passivation layer stack, including a POx- and Al-including-layer covering the first main surface, and a capping layer which covers the POx- and Al-including-layer. A method for manufacturing a photovoltaic cell is also disclosed.
    Type: Grant
    Filed: March 11, 2019
    Date of Patent: February 13, 2024
    Assignee: TECHNISCHE UNIVERSITEIT EINDHOVEN
    Inventors: Wilhelmus Mathijs Marie Kessels, Lachlan Edward Black
  • Patent number: 11869993
    Abstract: A method of forming a photovoltaic product with a plurality of photovoltaic cells is disclosed. The method comprises depositing a stack with first and second electrode layers (12, 16) and a photovoltaic layer (14) arranged in between. The method comprises partitioning the stack. The partitioning includes forming a trench (20) extending through the second electrode layer and the photovoltaic layer to expose the first electrode layer. The stack is first irradiated with a laser beam with a first spotsize and with a first wavelength for which the photovoltaic layer has a relatively high absorption coefficient as compared to that of the second electrode layer. The stack is then irradiated with a second laser beam with a second spotsize, greater than the first spotsize, and with a second wavelength for which the photovoltaic layer has a relatively low absorption coefficient as compared to that of the second electrode layer.
    Type: Grant
    Filed: July 9, 2020
    Date of Patent: January 9, 2024
    Assignee: Nederlandse Organisatie voor toegepast-natuurwetenschappelijk onderzoek TNO
    Inventors: Veronique Stephanie Gevaerts, Johan Bosman
  • Patent number: 11843069
    Abstract: The present disclosure describes a detector used in critical dimension scanning electron microscopes (CD-SEM) and review SEM systems. In one embodiment, the detector includes a semiconductor structure having a p-n junction and a hole through which a scanning beam is passed to a target. The detector also includes a top electrode for the p-n junction (e.g., anode or cathode) that provides an active area for detecting electrons or electromagnetic radiation (e.g., backscattering from the target). The top electrode has a doped layer and can also have a buried portion beneath the doped layer to reduce a series resistance of the top electrode without changing the active area. In another embodiment, an isolation structure can be formed in the semiconductor structure near sidewalls of the hole to electrically isolate the active area from the sidewalls. A method for forming the buried portion of the top electrode is also described.
    Type: Grant
    Filed: December 4, 2019
    Date of Patent: December 12, 2023
    Assignee: ASML Netherlands B.V.
    Inventors: Gianpaolo Lorito, Stoyan Nihtianov, Xinqing Liang, Kenichi Kanai
  • Patent number: 11837675
    Abstract: A thin-film solar module with a substrate and a layer structure applied thereon that comprises a rear electrode layer, a front electrode layer, and an absorber layer arranged between the back electrode layer and the front electrode layer. Serially connected solar cells are formed in the layer structure by patterning zones, wherein each patterning zone comprises a first patterning line for subdividing at least the rear electrode layer, a second patterning line for subdividing at least the absorber layer, and at least one third patterning line for subdividing at least the front electrode layer. At least one patterning zone has one or more optically transparent zones in a zone region reduced by the first patterning line, which are in each case rear-electrode-layer-free, wherein the one or more optically transparent zones are implemented such that the rear electrode layer is continuous in the zone region.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: December 5, 2023
    Assignee: CNBM RESEARCH INSTITUTE FOR ADVANCED GLASS MATERIALS GROUP CO., LTD.
    Inventors: Andreas Heiss, Joerg Palm, Helmut Vogt, Robert Lechner
  • Patent number: 11835628
    Abstract: A time-of-flight image sensor is disclosed. The time-of-flight image sensor includes an array of pixels. Each pixel of the array of pixels includes a first photogate, a second photogate adjacent the first photogate, an isolation barrier intermediate the first photogate and the second photogate, and an in-pixel ground node intermediate the first photogate and the second photogate.
    Type: Grant
    Filed: November 2, 2020
    Date of Patent: December 5, 2023
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: Minseok Oh, Satyadev Hulikal Nagaraja
  • Patent number: 11823889
    Abstract: A sensor may be provided, including a substrate having a first semiconductor layer, a second semiconductor layer, and a buried insulator layer arranged between the first semiconductor layer and the second semiconductor layer. The sensor may further include a photodiode arranged in the first semiconductor layer; and a quenching resistive element electrically connected in series with the photodiode. The quenching resistive element is arranged in the second semiconductor layer, and the quenching resistive element is arranged over the photodiode but separated from the photodiode by the buried insulator layer.
    Type: Grant
    Filed: May 11, 2022
    Date of Patent: November 21, 2023
    Assignee: GLOBALFOUNDRIES Singapore Pte. Ltd.
    Inventors: Lanxiang Wang, Shyue Seng Tan, Eng Huat Toh
  • Patent number: 11810934
    Abstract: An image sensor is provided. The image sensor includes a substrate having a first pixel region and a second pixel region. The image sensor also includes a resonator structure disposed over the substrate. The resonator structure includes a first metal layer over the first pixel region and the second pixel region. The resonator structure also includes a first insulating layer over the first metal layer and the first pixel region. The first insulating layer has a first thickness. The resonator structure further includes a second insulating layer over the first metal layer and the second pixel region. The second insulating layer has a second thickness that is greater than the first thickness. In addition, the resonator structure includes a second metal layer over the first insulating layer and the second insulating layer.
    Type: Grant
    Filed: April 3, 2018
    Date of Patent: November 7, 2023
    Assignee: VISERA TECHNOLOGIES COMPANY LIMITED
    Inventors: Yu-Jen Chen, Chang-Wei Chen
  • Patent number: 11810986
    Abstract: A method for integrating a surface-electrode ion trap and a silicon optoelectronic device, and an integrated structure. A silicon structure and a grating are formed on a wafer. A first dielectric layer, a second dielectric layer, a third dielectric layer, and a fourth dielectric layer are sequentially deposited above the wafer. An epitaxy opening is provided in the first dielectric layer to form single-photon avalanche detectors. First contacts vias connecting the detectors, and through silicon vias reaching a back surface of the wafer, are provided in the second dielectric layer and the third dielectric layer, respectively. Electrodes, the second contact vias and the third contact vias are provided in the fourth dielectric layer. The first contact vias are connected to a first electrode via the second contact vias, and the through silicon vias are connected to the first electrode and a second electrode via the third contact vias.
    Type: Grant
    Filed: December 14, 2020
    Date of Patent: November 7, 2023
    Assignee: Institute of Microelectronics, Chinese Academy of Sciences
    Inventors: Yan Yang, Zhihua Li, Wenwu Wang
  • Patent number: 11799049
    Abstract: A multijunction solar cell including a metamorphic layer, and particularly the design and specification of the composition, lattice constant, and band gaps of various layers above the metamorphic layer in order to achieve reduction in “bowing” of the semiconductor wafer caused by the lattice mismatch of layers associated with the metamorphic layer.
    Type: Grant
    Filed: April 27, 2021
    Date of Patent: October 24, 2023
    Assignee: SolAero Technologies Corp.
    Inventors: Zachary Bittner, John Hart, Samantha Whipple, Nathaniel Miller, Daniel Derkacs
  • Patent number: 11784262
    Abstract: An apparatus includes a first semiconductor region of a first conductivity type configured to collect a signal charge, and a connection region of a second conductivity type configured to feed a predetermined potential to a well including a second semiconductor region of the second conductivity type at a depth to which the connection region extends, a third semiconductor region of the second conductivity type at a position deeper than the connection region and the second semiconductor region, and a fourth semiconductor region between the second semiconductor region and the third semiconductor region, wherein a dopant for use in forming a semiconductor region of the first conductivity type is injected in the fourth semiconductor region, and a main carrier of the fourth semiconductor region is a carrier of the same conductivity type as a majority carrier of a semiconductor region of the second conductivity type.
    Type: Grant
    Filed: July 31, 2020
    Date of Patent: October 10, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Mahito Shinohara
  • Patent number: 11760277
    Abstract: The present disclosure relates to a vehicle body part of a motor vehicle having at least one frame component and at least one trim part which is arranged thereon, wherein the trim part has at least one cutout which is closed off in an essentially airtight and watertight fashion and has at least one solar cell which is arranged therein and has the purpose of generating electrical energy, and wherein the outer side of the trim part has, at least in a region adjacent to the at least one solar cell, an outer shape which is curved three-dimensionally and which is provided for forming a part of the external contour of the motor vehicle in the installed position on said motor vehicle. Furthermore, the present disclosure relates to a method for producing a vehicle body part.
    Type: Grant
    Filed: July 25, 2018
    Date of Patent: September 19, 2023
    Assignee: SONO MOTORS GMBH
    Inventors: Jona Christians, Laurin Hahn
  • Patent number: 11742451
    Abstract: The embodiments of the present disclosure describe a stressed Ge PD and fabrications techniques for making the same. In one embodiment, a stressor material is deposited underneath an already formed Ge PD. To do so, wafer bonding can be used to bond the wafer containing the Ge PD to a second, handler wafer. Doing so provides support to remove the substrate of the wafer so that a stressor material (e.g., silicon nitride, diamond-like carbon, or silicon-germanium) can be disposed underneath the Ge PD. The stress material induces a stress or strain in the crystal lattice of the Ge which changes its bandgap and improves its responsivity.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: August 29, 2023
    Assignee: Cisco Technology, Inc.
    Inventors: Xunyuan Zhang, Li Li, Prakash B. Gothoskar, Soha Namnabat
  • Patent number: 11730433
    Abstract: An X-ray detector includes a first circuit with an NPN-type bipolar transistor and a second circuit configured to compare a voltage at a terminal of the NPN-type bipolar transistor with a reference value substantially equal to a value of the terminal voltage which would occur when the first circuit has been exposed to a threshold quantity of X-rays.
    Type: Grant
    Filed: November 18, 2021
    Date of Patent: August 22, 2023
    Assignees: STMicroelectronics (Crolles 2) SAS, STMicroelectronics SA
    Inventors: Gilles Gasiot, Severin Trochut, Olivier Le Neel, Victor Malherbe
  • Patent number: 11705528
    Abstract: A semiconductor light-receiving element includes a substrate; a light-receiving mesa portion, formed on top of the substrate, including a first semiconductor layer of a first conductivity type, an absorption layer, and a second semiconductor layer of a second conductivity type; a light-receiving portion electrode, formed above the light-receiving mesa portion, connected to the first semiconductor layer; a pad electrode formed on top of the substrate; and a bridge electrode, placed so that an insulating gap is interposed between the bridge electrode and the second semiconductor layer, configured to connect the light-receiving portion electrode and the pad electrode on top of the substrate, the bridge electrode being formed in a layer separate from layers of the light-receiving portion electrode and the pad electrode.
    Type: Grant
    Filed: September 10, 2021
    Date of Patent: July 18, 2023
    Assignee: Lumentum Japan, Inc.
    Inventors: Ryu Washino, Hiroshi Hamada, Takafumi Taniguchi
  • Patent number: 11694867
    Abstract: A method for producing a radiation window includes patterning a photo resist structure onto a double-sided silicon wafer, plasma etching the silicon wafer to create an etched silicon wafer having a silicon supporting structure etched upon a first side of the double-sided silicon wafer, applying a silicon nitride thin film to the etched silicon wafer, patterning a photo resist structure and plasma etching a second side of the double-sided silicon wafer to create an initial window in the silicon nitride thin film, and wet etching the second side of the double-sided silicon wafer to release the silicon nitride thin film and supporting structure from the portion of the double-sided silicon wafer defined by the initial window.
    Type: Grant
    Filed: August 25, 2021
    Date of Patent: July 4, 2023
    Assignee: Bruker Nano, Inc.
    Inventors: Joseph S. Fragala, Xing Zhao
  • Patent number: 11680180
    Abstract: Described herein are methods for forming e-textiles, wherein the methods include printing a particle-free conductive ink on a textile substrate, and curing the textile substrate to produce a conductive pattern thereon. The printing may include inkjet printing and may produce a printed pattern which exhibits an ink bleed of less than 0.5 mm, such as less than 0.2 mm. During printing, the textile substrate may be heated to a temperature of 30° C. to 90° C. before and during the printing process. The fabric substrate may be cured using heat and/or light to produce a conductive pattern having a sheet resistance of less than 10?/?, or even less than 1?/?.
    Type: Grant
    Filed: February 13, 2019
    Date of Patent: June 20, 2023
    Assignee: LIQUID X PRINTED METALS, INC.
    Inventors: Chengeto Gwengo, Robert G. Swisher, Christianna M. Petrak
  • Patent number: 11656108
    Abstract: An example sensor includes a PCB mounted in an internal chamber of housing, wherein the PCB comprises calibration electrical contact points; a sealing grommet mounted in the internal chamber, wherein the sealing grommet comprises an axial hole aligned with the calibration electrical contact points, thereby providing access to the calibration electrical contact points of the PCB; a grommet plug disposed in the axial hole of the sealing grommet; a sensing element disposed in the housing and electrically-coupled to the PCB via an electrical connection; an encapsulant sealing material deposited on the sealing grommet and the grommet plug; and an external cable connected to the PCB and extending through the sealing grommet and through the encapsulant sealing material.
    Type: Grant
    Filed: June 2, 2022
    Date of Patent: May 23, 2023
    Assignee: Parker-Hannifin Corporation
    Inventors: Steve A. Robison, Anand Hariharan, Kayon W. Chin, Richard J. Evans
  • Patent number: 11651957
    Abstract: Various articles and devices can be manufactured to take advantage of a what is believed to be a novel thermodynamic cycle in which spontaneity is due to an intrinsic entropy equilibration. The novel thermodynamic cycle exploits the quantum phase transition between quantum thermalization and quantum localization. Preferred devices include a phonovoltaic cell, a rectifier and a conductor for use in an integrated circuit.
    Type: Grant
    Filed: May 29, 2019
    Date of Patent: May 16, 2023
    Assignee: SemiNuclear, Inc.
    Inventor: Patrick Curran
  • Patent number: 11640069
    Abstract: The light extraction device, the detection equipment and the operation method thereof are provided. The light extraction device includes at least one light splitting unit, each of the at least one light splitting unit includes a color separation grating, configured to separate light incident on the color separation grating into a plurality of light beams that are collimated and propagated in different directions and have different colors; a first lens, disposed corresponding to the color separation grating and configured to converge the plurality of light beams; and a first pinhole, located on a side of the first lens away from the color separation grating and correspondingly arranged with the first lens. The first lens is configured to converge a light beam having a preset color in the plurality of light beams to the first pinhole and allow the light beam having the preset color to exit.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: May 2, 2023
    Assignee: BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Xiandong Meng, Xianqin Meng, Wei Wang, Jifeng Tan, Qiuyu Ling, Fangzhou Wang, Jian Gao, Xiaochuan Chen
  • Patent number: 11637136
    Abstract: A display device, including a pixel array substrate and a sensor element substrate, is provided. The sensor element substrate overlaps the pixel array substrate, and includes a substrate, a switch element, and a photosensitive element. The switch element is located on the substrate. The photosensitive element is electrically connected to the switch element, and includes a transparent electrode, a sensing layer, a metal electrode, and a barrier layer. The sensing layer is located on the transparent electrode. The metal electrode is located on the sensing layer, and covers a first sidewall of the sensing layer. The barrier layer covers a first sidewall of the transparent electrode. The barrier layer is located between the metal electrode and the sensing layer, or between the transparent electrode and the sensing layer.
    Type: Grant
    Filed: September 10, 2020
    Date of Patent: April 25, 2023
    Assignee: Au Optronics Corporation
    Inventors: Shin-Shueh Chen, Yi-Wei Chen
  • Patent number: 11631710
    Abstract: Image sensors are provided. The image sensors may include a plurality of unit pixels and a color filter array on the plurality of unit pixels. The color filter array may include a color filter unit including four color filters that are arranged in a two-by-two array, and the color filter unit may include two yellow color filters, a cyan color filter, and one of a red color filter or a green color filter.
    Type: Grant
    Filed: September 23, 2020
    Date of Patent: April 18, 2023
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Bomi Kim, BumSuk Kim, Jung-Saeng Kim, Yun Ki Lee, Taesub Jung
  • Patent number: 11621168
    Abstract: A method and system for doping semiconductor materials using microwave exposure. In some embodiments, the surface of a semiconductor substrate coated with a layer of dopant material is exposed to a beam of microwave radiation, with the frequency of the microwave radiation chosen to coincide with a microwave absorption resonance of the dopant. A gyrotron is a preferred source of monochromatic microwaves capable of delivering the appropriate the power density. Under this microwave exposure, the dopant heats up and diffuses into the semiconductor. Since only the dopant is selectively excited, the atoms of the crystal lattice remain cooler. Additional cooling can be provided by a flow of cooling gas onto the surface. When the electric field of the microwave exposure is high enough to overcome the potential barrier of interstitial diffusion within the crystal, the dopants migrate to vacancies in the crystal lattice, and the semiconductor material becomes activated.
    Type: Grant
    Filed: July 12, 2022
    Date of Patent: April 4, 2023
    Assignee: Gyrotron Technology, Inc.
    Inventors: Vladislav Sklyarevich, Mykhaylo Shevelev
  • Patent number: 11619754
    Abstract: Disclosed herein is a method comprising: forming a doped region of a semiconductor substrate by doping a surface of the semiconductor substrate with dopants; driving the dopants into the semiconductor substrate by annealing the semiconductor substrate; controlling doping profile of the doped region by repeating doping and annealing the semiconductor substrate; forming a first electrode on the semiconductor substrate, wherein the first electrode is in electrical contact with the doped region; forming an outer electrode arranged around the first electrode, wherein the outer electrode is electrically insulated from the first electrode.
    Type: Grant
    Filed: October 29, 2021
    Date of Patent: April 4, 2023
    Assignee: SHENZHEN XPECTVISION TECHNOLOGY CO., LTD.
    Inventors: Peiyan Cao, Yurun Liu
  • Patent number: 11616152
    Abstract: An imaging device may include single-photon avalanche diodes (SPADs). To improve the sensitivity and signal-to-noise ratio of the SPADs, light scattering structures may be formed in the semiconductor substrate to increase the path length of incident light through the semiconductor substrate. To mitigate crosstalk, an isolation structure may be formed in a ring around the SPAD. The isolation structure may be a hybrid isolation structure with both a metal filler that absorbs light and a low-index filler that reflects light. The isolation structure may be formed as a single trench or may include a backside deep trench isolation portion and a front side deep trench isolation portion. The isolation structure may also include a color filtering material.
    Type: Grant
    Filed: September 14, 2020
    Date of Patent: March 28, 2023
    Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLC
    Inventors: Swarnal Borthakur, Marc Allen Sulfridge
  • Patent number: 11605745
    Abstract: A stacked III-V semiconductor photonic device having a second metallic terminal contact layer at least formed in regions, a highly doped first semiconductor contact region of a first conductivity type, a very low doped absorption region of the first or second conductivity type having a layer thickness of 20 ?m-2000 ?m, a first metallic terminal contact layer, wherein the first semiconductor contact region extends into the absorption region in a trough shape, the second metallic terminal contact layer is integrally bonded to the first semiconductor contact region and the first metallic terminal contact layer is arranged below the absorption region. In addition, the stacked III-V semiconductor photonic device has a doped III-V semiconductor passivation layer of the first or second conductivity type, wherein the III-V semiconductor passivation layer is arranged at a first distance of at least 10 ?m to the first semiconductor contact region.
    Type: Grant
    Filed: March 22, 2021
    Date of Patent: March 14, 2023
    Assignee: AZUR SPACE Solar Power GmbH
    Inventor: Gerhard Strobl
  • Patent number: 11600643
    Abstract: An assembly for optical to electrical power conversion including a photodiode assembly having a substrate layer and an internal side, an antireflective layer, a heterojunction buffer layer adjacent the internal side; an active area positioned adjacent the heterojunction buffer layer, a plurality of n+ electrode regions and p+ electrode regions positioned adjacent the active area, and back-contacts configured to align with the n+ and p+ electrode regions. The active area converts photons from incoming light into liberated electron hole pairs. The heterojunction buffer layer prevents electrons and holes of the liberated electron hole pairs from moving toward the substrate layer. The plurality of electrode regions are configured in an alternating pattern with gaps between each n+ and p+ electrode region.
    Type: Grant
    Filed: January 31, 2022
    Date of Patent: March 7, 2023
    Assignee: PHION TECHNOLOGIES CORP.
    Inventors: Alan Wang, Jonathan Nydell, Steve Laver
  • Patent number: 11600731
    Abstract: A photovoltaic cell is provided, which includes a substrate; a first passivation layer and a first anti-reflection layer disposed on a front surface of the substrate; and a second passivation layer, a PPW layer and at least one silicon nitride layer SiuNv (1<u/v<4) disposed on a rear surface of the substrate. The at least one silicon nitride layer has a refractive index and a thickness in respective ranges of 1.9 to 2.5 and 50 nm to 100 nm. The second passivation layer includes at least one aluminum oxide layer AlxOy (0.8<y/x<1.6), a refractive index and a thickness of which are respectively in ranges of 1.4 to 1.6 and 4 nm to 20 nm. The PPW layer includes at least one silicon oxynitride layer SirOsNt (r>s>t), a refractive index and a thickness of which are respectively in ranges of 1.5 to 1.8 and 1 nm to 30 nm.
    Type: Grant
    Filed: July 4, 2022
    Date of Patent: March 7, 2023
    Assignees: ZHEJIANG JINKO SOLAR CO., LTD., JINKO SOLAR CO., LTD.
    Inventors: Ruifeng Li, Yankai Qiu, Ning Zhang, Bin Li
  • Patent number: 11588420
    Abstract: Methods, systems, and apparatuses related to thermo-dielectric-elastomer-cells may be shown and described. In one embodiment a thermo dielectric elastomer cell (TDEC) can include a layer of carbon nanotubes that absorb sunlight; a layer of photo switchable molecules; a plurality of dielectric elastomer layers, each of the plurality of dielectric elastomer layer comprising a layer of dielectric elastomer material and a layer of N-P junction transistors between the layers of dielectric elastomer material; a layer of insulators separating each of the plurality of dielectric elastomer layers; and an elastic cushioning which is placed between the plurality of dielectric elastomer layers and surrounding the dielectric elastomer material.
    Type: Grant
    Filed: August 18, 2021
    Date of Patent: February 21, 2023
    Inventor: Farouk Dakhil
  • Patent number: 11587960
    Abstract: A photodetector device comprising n-type and p-type light absorbing regions arranged to form a pn-junction and n+ and p+ contact regions connected to respective contacts. The light absorbing regions and the contact regions are arranged in a sequence n+ p n p+ so that, after a voltage applied between the n+ and p+ contacts is switched from a reverse bias to a forward bias, electrons and holes which are generated in the light absorbing regions in response to photon absorption drift towards the p+ and n+ contact regions respectively, which causes current to start to flow between the contacts after a time delay which is inversely proportional to the incident light intensity.
    Type: Grant
    Filed: November 20, 2020
    Date of Patent: February 21, 2023
    Assignee: Actlight SA
    Inventors: Serguei Okhonin, Maxim Gureev, Denis Sallin
  • Patent number: 11587969
    Abstract: A photoelectric conversion apparatus includes a plurality of pixels. Each of the plurality of pixels includes a first photoelectric conversion region and a second photoelectric conversion region. A first semiconductor region is disposed between the first photoelectric conversion region and the second photoelectric conversion region. The first photoelectric conversion region and the second photoelectric conversion region contain a first element mainly forming the first photoelectric conversion region and the second photoelectric conversion region, and the first photoelectric conversion region and the second photoelectric conversion region contain a second element. The first semiconductor region contains the first element and a third element. A mass number of the third element is twice or more a mass number of the first element.
    Type: Grant
    Filed: June 18, 2020
    Date of Patent: February 21, 2023
    Assignee: CANON KABUSHIKI KAISHA
    Inventor: Koji Hara
  • Patent number: 11585807
    Abstract: Provided is a sensor with nanowires in an aligned array. In one example, the heaviest doped region is not in the nanowire array, but in the bulk silicon substrate and the sensor is functionalized to be have modified electrical properties when proteins are present.
    Type: Grant
    Filed: February 18, 2020
    Date of Patent: February 21, 2023
    Assignee: Advanced Silicon Group, Inc.
    Inventors: Marcie R. Black, Edward Van Corbach, William Rever
  • Patent number: 11568805
    Abstract: A display device includes a display panel including a display region and a non-display region surrounding the display region, a plurality of a light-emitting units arranged at the display region; a touch circuit connected to the display panel, and configured to detect touch information when the display panel is touched; a control circuit connected to the touch circuit and the display panel, and configured to control a corresponding light-emitting unit to emit a predetermined light beam in response to the touch information; a photosensing circuit connected to the display panel and the control circuit, and configured to sense the predetermined light beam and convert it into an electric signal; and a data processor connected to the control circuit and the display panel, and configured to process the electric signal acquired by the photosensing circuit through conversion to acquire monitoring data, and display the monitoring data on the display panel.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: January 31, 2023
    Assignees: CHENGDU BOE OPTOELECTRONICS TECHNOLOGY CO., LTD., BOE TECHNOLOGY GROUP CO., LTD.
    Inventors: Yangpeng Wang, Yanyan Zhao, Yuanyuan Chai, Peng Chen, Xucong Wang
  • Patent number: 11557623
    Abstract: An image pickup element includes: a semiconductor substrate including a photoelectric conversion section for each pixel; a pixel separation groove provided in the semiconductor substrate; and a fixed charge film provided on a light-receiving surface side of the semiconductor substrate, wherein the fixed charge film includes a first insulating film and a second insulating film, the first insulating film being provided contiguously from the light-receiving surface to a wall surface and a bottom surface of the pixel separation groove, and the second insulating film being provided on a part of the first insulating film, the part corresponding to at least the light-receiving surface.
    Type: Grant
    Filed: January 11, 2021
    Date of Patent: January 17, 2023
    Assignee: SONY CORPORATION
    Inventors: Shuji Manda, Susumu Hiyama, Yasuyuki Shiga
  • Patent number: 11532788
    Abstract: The present invention relates to a method for laminating solar cell modules comprising a plurality of solar cells electrically connected in series.
    Type: Grant
    Filed: August 20, 2019
    Date of Patent: December 20, 2022
    Assignee: Epishine AB
    Inventors: Thomas Österberg, Jonas Bergqvist
  • Patent number: 11520062
    Abstract: A radiation imaging panel is provided. The panel comprises a substrate on which a plurality of pixels each including a photoelectric conversion element are arranged, a scintillator arranged over the substrate, and a protective layer arranged so as to cover the scintillator. The scintillator includes a plurality of columnar crystals containing an alkali metal halide. The protective layer includes a resin layer containing a resin to which particles of a metal oxide are added. A thickness of the resin layer from an apex of each of the plurality of columnar crystals to an upper surface of the resin layer is not less than 10 ?m and less than 30 ?m, and a concentration of the particles in the resin layer is not less than 0.15 vol % and less than 7.5 vol %.
    Type: Grant
    Filed: July 2, 2021
    Date of Patent: December 6, 2022
    Assignee: CANON KABUSHIKI KAISHA
    Inventors: Shoshiro Saruta, Kazumi Nagano, Keiichi Nomura
  • Patent number: 11513240
    Abstract: A radiation detection module according to an embodiment includes: an array substrate including multiple photoelectric converters; a scintillator provided on the multiple photoelectric converters; a sealing part that has a frame shape, is provided around the scintillator, is bonded to the array substrate and the scintillator, and includes a thermoplastic resin as a major component; and a moisture-resistant part covering the scintillator from above, in which a peripheral edge vicinity is bonded to an outer surface of the sealing part. The shape of the outer surface of the sealing part is a curved surface protruding outward.
    Type: Grant
    Filed: April 2, 2021
    Date of Patent: November 29, 2022
    Assignee: CANON ELECTRON TUBES & DEVICES CO., LTD.
    Inventors: Hiroshi Aida, Hiroshi Horiuchi, Masaya Nagai
  • Patent number: 11515440
    Abstract: A thin-film solar module with a substrate and a layer structure applied thereon comprising a rear electrode layer, a front electrode layer, and an absorber layer arranged between the back electrode layer and the front electrode layer. Serially connected solar cells are formed in the layer region by patterning zones, having a rear electrode layer section. The layer region has at least one linear decoating region. The decoating region has an alternating sequence of optically transparent zones and electrode zones. The optically transparent zones are rear-electrode-layer-free and the electrode zones are absorber-layer-free and have a rear electrode layer section. The rear-electrode-layer-sections of at least one pair made up of one solar cell of one solar cell string and one solar cell of the other solar cell string are areally connected to one another by the rear-electrode-layer-section of at least one electrode zone.
    Type: Grant
    Filed: September 26, 2018
    Date of Patent: November 29, 2022
    Assignee: CNBM RESEARCH INSTITUTE FOR ADVANCED GLASS MATERIALS GROUP CO., LTD.
    Inventors: Andreas Heiss, Joerg Palm, Helmut Vogt
  • Patent number: 11515439
    Abstract: A photovoltaic device includes: a semiconductor substrate stretching in a first direction and a second direction that intersects the first direction; and a first amorphous semiconductor film and a second amorphous semiconductor film both provided on the semiconductor substrate. The second amorphous semiconductor film has a differ conductivity type from the first amorphous semiconductor film. The first amorphous semiconductor film and the second amorphous semiconductor film are divided into a plurality of sections in the first direction and the second direction.
    Type: Grant
    Filed: December 11, 2020
    Date of Patent: November 29, 2022
    Assignee: SHARP KABUSHIKI KAISHA
    Inventors: Teruaki Higo, Chikao Okamoto, Naoki Asano, Masamichi Kobayashi, Natsuko Fujiwara, Rihito Suganuma, Toshihiko Sakai, Kazuya Tsujino, Liumin Zou
  • Patent number: 11476286
    Abstract: A solid-state image pickup device 1 according to the present invention includes a semiconductor substrate 2 on which a pixel 20 composed of a photodiode 3 and a transistor is formed. The transistor comprising the pixel 20 is formed on the surface of the semiconductor substrate, a pn junction portion formed between high concentration regions of the photodiode 3 is provided within the semiconductor substrate 2 and a part of the pn junction portion of the photodiode 3 is extended to a lower portion of the transistor formed on the surface of the semiconductor substrate 2. According to the present invention, there is provided a solid-state image pickup device in which a pixel size can be microminiaturized without lowering a saturated electric charge amount (Qs) and sensitivity.
    Type: Grant
    Filed: October 9, 2020
    Date of Patent: October 18, 2022
    Assignee: Sony Group Corporation
    Inventors: Takayuki Ezaki, Teruo Hirayama
  • Patent number: 11437529
    Abstract: A photovoltaic cell is provided, which includes a substrate; a first passivation layer and a first anti-reflection layer disposed on a front surface of the substrate; and a second passivation layer, a PPW layer and at least one silicon nitride layer SiuNv (1<u/v<4) disposed on a rear surface of the substrate. The at least one silicon nitride layer has a refractive index and a thickness in respective ranges of 1.9 to 2.5 and 50 nm to 100 nm. The second passivation layer includes at least one aluminum oxide layer AlxOy (0.8<y/x<1.6), a refractive index and a thickness of which are respectively in ranges of 1.4 to 1.6 and 4 nm to 20 nm. The PPW layer includes at least one silicon oxynitride layer SirOsNt (r>s>t), a refractive index and a thickness of which are respectively in ranges of 1.5 to 1.8 and 1 nm to 30 nm.
    Type: Grant
    Filed: July 27, 2021
    Date of Patent: September 6, 2022
    Assignees: ZHEJIANG JINKO SOLAR CO., LTD., JINKO SOLAR CO., LTD.
    Inventors: Ruifeng Li, Yankai Qiu, Ning Zhang, Bin Li
  • Patent number: 11415820
    Abstract: An optical phase-shifting device includes a ribbed waveguide portion on an insulating layer, the waveguide portion having a p-n or p-i-n junction extending in a longitudinal direction and having a height. A pair of slab portions are disposed adjacent the waveguide portion, one on each side of the ribbed waveguide portion and on the insulation layer. The slab portion have higher doping concentrations than the respective doping concentrations in the ribbed waveguide portion. At least a portion of each slab portion has a height increasing with distance from the waveguide portion, with the slab height being smaller than that of the waveguide portion at the junction between the waveguide portion and slab portion. A pair of contact portions are formed adjacent the respective slab portion and further away from the waveguide portion. A portion of each contact portion can also have a height varying with distance from the waveguide portion.
    Type: Grant
    Filed: May 4, 2020
    Date of Patent: August 16, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventor: Chan-Hong Chern
  • Patent number: 11398515
    Abstract: The present technology relates to a solid-state imaging element configured so that pixels can be more reliably separated, a method for manufacturing the solid-state imaging element, and an electronic apparatus. The solid-state imaging element includes a photoelectric converter, a first separator, and a second separator. The photoelectric converter is configured to perform photoelectric conversion of incident light. The first separator configured to separate the photoelectric converter is formed in a first trench formed from a first surface side. The second separator configured to separate the photoelectric converter is formed in a second trench formed from a second surface side facing a first surface. The present technology is applicable to an individual imaging element mounted on, e.g., a camera and configured to acquire an image of an object.
    Type: Grant
    Filed: May 18, 2020
    Date of Patent: July 26, 2022
    Assignee: SONY CORPORATION
    Inventors: Hideyuki Honda, Tetsuya Uchida, Toshifumi Wakano, Yusuke Tanaka, Yoshiharu Kudoh, Hirotoshi Nomura, Tomoyuki Hirano, Shinichi Yoshida, Yoichi Ueda, Kosuke Nakanishi