Having Reflective Or Antireflective Component Patents (Class 438/72)
  • Patent number: 11621365
    Abstract: Disclosed herein are compositions, methods and devices that allow for water-soluble epitaxial lift-off of III-V. Epitaxial growth of STO/SAO templates on STO (001) and Ge (001) substrates were demonstrated. Partially epitaxial GaAs growth was achieved on STO/SAO/STO substrate templates.
    Type: Grant
    Filed: June 17, 2020
    Date of Patent: April 4, 2023
    Assignee: Alliance for Sustainable Energy, LLC
    Inventor: Andrew Gordon Norman
  • Patent number: 11588071
    Abstract: The present disclosure provides a method for rapidly treating a heterojunction solar cell fabricated using a crystalline silicon wafer doped exclusively with n-type dopants to improve surface passivation and carrier transport properties using the following steps: providing a heterojunction solar cell; the solar cell having an n-type silicon substrate exclusively doped with n-type dopants with a concentration higher than 1×1014 cm?3 and a plurality of metallic contacts; illuminating a surface portion of the solar cell for a period of less than 5 minutes and at a temperature between 200° C. and 300° C. with light having an intensity of at least 2 kW/m2 and a wavelength such that the light is absorbed by the surface portion and generates electron-hole pairs in the solar cell. The step of illuminating a surface portion of the solar cell is such that less than 0.5 kWh/m2 of energy is transferred to the surface portion and a temperature of the surface portion increases at a rate of at least 10° C.
    Type: Grant
    Filed: October 24, 2019
    Date of Patent: February 21, 2023
    Assignee: NewSouth Innovations Pty Limited
    Inventors: Brett Hallam, Matthew Wright, Moonyong Kim, Daniel Chen
  • Patent number: 11538945
    Abstract: A bifacial solar cell includes a silicon substrate; an emitter layer; a plurality of first electrodes locally on the emitter layer; a first aluminum oxide layer on the emitter layer; a first silicon oxide layer between the first aluminum oxide layer and the emitter layer; a first anti-reflection layer on the first aluminum oxide layer; a back surface field layer on the silicon substrate; a second aluminum oxide layer on the silicon substrate; a second silicon oxide layer between the second aluminum oxide layer and the silicon substrate; a second anti-reflection layer on the second aluminum oxide layer; and a plurality of second electrodes respectively on the back surface field layers through the second anti-reflection layer, the second aluminum oxide layer and the second silicon oxide layer.
    Type: Grant
    Filed: September 4, 2019
    Date of Patent: December 27, 2022
    Assignee: Shangrao Jinko solar Technology Development Co., LTD
    Inventors: Changseo Park, Yoonsil Jin, Youngho Choe
  • Patent number: 11515197
    Abstract: A semiconductor device includes: a substrate; an ion-implanted silicon layer disposed in the substrate; a first insulator layer disposed over the ion-implanted silicon layer; an active device disposed over the first insulator layer; and a conductive via configured to penetrate the first insulator layer for coupling the ion-implanted silicon layer and the active device.
    Type: Grant
    Filed: July 11, 2019
    Date of Patent: November 29, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Shih-Wei Peng, Wei-Cheng Lin, Jiann-Tyng Tzeng
  • Patent number: 11460688
    Abstract: A mirror device includes a frame body, a shaft member provided inside the frame body and connected to the frame body, and a reflection member fixed to the shaft member and provided so as to be capable of swinging around an axis of the shaft member. The reflection member has a base portion provided along an axial direction of the shaft member and a reflection portion provided on the base portion. The base portion has a three-dimensional uneven structure including a bottom wall portion having a main surface provided along the axial direction of the shaft member and a plurality of side wall portions extending from the bottom wall portion opposite to the reflection portion.
    Type: Grant
    Filed: August 23, 2019
    Date of Patent: October 4, 2022
    Assignee: TOHOKU UNIVERSITY
    Inventors: Takashi Sasaki, Kazuhiro Hane
  • Patent number: 11414763
    Abstract: The present disclosure provides a method of manufacturing a gas sensor. The method includes the following operations: a substrate is received; a conductor layer is formed over the substrate; the conductor layer is patterned to form a conductor with a plurality of openings by an etching operation, the openings being arranged in a repeating pattern, a minimal dimension of the opening being about 4 micrometers; and a gas-sensing film is formed over the conductor.
    Type: Grant
    Filed: December 6, 2019
    Date of Patent: August 16, 2022
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Ming-Ta Lei, Chia-Hua Chu, Hsin-Chih Chiang, Tung-Tsun Chen, Chun-Wen Cheng
  • Patent number: 11374145
    Abstract: Methods of fabricating solar cells using UV-curing of light-receiving surfaces of the solar cells, and the resulting solar cells, are described herein. In an example, a method of fabricating a solar cell includes forming a passivating dielectric layer on a light-receiving surface of a silicon substrate. The method also includes forming an anti-reflective coating (ARC) layer below the passivating dielectric layer. The method also includes exposing the ARC layer to ultra-violet (UV) radiation. The method also includes, subsequent to exposing the ARC layer to ultra-violet (UV) radiation, thermally annealing the ARC layer.
    Type: Grant
    Filed: December 5, 2019
    Date of Patent: June 28, 2022
    Assignees: SunPower Corporation, Total Marketing Services
    Inventors: Yu-Chen Shen, Périne Jaffrennou, Gilles Olav Tanguy Sylvain Poulain, Michael C. Johnson, Seung Bum Rim
  • Patent number: 11223805
    Abstract: A light projection system including a light source, a light controller optically and/or electrically coupled to the light source to generate a plurality of spatially-separated and independently-modulatable beams of light, and an angular light modulator (ALM) positioned to receive the beams of light and selectively direct the light from each beam into one of a plurality of directions. The light source can include a laser diode array. The light controller can be a spatial light modulator or a processor programmed to control an output of each of the lasers of the laser diode array. The angular light modulator may be a digital micromirror device (DMD). The ALM may be configured to project the images into corresponding diffraction orders of the ALM or the ALM may be configured to continuously scan the images.
    Type: Grant
    Filed: April 13, 2018
    Date of Patent: January 11, 2022
    Assignee: Arizona Board of Regents on Behalf of the University of Arizona
    Inventors: Yuzuru Takashima, Brandon Hellman, Braden Smith
  • Patent number: 11047018
    Abstract: The invention relates to a steel strip for producing a non-oriented electrical steel. To achieve greatly improved frequency-independent magnetic properties, in particular greatly reduced hysteresis losses, in comparison with known electrical steels, the following alloy composition in wt % is proposed: C: ?0.03, Al: 1 to 12, Si: 0.3 to 3.5, Mn: >0.25 to 10, Cu: >0.05 to 3.0, Ni: >0.01 to 5.0, total of N, S and P: at most 0.07, remainder iron and smelting-related impurities, with the optional addition of one or more elements from the group Cr, Mo, Zn and Sn, wherein the steel strip has an insulation layer substantially consisting of Al2O3 and/or SiO2 with a thickness in the range from 10 ?m to 100 ?m. The invention also relates to a method for producing such a steel strip.
    Type: Grant
    Filed: July 13, 2017
    Date of Patent: June 29, 2021
    Assignee: SALZGITTER FLACHSTAHL GMBH
    Inventors: Zacharias Georgeou, Frank Klose
  • Patent number: 10985204
    Abstract: Oxide-free, low temperature wafer bonding permits electric current to cross the covalently bonded interface unimpeded by traps, recombination centers and unintentional, defect-induced blocking barriers when interfacial defects are passivated by hydrogen diffused from shallow implants towards the interface. Systems and methods comprising oxide-free, low temperature covalent wafer bonding with passivated interface states are used in various applications requiring reduced interfacial scattering and carrier trapping and efficient charge collection across bonded interfaces.
    Type: Grant
    Filed: February 16, 2017
    Date of Patent: April 20, 2021
    Assignee: G-ray Switzerland SA
    Inventor: Hans Von Känel
  • Patent number: 10971541
    Abstract: Some embodiments include a method, comprising: attaching a carrier substrate to a side of at least one semiconductor substrate, the at least one semiconductor substrate including photodetectors on the side; thinning the at least one semiconductor substrate while the at least one semiconductor substrate is attached to the carrier substrate; attaching an optical substrate to the at least one semiconductor substrate while the at least one semiconductor substrate is attached to the carrier substrate; and removing the carrier substrate from the at least one semiconductor substrate.
    Type: Grant
    Filed: December 21, 2017
    Date of Patent: April 6, 2021
    Assignee: Varex Imaging Corporation
    Inventors: Rick E. Colbeth, Ivan P. Mollov
  • Patent number: 10840395
    Abstract: Methods of fabricating solar cells, and the resulting solar cells, are described herein. In an example, a method of fabricating a solar cell includes forming a thin dielectric layer on a surface of a substrate by radical oxidation or plasma oxidation of the surface of the substrate. The method also involves forming a silicon layer over the thin dielectric layer. The method also involves forming a plurality of emitter regions from the silicon layer.
    Type: Grant
    Filed: June 7, 2018
    Date of Patent: November 17, 2020
    Assignee: SunPower Corporation
    Inventors: Michael C. Johnson, Taiqing Qiu, David D. Smith, Peter John Cousins, Staffan Westerberg
  • Patent number: 10796998
    Abstract: Embedded packaging for high voltage, high temperature operation of power semiconductor devices is disclosed, wherein a semiconductor die is embedded in a dielectric body comprising a dielectric polymer composition characterized by a conductivity transition temperature Tc, a first activation energy EaLow for conduction in a temperature range below Tc, and a second activation energy EaHigh for conduction in a temperature range above Tc. A test methodology is disclosed for selecting a dielectric epoxy composition having values of Tc, EaLow and EaHigh that provide a conduction value below a required reliability threshold, e.g. ?5×10?13 S/cm, for a specified operating voltage and temperature. For example, the power semiconductor device comprises a GaN HEMT for operation at >100V wherein the package body is formed from a laminated dielectric epoxy composition for operation at >150 C, wherein Tc is ?75 C, EaLow is ?0.
    Type: Grant
    Filed: April 10, 2019
    Date of Patent: October 6, 2020
    Assignee: GaN Systems Inc.
    Inventor: Thomas Macelwee
  • Patent number: 10680122
    Abstract: A solar cell and a method for manufacturing the same are disclosed. The solar cell includes a substrate, an emitter layer at a front surface of the substrate, a first anti-reflection layer on the emitter layer, a back surface field layer at a back surface of the substrate, and a second anti-reflection layer on the back surface field layer. The first anti-reflection layer and the second anti-reflection layer overlap may each other.
    Type: Grant
    Filed: January 10, 2011
    Date of Patent: June 9, 2020
    Assignee: LG Electronics Inc.
    Inventors: Philwon Yoon, Changseo Park, Yoonsil Jin, Jinsung Kim, Goohwan Shim, Youngho Choe, Jaewon Chang
  • Patent number: 10593818
    Abstract: A multijunction solar cell includes a base substrate comprising a Group IV semiconductor and a dopant of a first carrier type. A patterned emitter is formed at a first surface of the base substrate. The patterned emitter comprises a plurality of well regions doped with a dopant of a second carrier type in the Group IV semiconductor. The base substrate including the patterned emitter form a first solar subcell. The multijunction solar cell further comprises an upper structure comprising one or more additional solar subcells over the first solar subcell. Methods of making a multijunction solar cell are also described.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: March 17, 2020
    Assignee: THE BOEING COMPANY
    Inventors: Christopher M. Fetzer, Peter Hebert
  • Patent number: 10343945
    Abstract: In a process for obtaining a transparent substrate including a refractive index modulation pattern, a transparent substrate is irradiated with a laser radiation focused on the substrate in the form of at least one laser line, where the substrate at least partially absorbs the laser radiation, a relative movement is generated between the substrate and the laser line focused on the substrate, in a direction (X) transverse to the longitudinal direction (Y) of the laser line, and, in the course of this relative movement, the power of the laser line is temporally modulated as a function of the speed of the relative movement and as a function of the dimensions of the pattern in the direction (X) of the relative movement.
    Type: Grant
    Filed: May 21, 2014
    Date of Patent: July 9, 2019
    Assignee: SAINT-GOBAIN GLASS FRANCE
    Inventors: Emmanuel Mimoun, Brice Dubost
  • Patent number: 10297752
    Abstract: A rectifier is provided for converting an oscillating electromagnetic field into a direct current and comprises an electrically conductive antenna layer configured to absorb electromagnetic radiation, an electrically conductive mirror layer configured to provide an electromagnetic mirror charge of the antenna layer, an electrically insulating tunnel barrier layer positioned between the antenna layer and the mirror layer, and an electronic circuit electrically connected between the conductive mirror layer and the conductive antenna layer. The rectifier employs a metamaterial configuration for room temperature rectification of radiation in regions of the electromagnetic spectrum comprising the MWIR and LWIR regions. Methods for use of the rectifier in rectifying and detecting radiation are described.
    Type: Grant
    Filed: August 5, 2017
    Date of Patent: May 21, 2019
    Assignee: NANOHMICS, INC.
    Inventors: Chris W. Mann, Kyle W. Hoover, Gennady Shvets
  • Patent number: 10176982
    Abstract: The present invention proposes a method to form a gradient thin film using a spray pyrolysis technique. The method comprises providing a base substrate, preparing a spray aqueous solution by mixing at least two precursor compounds comprising at least two different elements and spraying the spray aqueous solution onto the base substrate. According to the present invention, the ratio of the concentration of the at least two different elements within the spray aqueous solution is varied while performing the method. In this way, a thin film having a gradient of elemental composition over its layer thickness may be formed.
    Type: Grant
    Filed: December 15, 2015
    Date of Patent: January 8, 2019
    Assignees: CHINA TRIUMPH INTERNATIONAL ENGINEERING CO., LTD., CTF SOLAR GMBH
    Inventors: Velappan Krishnakumar, Harr Michael
  • Patent number: 10090428
    Abstract: A solar cell and a method for manufacturing the same are disclosed. The solar cell may include a substrate, an emitter layer positioned at a first surface of the substrate, a first anti-reflection layer that is positioned on a surface of the emitter layer and may include a plurality of first contact lines exposing a portion of the emitter layer, a first electrode that is electrically connected to the emitter layer exposed through the plurality of first contact lines and may include a plating layer directly contacting the emitter layer, and a second electrode positioned on a second surface of the substrate.
    Type: Grant
    Filed: January 2, 2014
    Date of Patent: October 2, 2018
    Assignee: LG ELECTRONICS INC.
    Inventors: Goohwan Shim, Changseo Park, Philwon Yoon, Yoonsil Jin, Jinsung Kim, Youngho Choe, Jaewon Chang
  • Patent number: 10062797
    Abstract: A simple manufacturing method is provided for the fabrication of the IV-VI group of semiconductor films on inexpensive substrates for highly efficient tandem or multi junction solar cells and a variety of other electronic devices such as transistors and LEDs. Specifically, the method includes depositing a textured oxide buffer on a substrate; depositing a metal-inorganic film from a eutectic alloy on the buffer layer, the metal being a component of a IV-VI compound; and forming a layer on the metal-inorganic film on which an additional element from the IV-VI compound is added, forming a IV-VI layer on a semiconductor device. The films comprising tin sulfides—SnS (tin sulphide), SnS2, and SnS3—are grown on inexpensive substrates, such as glass or flexible plastic, at low temperature, allowing for R2R (roll-to-roll) processing.
    Type: Grant
    Filed: July 19, 2016
    Date of Patent: August 28, 2018
    Assignee: Solar-Tectic LLC
    Inventor: Ashok Chaudhari
  • Patent number: 10025191
    Abstract: There is provided a polymer-containing coating liquid which is applied to a resist pattern and which is used in place of a conventional rinsing liquid. A coating liquid that is applied to a resist pattern comprising a polymer having a structural unit of Formula (1): (wherein R1 is a C1-12 organic group, and X is an organic group of Formula (2): (wherein R2 and R3 are each independently a linear or branched alkylene group having a carbon atom number of 1 to 3, R2 is bonded to an oxygen atom in Formula (1), R4 is a C1-4 alkoxy group, an allyloxy group, or a hydroxy group, and p is 0, 1, or 2)), and a solvent containing water and/or alcohols.
    Type: Grant
    Filed: February 3, 2015
    Date of Patent: July 17, 2018
    Assignee: NISSAN CHEMICAL INDUSTRIES, LTD.
    Inventors: Shuhei Shigaki, Yasushi Sakaida, Rikimaru Sakamoto
  • Patent number: 10002892
    Abstract: The present invention relates to a solid-state imaging device. In a pixel array section in the solid-state imaging device, a vertical signal line is provided right under power supply wiring apart from a floating diffusion region in order to reduce load capacitance of the vertical signal line. Furthermore, the power supply wiring is wired to make a cover rate of each vertical signal line with respect to the power supply wiring nearly uniform. As a result, it is possible to suppress variation of load capacitance of the vertical signal line for each pixel. It becomes possible to suppress deviation in a black level, variation of charge transfer, and variation of settling. It becomes possible to obtain an image with higher quality.
    Type: Grant
    Filed: September 27, 2016
    Date of Patent: June 19, 2018
    Assignee: Sony Corporation
    Inventors: Yusuke Uesaka, Atsuhiko Yamamoto
  • Patent number: 9985119
    Abstract: An integrated image sensor may include adjacent pixels, with each pixel including an active semiconductor region including a photodiode, an antireflection layer disposed above the photodiode, a dielectric region disposed above the antireflection layer, an optical filter disposed above the dielectric region, and a diffraction grating disposed in the antireflection layer. The diffraction grating includes an array of pads.
    Type: Grant
    Filed: April 17, 2017
    Date of Patent: May 29, 2018
    Assignees: STMICROELECTRONICS S.A., STMICROELECTRONICS (Crolles 2) SAS
    Inventors: Axel Crocherie, Michel Marty, Jean-Luc Huguenin, Sébastien Jouan
  • Patent number: 9923116
    Abstract: A method for producing a solar cell is described, in which a plurality of doped regions are to be etched-back selectively or over their entire surface. Once a semiconductor substrate (1) has been provided, various doped regions (3, 5) are formed in partial regions of a surface of the semiconductor substrate, the various doped regions (3, 5) differing as regards their doping concentration and/or their doping polarity. The various doped regions (3, 5) are then purposively etched-back in order to achieve desired doping profiles, and finally electrical contacts (21) are formed at least at some of the doped regions (3, 5). The etching-back of the various doped regions takes place in a common etching operation in an etching medium.
    Type: Grant
    Filed: March 11, 2015
    Date of Patent: March 20, 2018
    Assignee: UNIVERSITÄT KONSTANZ
    Inventors: Josh Engelhardt, Alexander Frey, Yvonne Schiele, Barbara Terheiden
  • Patent number: 9773668
    Abstract: Provided is a method of forming a transition metal chalcogenide thin-film and the method includes preparing a first substrate having formed thereon a transition metal-containing precursor thin-film; displacing a second substrate separately with a constant distance from the first substrate by using a bridge unit while the second substrate is facing the first substrate, thereby securing a gas flowing path between the first substrate and the second substrate; heating the first and second substrates to a reaction temperature; and introducing a chalcogen-containing gas from an end of a reactor, such that the chalcogen-containing gas flows via the path.
    Type: Grant
    Filed: July 8, 2016
    Date of Patent: September 26, 2017
    Assignee: UNIVERSITY-INDUSTRY FOUNDATION (UIF), YONSEI UNIVERSITY
    Inventors: Gwan Hyoung Lee, So Jung Kang, Seung Min Lee, Yong Soo Cho
  • Patent number: 9548404
    Abstract: Provided is a method for fabricating anti-reflection film with anti-PID effect. The method comprises: vacuuming a furnace tube, holding the temperature in the furnace at 420° C. and the pressure as 80 mTorr for 4 minutes; pretreating silicon wafers at 420° C. with a nitrous oxide flux of 3.8-4.4 slm and pressure of 1700 mTorr for 3 minutes; testing pressure to keep a inner pressure of the furnace tube as a constant value of 50 mTorr for 0.2-0.5 minute; pre-depositing at 420° C., with a ammonia gas flux of 0.1-0.5 slm, a silane flux of 180 sccm-200 sccm, a nitrous oxide flux of 3.5-4.1 slm, pressure of 1000 mTorr and radio frequency power of 4300 w for 0.3-0.5 minute; depositing a film at 450° C., with a ammonia gas flux of 2000-2200 sccm, a silane flux of 7000-7500 sccm, a nitrous oxide flux of 2-2.4 slm, pressure of 1700 mTorr and radio frequency power of 4300 w for 3 minutes; blowing and cooling the film at 420° C. with a nitrogen gas flux of 6-10 slm, pressure of 10000 mTorr for 5-8 minutes.
    Type: Grant
    Filed: June 20, 2013
    Date of Patent: January 17, 2017
    Assignee: DONGFANG ELECTRIC (YIXING) MAGI SOLAR POWER TECHNOLOGY CO., LTD
    Inventors: Lun Huang, Chunhui Lu, Junqing Wu, Zerong Hou, Jinwei Wang
  • Patent number: 9502486
    Abstract: An organic light-emitting diode (OLED) display having thin film transistors (TFTs) is disclosed. In one aspect, TFTs of the OLED display include a substrate and a first semiconductor layer formed over the substrate and including first channel, source, and drain regions and a lightly doped region between the first channel region and the first source and drain regions. The OLED display also includes a second semiconductor layer formed over the substrate and including second channel, source, and drain regions. The OLED display further includes first and second gate electrodes formed over the first semiconductor layer and a third gate electrode formed over the second semiconductor layer. The width of the second gate electrode is less than that of the first gate electrode and the lightly doped region overlaps a portion of the first gate electrode and does not overlap the second gate electrode.
    Type: Grant
    Filed: February 11, 2016
    Date of Patent: November 22, 2016
    Assignee: Samsung Display Co., Ltd.
    Inventors: Wang Woo Lee, Moo Soon Ko, Min Woo Woo, Il Jeong Lee, Jeong Ho Lee
  • Patent number: 9472711
    Abstract: A back contact heterojunction photoelectric conversion device, that obtain junctions that are nearly ohmic contacts by integrally forming a transparent conductive film including an electrode directly on a p-type amorphous silicon film and a transparent conductive oxide directly on an n-type amorphous silicon film. A method of manufacturing the device includes: integrally forming an oxide electrode layer on the n-type amorphous silicon film and the p-type amorphous silicon film; and applying plasma, under a condition that a mask is disposed on the transparent conductive film covering either the n-type amorphous silicon film or the p-type amorphous silicon film, to exposed portions of transparent conductive film.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: October 18, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Tsutomu Matsuura, Hiroya Yamarin, Hidetada Tokioka
  • Patent number: 9455294
    Abstract: An image sensor includes a substrate having a front side and a back side, an insulating structure containing circuits on the front side of the substrate, contact holes extending through the substrate to the circuits, respectively, and a plurality of pads disposed on the backside of the substrate, electrically connected to the circuits along conductive paths extending through the contact holes, and located directly over the circuits, respectively. The image sensor is fabricated by a process in which a conductive layer is formed on the back side of the substrate and patterned to form the pads directly over the circuits.
    Type: Grant
    Filed: December 8, 2014
    Date of Patent: September 27, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Ho Kim, Young-Hoon Park
  • Patent number: 9388114
    Abstract: Compositions comprising an alkyl 3-hydroxybutyrate and one or more additional components are provided. The compositions of the present invention may include at least one alkyl 3-hydroxybutyrate having at least 3 and not more than 5 carbon atoms, along with one or more additional components including, for example, alkyl butyrates, alkyl acetates, alkyl alcohols, and dimers and/or trimers of the alkyl 3-hydroxybutyrate. Such compositions may be products of, for example, the hydrogenation of an acetoacetate-containing composition.
    Type: Grant
    Filed: August 2, 2013
    Date of Patent: July 12, 2016
    Assignee: Eastman Chemical Company
    Inventors: Garry Kenneth Weakley, Charles Everette Kelly, Therese T. Golob
  • Patent number: 9305966
    Abstract: BSI image sensors and methods. In an embodiment, a substrate is provided having a sensor array and a periphery region and having a front side and a back side surface; a bottom anti-reflective coating (BARC) is formed over the back side to a first thickness, over the sensor array region and the periphery region; forming a first dielectric layer over the BARC; a metal shield is formed; selectively removing the metal shield from over the sensor array region; selectively removing the first dielectric layer from over the sensor array region, wherein a portion of the first thickness of the BARC is also removed and a remainder of the first thickness of the BARC remains during the process of selectively removing the first dielectric layer; forming a second dielectric layer over the remainder of the BARC and over the metal shield; and forming a passivation layer over the second dielectric layer.
    Type: Grant
    Filed: January 29, 2015
    Date of Patent: April 5, 2016
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Chieh Chuang, Dun-Nian Yaung, Jen-Cheng Liu, Wen-De Wang, Keng-Yu Chou, Shuang-Ji Tsai, Min-Feng Kao
  • Patent number: 9246024
    Abstract: A photovoltaic device is provided that includes a semiconductor substrate including a p-n junction with a p-type semiconductor portion and an n-type semiconductor portion one on top of the other. A plurality of patterned antireflective coating layers is located on a p-type semiconductor surface of the semiconductor substrate, wherein at least one portion of the p-type semiconductor surface of the semiconductor substrate is exposed. Aluminum is located directly on the at least one portion of the p-type semiconductor surface of the semiconductor substrate that is exposed.
    Type: Grant
    Filed: July 14, 2011
    Date of Patent: January 26, 2016
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Kathryn C. Fisher, Qiang Huang, Satyavolu S. Papa Rao, Ming-Ling Yeh
  • Patent number: 9209342
    Abstract: Processes for making light to current converter devices are provided. The processes can be used to make light to current converter devices having P-N junctions located on only the top surface of the cell, located on the top surface and symmetrically or asymmetrically along a portion of the inner surface of the via holes, located on the top surface and full inner surface of the via holes, or located on the top surface, full inner surface of the via holes, and a portion of the bottom surface of the cell. The processes may isolate the desired P-N junction by etching the emitter, forming a via hole after forming the emitter, using a barrier layer to protect portions of the emitter from etching, or using a barrier layer to prevent the emitter from being formed on portions of the substrate.
    Type: Grant
    Filed: October 17, 2014
    Date of Patent: December 8, 2015
    Assignee: CSI CELLS CO., LTD
    Inventors: Lingjun Zhang, Feng Zhang, Jian Wu, Xusheng Wang
  • Patent number: 9178086
    Abstract: A method for fabricating back-contact type solar cells is provided. The method comprises forming a plurality of n-type doped zones, a plurality of p-type doped zones, and a back anti-reflection layer on a back surface of a semiconductor substrate. The lead-containing conductive paste may pass through the back anti-reflection layer and connect to the n-type doped zones and the p-type doped zones thereby being regarded as n-type electrodes and p-type electrodes.
    Type: Grant
    Filed: September 5, 2014
    Date of Patent: November 3, 2015
    Assignee: AU OPTRONICS CORPORATION
    Inventors: Yen-Cheng Hu, Jen-Chieh Chen, Zhen-Cheng Wu
  • Patent number: 9136406
    Abstract: A solar cell structure using either a dye-sensitized or organic absorber is provided with a diffraction grating on at least one side to enhance the travel of first order diffraction components through the photo sensitive material. A two-sided cell uses diffraction gratings both top and bottom wherein the periodic diffraction elements of one grating are shifted by one-quarter of the grating period relative to the other.
    Type: Grant
    Filed: July 7, 2010
    Date of Patent: September 15, 2015
    Assignee: Toyota Motor Engineering & Manufacturing North America, Inc.
    Inventors: Hideo Iizuka, Yasuhiko Takeda, Hisayoshi Fujikawa
  • Patent number: 9111659
    Abstract: Electrodes of a solar cell formed by an active solder and a method therefor are provided. The method includes steps of: providing a solar cell substrate; providing an active solder having at least one type of soldering alloy mixed with 6 wt % or less of at least one type of active component and 0.01-2.0 wt % of at least one type of rare earth element (Re); firstly melting the active solder at a temperature lower than 450° C.; then applying the molten active solder on the solar cell substrate (or firstly applying and then melting); and cooling to solidify the active solder, so as to form an electrode pattern.
    Type: Grant
    Filed: June 29, 2012
    Date of Patent: August 18, 2015
    Assignee: NATIONAL PINGTUNG UNIVERSITY OF SCIENCE & TECHNOLOGY
    Inventor: Lung-chuan Tsao
  • Patent number: 9105551
    Abstract: A method for making an imager device including the implementation of the steps of: making, through a layer of electric insulating material within which are made one or more pixels each including an antenna able to pick up an electromagnetic wave received at said pixel, of an aperture forming an access to a layer of sacrificial material provided between the layer of electric insulating material and a reflective layer able to reflect said electromagnetic wave; removing part of the layer of sacrificial material through the aperture, forming between the reflective layer and the layer of electric insulating material at least one optical cavity.
    Type: Grant
    Filed: February 12, 2014
    Date of Patent: August 11, 2015
    Assignee: Commissariat à l'énergie atomique et aux énergies alternatives
    Inventor: Cecilia Dupre
  • Patent number: 9105546
    Abstract: An imaging system may include an image sensor having backside illuminated near infrared image sensor pixels. Each pixel may be formed in a graded epitaxial substrate layer such as a graded n-type epitaxial layer. Each pixel may be separated from an adjacent pixel by an isolation trench formed in the graded epitaxial layer. The isolation trench may be a continuous isolation trench or may be formed from a combined front side isolation trench and backside isolation trench that are separated by a wall structure. A buried front side reflector may be provided that reflects light such as infrared light that has passed through a pixel back into the pixel, thereby effectively doubling the silicon absorption depth of the pixels.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: August 11, 2015
    Assignee: Semiconductor Components Industries, LLC
    Inventors: Sergey Velichko, Gennadiy Agranov
  • Patent number: 9099607
    Abstract: A solar cell is discussed. The solar cell according to an embodiment includes a substrate of a first conductive type, an emitter layer of a second conductive type opposite the first conductive type, which forms a p-n junction along with the substrate, a first anti-reflection layer on the emitter layer, a second anti-reflection layer on the first anti-reflection layer, a first electrode part connected to the emitter layer, and a second electrode part connected to the substrate. The first anti-reflection layer is formed of silicon nitride, and the second anti-reflection layer is formed of silicon oxide.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: August 4, 2015
    Assignee: LG ELECTRONICS INC.
    Inventors: Hyunho Lee, Junyong Ahn, Jiweon Jeong
  • Patent number: 9077880
    Abstract: An image capturing module includes an image sensing unit and an optical auxiliary unit. The image sensing unit includes a carrier substrate, an image sensing chip disposed on the carrier substrate and electrically connected to the carrier substrate, a microlens array substrate disposed on the image sensing chip, and a nonconductive photosensitive film layer disposed on the microlens array substrate for increasing the light absorption capability. The optical auxiliary unit includes a housing frame and a movable lens assembly. The housing frame is disposed on the carrier substrate to cover the image sensing chip, the microlens array substrate and the nonconductive photosensitive film layer, and the movable lens assembly is movably disposed in the housing frame.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: July 7, 2015
    Assignee: LITE-ON TECHNOLOGY CORPORATION
    Inventor: Charles Ian Daduya Ferraris
  • Publication number: 20150145082
    Abstract: A backside-illuminated photodetector structure comprising a first reflecting region, a second reflecting region and a semiconductor region. The semiconductor region is between the first reflecting region and the second reflecting region. The semiconductor region comprises a first doped region and a second doped region.
    Type: Application
    Filed: November 22, 2013
    Publication date: May 28, 2015
    Applicant: Taiwan Semiconductor Manufacturing Company, ltd.
    Inventors: Wan-Yu LEE, Ying-Hao KUO
  • Publication number: 20150144197
    Abstract: A method for manufacturing high efficiency solar cells is disclosed. The method comprises providing a thin dielectric layer and a doped polysilicon layer on the back side of a silicon substrate. Subsequently, a high quality oxide layer and a wide band gap doped semiconductor layer can both be formed on the back and front sides of the silicon substrate. A metallization process to plate metal fingers onto the doped polysilicon layer through contact openings can then be performed. The plated metal fingers can form a first metal gridline. A second metal gridline can be formed by directly plating metal to an emitter region on the back side of the silicon substrate, eliminating the need for contact openings for the second metal gridline. Among the advantages, the method for manufacture provides decreased thermal processes, decreased etching steps, increased efficiency and a simplified procedure for the manufacture of high efficiency solar cells.
    Type: Application
    Filed: February 4, 2015
    Publication date: May 28, 2015
    Inventors: Peter J. Cousins, David D. Smith, Seung Bum Rim
  • Publication number: 20150137300
    Abstract: An infrared sensor device includes a semiconductor substrate, at least one sensor element that is micromechanically formed in the semiconductor substrate, and at least one calibration element, which is micromechanically formed in the semiconductor substrate, for the sensor element. An absorber material is arranged on the semiconductor substrate in the area of the sensor element and the calibration element. One cavern each is formed in the semiconductor substrate substantially below the sensor element and substantially below the calibration element. The sensor element and the calibration element are thermally and electrically isolated from the rest of the semiconductor substrate by the caverns. The infrared sensor device has high sensitivity, calibration functionality for the sensor element, and a high signal-to-noise ratio.
    Type: Application
    Filed: April 19, 2013
    Publication date: May 21, 2015
    Inventors: Ingo Herrmann, Edda Sommer, Christoph Schelling, Christian Rettig, Mirko Hattass
  • Publication number: 20150136210
    Abstract: Solar devices with high resistance to light-induced degradation are described. A wide optical bandgap interface layer positioned between a p-doped semiconductor layer and an intrinsic semiconductor layer is made resistant to light-induced degradation through treatment with a hydrogen-containing plasma. In one embodiment, a p-i-n structure is formed with the interface layer at the p/i interface. Optionally, an additional interface layer treated with a hydrogen-containing plasma is formed between the intrinsic layer and the n-doped layer. Alternatively, a hydrogen-containing plasma is used to treat an upper portion of the intrinsic layer prior to deposition of the n-doped semiconductor layer. The interface layer is also applicable to-multi-junction solar cells with plural p-i-n structures. The p-doped and n-doped layers can optionally include sublayers of different compositions and different morphologies (e.g., microcrystalline or amorphous).
    Type: Application
    Filed: May 10, 2013
    Publication date: May 21, 2015
    Inventors: Xavier Multone, Daniel Borrello, Stefano Benagli, Johannes Meier, Ulrich Kroll, Marian Fecioru-Morariu
  • Publication number: 20150136215
    Abstract: A solar cell device and a method of fabricating the same is described. The solar cell includes a back contact, an absorber over the back contact, and a front contact over the absorber. The back contact includes a back electrode layer and a graphene layer.
    Type: Application
    Filed: November 21, 2013
    Publication date: May 21, 2015
    Applicant: TSMC SOLAR LTD.
    Inventors: Chia-Hung TSAI, Tzu-Huan CHENG
  • Publication number: 20150132883
    Abstract: The present invention belongs to the technical field of optical interconnection and relates to a photo detector, in particular to a photo detector consisting of tunneling field-effect transistors.
    Type: Application
    Filed: January 20, 2015
    Publication date: May 14, 2015
    Applicant: FUDAN UNIVERSITY
    Inventors: Pengfei Wang, Xi Lin, Wei Wang, Xiaoyong Liu, Wei Zhang
  • Publication number: 20150132884
    Abstract: A method of forming an image sensor device where the method includes forming a first dielectric layer on a substrate. The method further includes patterning the first dielectric layer to define an area for a reflective shield, where the area defined for the reflective shield is above a photodiode. Additionally, the method includes forming the reflective shield on the substrate by filling the defined area with a high reflectivity material, and the high reflective material comprises a polymer.
    Type: Application
    Filed: January 22, 2015
    Publication date: May 14, 2015
    Inventors: Yu-Hao SHIH, Szu-Ying CHEN, Hsing-Lung CHEN, Jen-Cheng LIU, Dun-Nian YAUNG, Volume CHIEN
  • Publication number: 20150129026
    Abstract: The present invention relates to an emitter wrap-through solar cell and a method for preparing the same. The solar cell according to the present invention has a structure that may minimize generation of leakage current and minimize energy conversion efficiency measurement error. And, the preparation method of a solar cell according to the present invention may easily confirm the alignment state of the electrode, and thus, provide more improved productivity.
    Type: Application
    Filed: May 14, 2013
    Publication date: May 14, 2015
    Applicant: Hanwha Chemical Corporation
    Inventors: Woo-Won Jung, Jae Eock Cho, Hong Gu Lee, Deoc Hwan Hyun, Yong Hwa Lee
  • Patent number: 9029970
    Abstract: Provided is a semiconductor light receiving device including: a semiconductor substrate; a semiconductor layer laminated on the semiconductor substrate and including an upper surface portion; a reflecting film formed to cover the upper surface portion of the semiconductor layer and including a principal reflecting region and an upper surface; and an upper electrode formed to cover at least one portion of the upper surface of the reflecting film, and including a junction portion extending through the reflecting file to be provided in contact with the upper surface portion of the semiconductor layer, the junction portion of the upper electrode surrounding a portion of a circumference of the principal reflecting region of the reflecting film, the principal reflecting region being connected to a region of the reflecting film located outside the junction portion, in which the semiconductor light receiving device detects light entering from another side of the semiconductor substrate.
    Type: Grant
    Filed: March 23, 2011
    Date of Patent: May 12, 2015
    Assignee: Oclaro Japan, Inc.
    Inventors: Ryu Washino, Yasushi Sakuma, Hiroshi Hamada
  • Patent number: 9029186
    Abstract: A method for forming an electrode of a solar battery on an electrode forming face of a semiconductor substrate, comprises: applying a resin containing a conductor material to be the electrode onto an electrode forming region of the electrode forming face; causing a pattern transfer member, on which a reverse pattern obtained by reversing a pattern of the electrode is formed, to face the electrode forming face, and registering the pattern transfer member on a position in which the electrode is to be formed in the electrode forming face; pressing the pattern transfer member against the electrode forming face to transfer the electrode pattern to the resin containing the conductor material; separating the pattern transfer member from the resin containing the conductor material; and baking the electrode pattern transferred to the resin containing the conductor material to form the electrode on the electrode forming face of the substrate.
    Type: Grant
    Filed: August 6, 2009
    Date of Patent: May 12, 2015
    Assignee: Mitsubishi Electric Coporation
    Inventor: Makoto Doi