With Substrate Handling During Coating (e.g., Immersion, Spinning, Etc.) Patents (Class 438/782)
  • Patent number: 11854795
    Abstract: A method includes performing a plasma activation on a surface of a first package component, removing oxide regions from surfaces of metal pads of the first package component, and performing a pre-bonding to bond the first package component to a second package component.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: December 26, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Xin-Hua Huang, Ping-Yin Liu, Hung-Hua Lin, Hsun-Chung Kuang, Yuan-Chih Hsieh, Lan-Lin Chao, Chia-Shiung Tsai, Xiaomeng Chen
  • Patent number: 11848330
    Abstract: A display device is provided.
    Type: Grant
    Filed: May 15, 2020
    Date of Patent: December 19, 2023
    Assignee: Samsung Display Co., Ltd.
    Inventors: June Hwan Kim, Tae Young Kim, Jong Woo Park, Young Tae Choi, Hyun Cheol Hwang, Ki Ju Im
  • Patent number: 11742430
    Abstract: The invention allows stable fabrication of a TFT circuit board used in a display device and having thereon an oxide semiconductor TFT. A TFT circuit board includes a TFT that includes an oxide semiconductor. The TFT has a gate insulating film formed on part of the oxide semiconductor and a gate electrode formed on the gate insulating film. A portion of the oxide semiconductor that is covered with the gate electrode 104 and a portion of the oxide semiconductor that is not covered with the gate electrode are both covered with a first interlayer insulating film. The first interlayer insulating film is covered with a first film 106, and the first film is covered with a first AlO film.
    Type: Grant
    Filed: June 15, 2021
    Date of Patent: August 29, 2023
    Assignee: Japan Display Inc.
    Inventors: Yohei Yamaguchi, Kazufumi Watabe, Tomoyuki Ariyoshi, Osamu Karikome, Ryohei Takaya
  • Patent number: 11678480
    Abstract: The present application discloses a method for fabricating the semiconductor device with the porous decoupling features. The method includes providing a substrate; integrally forming a first conductive line and a bottom contact on the substrate; integrally forming a first conductive line spacer on a sidewall of the first conductive line and a bottom contact spacer on a sidewall of the bottom contact; and forming a porous insulating layer between the first conductive line spacer and the bottom contact spacer.
    Type: Grant
    Filed: November 30, 2021
    Date of Patent: June 13, 2023
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventor: Tse-Yao Huang
  • Patent number: 11672189
    Abstract: A memory using mixed valence conductive oxides is disclosed. The memory includes a mixed valence conductive oxide that is less conductive in its oxygen deficient state and a mixed electronic ionic conductor that is an electrolyte to oxygen and promotes an electric filed to cause oxygen ionic motion.
    Type: Grant
    Filed: March 8, 2021
    Date of Patent: June 6, 2023
    Assignee: Hefei Reliance Memory Limited
    Inventors: Darrell Rinerson, Christophe J. Chevallier, Wayne Kinney, Roy Lambertson, John E. Sanchez, Jr., Lawrence Schloss, Philip Swab, Edmond Ward
  • Patent number: 11652106
    Abstract: A semiconductor device includes a plurality of semiconductor fins, at least one gate stack, a refill isolation, and an air gap. Each of the semiconductor fins extends in an X direction. Two adjacent ones of the semiconductor fins are spaced apart from each other in a Y direction transverse to the X direction. The at least one gate stack has two stack sections spaced apart from each other in the Y direction. The stack sections are disposed over two adjacent ones of the semiconductor fins, respectively. The refill isolation and the air gap are disposed between the stack sections.
    Type: Grant
    Filed: May 6, 2021
    Date of Patent: May 16, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Pei-Yu Chou, Yi-Ting Fu, Ting-Gang Chen, Tze-Liang Lee
  • Patent number: 11592748
    Abstract: A multi-spray RRC process with dynamic control to improve final yield and further reduce resist cost is disclosed. In one embodiment, a method, includes: dispensing a first layer of solvent on a semiconductor substrate while spinning at a first speed for a first time period; dispensing the solvent on the semiconductor substrate while spinning at a second speed for a second time period so as to transform the first layer to a second layer of the solvent; dispensing the solvent on the semiconductor substrate while spinning at a third speed for a third time period so as to transform the second layer to a third layer of the solvent; dispensing the solvent on the semiconductor substrate while spinning at a fourth speed for a fourth time period so as to transform the third layer to a fourth layer of the solvent; and dispensing a first layer of photoresist on the fourth layer of the solvent while spinning at a fifth speed for a fifth period of time.
    Type: Grant
    Filed: November 14, 2019
    Date of Patent: February 28, 2023
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Ming-Hsuan Chuang, Po-Sheng Lu, Shou-Wen Kuo, Cheng-Yi Huang, Chia-Hung Chu
  • Patent number: 11587888
    Abstract: The present disclosure relates to semiconductor structures and, more particularly, to a moisture seal for photonic devices and methods of manufacture. The structure includes: a first trench in at least one substrate material; a guard ring structure with an opening and which at least partially surrounds the first trench; and a second trench at a dicing edge of the substrate, the second trench being lined on sidewalls with barrier material and spacer material over the barrier material.
    Type: Grant
    Filed: December 13, 2019
    Date of Patent: February 21, 2023
    Assignee: GLOBALFOUNDRIES U.S. INC.
    Inventors: Asli Sahin, Thomas F. Houghton, Jennifer A. Oakley, Jeremy S. Alderman, Karen A. Nummy, Zhuojie Wu
  • Patent number: 11566176
    Abstract: A semiconductor nanocrystal particle including a core including a first semiconductor nanocrystal including zinc (Zn) and sulfur (S), selenium (Se), tellurium (Te), or a combination thereof; and a shell including a second semiconductor nanocrystal disposed on at least a portion of the core, wherein the core includes a dopant of a Group 1A element, a Group 2A element, or a combination thereof, and the semiconductor nanocrystal particle exhibits a maximum peak emission in a wavelength region of about 440 nanometers (nm) to about 470 nm.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: January 31, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jeong Hee Lee, Hyo Sook Jang, Sung Woo Kim, Jin A Kim, Tae Hyung Kim, Yuho Won, Eun Joo Jang, Yong Seok Han
  • Patent number: 11515145
    Abstract: Methods for forming a SiBN film comprising depositing a film on a feature on a substrate. The method comprises in a first cycle, depositing a SiB layer on a substrate in a chamber using a chemical vapor deposition process, the substrate having at least one feature thereon, the at least one feature comprising an upper surface, a bottom surface and sidewalls, the SiB layer formed on the upper surface, the bottom surface and the sidewalls. In a second cycle, the SiB layer is treated with a plasma comprising a nitrogen-containing gas to form a conformal SiBN film.
    Type: Grant
    Filed: September 11, 2020
    Date of Patent: November 29, 2022
    Assignee: Applied Materials, Inc.
    Inventors: Chuanxi Yang, Hang Yu, Deenesh Padhi
  • Patent number: 11387099
    Abstract: A spin coating method includes dispensing a coating material including a nonvolatile film material and a volatile solvent over a substrate, and spin coating the coating material over the substrate by spinning the substrate while applying ultrasound waves to the coating material to reduce a viscosity of the coating material during the spin coating.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: July 12, 2022
    Assignee: SANDISK TECHNOLOGIES LLC
    Inventor: Yutaka Ishiguro
  • Patent number: 11201122
    Abstract: A trench is formed through a plurality of layers that are disposed over a first substrate. A first deposition process is performed to at least partially fill the trench with a first dielectric layer. The first dielectric layer delivers a tensile stress. A second deposition process is performed to form a second dielectric layer over the first dielectric layer. A third deposition process is performed to form a third dielectric layer over the second dielectric layer. The third dielectric layer delivers a first compressive stress.
    Type: Grant
    Filed: February 7, 2019
    Date of Patent: December 14, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chun-Hsu Yen, Yu Chuan Hsu, Chen-Hui Yang
  • Patent number: 11101388
    Abstract: A semiconductor device of an embodiment includes a semiconductor layer having a first plane, a second plane, and a through hole penetrating from the first plane to the second plane; an insulating layer on a side of the second plane of the semiconductor layer; a first conductive layer in the insulating layer; a silicon oxide layer on a side of the first plane and in the through hole; a silicon nitride layer provided on the side of the first plane and in the through hole, the silicon oxide layer being interposed between the silicon nitride layer and the semiconductor layer; and a second conductive layer on the side of the first plane and in the through hole, the silicon oxide layer and the silicon nitride layer being interposed between the second conductive layer and the semiconductor layer, and the second conductive layer electrically connected to the first conductive layer.
    Type: Grant
    Filed: September 16, 2019
    Date of Patent: August 24, 2021
    Assignees: Kabushiki Kaisha Toshiba, Toshiba Electronic Devices & Storage Corporation
    Inventor: Hirofumi Baba
  • Patent number: 11099139
    Abstract: A photolithography method includes dispensing a first liquid onto a first target layer formed over a first wafer through a nozzle at a first distance from the first target layer; capturing an image of the first liquid on the first target layer; patterning the first target layer after capturing the image of the first liquid; comparing the captured image of the first liquid to a first reference image to generate a first comparison result; responsive to the first comparison result, positioning the nozzle and a second wafer such that the nozzle is at a second distance from a second target layer on the second wafer; dispensing a second liquid onto the second target layer formed over the second wafer through the nozzle at the second distance from the second target layer; and patterning the second target layer after dispensing the second liquid.
    Type: Grant
    Filed: June 1, 2020
    Date of Patent: August 24, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Chi-Hung Liao, Wei Chang Cheng
  • Patent number: 10985010
    Abstract: A composition and method for using the composition in the fabrication of an electronic device are disclosed. Compounds, compositions and methods for depositing a high quality silicon nitride or carbon doped silicon nitride.
    Type: Grant
    Filed: August 27, 2019
    Date of Patent: April 20, 2021
    Assignee: Versum Materials US, LLC
    Inventors: Haripin Chandra, Xinjian Lei, Moo-Sung Kim
  • Patent number: 10923351
    Abstract: A coating method of coating a substrate with a chemical includes a solvent supplying step and a chemical supplying step. In the solvent supplying step, a solvent is supplied to the substrate. After the solvent supplying step, the chemical is supplied to the substrate in the chemical supplying step. The solvent supplying step includes a first step. The first step causes the substrate to rotate at a first rotation speed, causes a solvent nozzle to move between a central position above a center portion of the substrate and a peripheral position above a peripheral portion of the substrate, and causes the solvent nozzle to dispense the solvent.
    Type: Grant
    Filed: February 10, 2020
    Date of Patent: February 16, 2021
    Inventors: Shogo Yoshida, Hiroyuki Ogura, Ryuichi Yoshida
  • Patent number: 10854726
    Abstract: Various examples of an integrated circuit with a sidewall spacer and a technique for forming an integrated circuit with such a spacer are disclosed herein. In some examples, the method includes receiving a workpiece that includes a substrate and a gate stack disposed upon the substrate. A spacer is formed on a side surface of the gate stack that includes a spacer layer with a low-k dielectric material. A source/drain region is formed in the substrate; and a source/drain contact is formed coupled to the source/drain region such that the spacer layer of the spacer is disposed between the source/drain contact and the gate stack.
    Type: Grant
    Filed: November 8, 2019
    Date of Patent: December 1, 2020
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.
    Inventors: Yen-Ting Chen, Wei-Yang Lee, Feng-Cheng Yang, Yen-Ming Chen
  • Patent number: 10811288
    Abstract: A system for retaining a spin-coating fluid when forming a thin film includes a rotatable chuck; a substrate on the rotatable chuck, the substrate having an interior area and an outer perimeter edge; and a fluid retention wall on the outer perimeter edge of the substrate, the fluid retention wall being configured to retain a spin-coating fluid deposited on the interior area of the substrate during rotation of the rotatable chuck.
    Type: Grant
    Filed: August 30, 2019
    Date of Patent: October 20, 2020
    Assignee: Carbon, Inc.
    Inventors: Bob E. Feller, James M. Ian Bennett
  • Patent number: 10714331
    Abstract: A method for forming a thermally stable spacer layer is disclosed. The method includes first disposing a substrate in an internal volume of a processing chamber. The substrate has a film formed thereon, the film including silicon, carbon, nitrogen, and hydrogen. Next, high pressure steam is introduced into the processing chamber. The film is exposed to the high pressure steam to convert the film to reacted film, the reacted film including silicon, carbon, oxygen, and hydrogen.
    Type: Grant
    Filed: March 15, 2019
    Date of Patent: July 14, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Mihaela Balseanu, Srinivas D. Nemani, Mei-Yee Shek, Ellie Y. Yieh
  • Patent number: 10579478
    Abstract: Techniques herein make and use a pluggable database archive file (AF). In an embodiment, a source database server of a source container database (SCD) inserts contents into an AF from a source pluggable database (SPD). The contents include data files from the SPD, a listing of the data files, rollback scripts, and a list of patches applied to the SPD. A target database server (TDS) of a target container database (TCD) creates a target pluggable database (TPD) based on the AF. If a patch on the list of patches does not exist in the TCD, the TDS executes the rollback scripts to adjust the TPD. In an embodiment, the TDS receives a request to access a block of a particular data file. The TDS detects, based on the listing of the data files, a position of the block within the AF. The TDS retrieves the block based on the position.
    Type: Grant
    Filed: August 23, 2016
    Date of Patent: March 3, 2020
    Assignee: Oracle International Corporation
    Inventors: Prashanth Shanthaveerappa, Giridhar Ravipati, Margaret Susairaj, Kumar Rajamani
  • Patent number: 10438827
    Abstract: A system for retaining a spin-coating fluid when forming a thin film includes a rotatable chuck; a substrate on the rotatable chuck, the substrate having an interior area and an outer perimeter edge; and a fluid retention wall on the outer perimeter edge of the substrate, the fluid retention wall being configured to retain a spin-coating fluid deposited on the interior area of the substrate during rotation of the rotatable chuck.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: October 8, 2019
    Assignee: Carbon, Inc.
    Inventors: Bob E. Feller, James M. Ian Bennett
  • Patent number: 10424486
    Abstract: A manufacturing process of an elemental chip comprises steps of preparing a substrate held on the holding tape, the substrate including first and second sides opposite each other and the second side thereof being held on the holding tape, and the substrate further including a plurality of element regions and a plurality of segmentation regions defining each of the element regions; spraying a resist solution to form droplets of the resist solution, the resist solution containing a resist constituent and a solvent; forming a resist layer by vaporizing the solvent from the droplets and depositing the resist constituent on the first side of the substrate that is held on the holding tape; patterning the resist layer to expose the first side of the substrate in the segmentation regions; and plasma-etching the first side of the substrate exposed in the segmentation regions thereof.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: September 24, 2019
    Assignee: PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD.
    Inventor: Noriyuki Matsubara
  • Patent number: 10229828
    Abstract: In a method of treating a semiconductor substrate, a plurality of active regions and a plurality of trench isolation regions are formed by selectively etching the semiconductor substrate. The semiconductor substrate is washed by providing deionized water to the semiconductor substrate. A silicon-based solution is provided to the semiconductor substrate by replacing the deionized water disposed on the semiconductor substrate with the silicon-based solution. A silicon oxide material is formed from the silicon-based solution by performing a heat treatment on the silicon-based solution and the semiconductor substrate. The silicon oxide material fills the trench isolation regions.
    Type: Grant
    Filed: May 2, 2017
    Date of Patent: March 12, 2019
    Assignee: SK HYNIX INC.
    Inventors: Yong Soo Choi, Ho Jin Jeong
  • Patent number: 10153252
    Abstract: A wafer to wafer structure includes a first wafer, a second wafer. A first bonding layer and a second bonding layer are disposed between the first wafer and the second wafer. A plurality of first interconnects are disposed within the he first bonding layer. A plurality of second interconnects are disposed within the second bonding layer. An interface is disposed between the first bonding layer and the second bonding layer. At least a through silicon via penetrates the first wafer, the first bonding layer and the interface to enter the second bonding layer. The through silicon via contacts one of the first interconnects and one of the second interconnects.
    Type: Grant
    Filed: September 20, 2016
    Date of Patent: December 11, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventor: Ming-Tse Lin
  • Patent number: 10120285
    Abstract: A developing apparatus including a horizontal substrate holder, a rotating mechanism to rotate the substrate holder, a developer nozzle to supply a developer onto a part of the substrate to form a liquid puddle, a moving mechanism to move the developer nozzle in a radial direction of the rotating substrate, a contact part that moves with the developer nozzle and has a surface opposed to the substrate, which is smaller than the surface of the substrate, and a control unit to output a control signal such that a supply position of the developer on the substrate is moved in the radial direction of the substrate so that the liquid puddle is spread out on a whole surface of the substrate while the contact part is in contact with the liquid puddle.
    Type: Grant
    Filed: December 9, 2016
    Date of Patent: November 6, 2018
    Assignee: Tokyo Electron Limited
    Inventors: Kousuke Yoshihara, Hideharu Kyouda, Koshi Muta, Taro Yamamoto, Yasushi Takiguchi, Masahiro Fukuda
  • Patent number: 10023956
    Abstract: Methods and apparatuses for conditioning chambers using a two-stage process involving a low bias and a high bias stage are provided. Methods also involve clamping a protective electrostatic chuck cover to a pedestal by applying a bias to the electrostatic chuck during the high bias stage while cooling the protective electrostatic chuck cover, such as by flowing helium to the backside of the cover.
    Type: Grant
    Filed: April 9, 2015
    Date of Patent: July 17, 2018
    Assignee: Lam Research Corporation
    Inventors: Lin Cui, Jason Daejin Park
  • Patent number: 9929008
    Abstract: A substrate processing method is provided. In the method, a plurality of substrates is placed on a plurality of substrate holding areas provided in a surface of a turntable at predetermined intervals in a circumferential direction, the turntable being provided in a processing chamber. Next, the turntable on which the plurality of substrates is placed is rotated. Then, a fluid is supplied to the surface of the turntable while rotating the turntable. Here, the fluid is supplied to an area between the plurality of substrate holding areas in response to an operation of changing a flow rate of the fluid.
    Type: Grant
    Filed: October 7, 2015
    Date of Patent: March 27, 2018
    Assignee: Tokyo Electron Limited
    Inventors: Yu Wamura, Fumiaki Hayase, Masahiko Kaminishi, Yu Sasaki, Kosuke Takahashi
  • Patent number: 9818604
    Abstract: Provided is a method of depositing an insulation layer on a trench in a substrate, in which the trench having an aspect ratio of 5:1 or more is formed, including: an insulation layer deposition step of performing an adsorption step of adsorbing silicon to the substrate by injecting a silicon precursor into the inside of a chamber into which the substrate is loaded, a first purge step of removing the unreacted silicon precursor and reaction byproducts from the inside of the chamber, a reaction step of forming the adsorbed silicon as an insulation layer including silicon by supplying a first reaction source to the inside of the chamber, and a second purge step of removing the unreacted first reaction source and reaction byproducts from the inside of the chamber; and a densification step of forming a plasma atmosphere in the inside of the chamber by applying an radio frequency (RF) power and densifying the insulation layer including silicon by using the plasma atmosphere, wherein a frequency of the RF power is i
    Type: Grant
    Filed: June 16, 2015
    Date of Patent: November 14, 2017
    Assignee: EUGENE TECHNOLOGY CO., LTD.
    Inventors: Hai-Won Kim, Chang-Hun Shin, Seok-Yun Kim, Choon-Sik Jeong
  • Patent number: 9793118
    Abstract: Disclosed are a method and an apparatus for applying a liquid onto a substrate. The method for treating a substrate, the method includes: a liquid supplying step of supplying a treatment liquid for forming a liquid film on the substrate while rotating the substrate; and a liquid diffusing step of diffusing the treatment liquid discharged to the substrate by rotating the substrate, after the liquid supplying step. The liquid diffusing step includes: a primary diffusion step of rotating the substrate at a first diffusion speed; and a secondary diffusion step of rotating the substrate at a second diffusion speed, after the primary diffusion step. The second diffusion speed is higher than the first diffusion speed. Accordingly, the treatment liquid can be applied to the substrate again by performing the secondary diffusion step, making it possible to adjust the thickness of a photosensitive film.
    Type: Grant
    Filed: March 23, 2016
    Date of Patent: October 17, 2017
    Assignee: Semes Co., Ltd.
    Inventors: Eun Saem Ahn, Choongki Min, Jung Yul Lee, Min Jung Park
  • Patent number: 9738787
    Abstract: Disclosed is a composition for a silica-based insulation layer including hydrogenated polysilazane or hydrogenated polysiloxzane, wherein a concentration of a cyclic compound having a weight average molecular weight of less than 400 is less than or equal to 1,200 ppm. The composition for a silica-based insulation layer may reduce a thickness distribution during formation of a silica-based insulation layer, and thereby film defects after chemical mechanical polishing (CMP) during a semiconductor manufacturing process may be reduced.
    Type: Grant
    Filed: August 16, 2013
    Date of Patent: August 22, 2017
    Assignee: CHEIL INDUSTRY, INC.
    Inventors: Hui-Chan Yun, Taek-Soo Kwak, Mi-Young Kim, Sang-Hak Lim, Kwen-Woo Han, Go-Un Kim, Bong-Hwan Kim, Sang-Kyun Kim, Yoong-Hee Na, Eun-Su Park, Jin-Hee Bae, Hyun-Ji Song, Han-Song Lee, Seung-Hee Hong
  • Patent number: 9536771
    Abstract: The present disclosure relates to an integrated chip IC having transistors with structures separated by a flowable dielectric material, and a related method of formation. In some embodiments, an integrated chip has a semiconductor substrate and an embedded silicon germanium (SiGe) region extending as a positive relief from a location within the semiconductor substrate to a position above the semiconductor substrate. A first gate structure is located at a position that is separated from the embedded SiGe region by a first gap. A flowable dielectric material is disposed between the gate structure and the embedded SiGe region and a pre-metal dielectric (PMD) layer disposed above the flowable dielectric material. The flowable dielectric material provides for good gap fill capabilities that mitigate void formation during gap fill between the adjacent gate structures.
    Type: Grant
    Filed: April 11, 2013
    Date of Patent: January 3, 2017
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Po-Chang Chen, Po-Hsiung Leu, Ding-I Liu
  • Patent number: 9484393
    Abstract: An array substrate, a manufacturing method thereof and a display device are disclosed. The array substrate comprises a base substrate and a thin-film transistor (TFT) unit, a color filter and a planarization protective layer disposed on the base substrate. The planarization protective layer is electrically connected with a drain electrode of the TFT unit and is conductive. The array substrate has the advantages of simplifying the layer structures of the array substrate, reducing the manufacturing difficulty of the array substrate, and improving the production yield of the array substrate.
    Type: Grant
    Filed: May 26, 2014
    Date of Patent: November 1, 2016
    Assignee: BOE Technology Group Co., Ltd.
    Inventors: Yonglian Qi, Shi Shu, Ming Zhao
  • Patent number: 9278373
    Abstract: In one embodiment, a spin coating apparatus includes a coating liquid feeding module to drop a coating liquid onto a substrate, and a motor to rotate the substrate. The module drops a first drop amount of the coating liquid onto the substrate at a first discharge rate, while the motor rotates the substrate at a first number of rotations. The module drops a second drop amount of the coating liquid onto the substrate at a second discharge rate larger than the first discharge rate, while the motor rotates the substrate at a second number of rotations smaller than the first number of rotations, after the first drop amount of the coating liquid is dropped. The module discharges the coating liquid onto the substrate at a third discharge rate smaller than the second discharge rate, after the coating liquid is discharged onto the substrate at the second discharge rate.
    Type: Grant
    Filed: September 4, 2013
    Date of Patent: March 8, 2016
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Keisuke Nakazawa
  • Patent number: 9269581
    Abstract: A method of producing a solar cell, including: a first coating step in which a pre-wet composition is spin-coated on a surface of a semiconductor substrate; a second coating step in which a diffusing material including a solvent and a diffusing agent containing a first impurity element is spin-coated on the surface where the pre-wet composition has been spin-coated, so as to form a coating film of the diffusing agent; and a first impurity diffusion layer forming step in which the semiconductor substrate having the coating film formed thereon is heated, so as to form a first impurity diffusion layer in which the impurity element contained in the diffusing agent is diffused.
    Type: Grant
    Filed: October 23, 2014
    Date of Patent: February 23, 2016
    Assignee: PVG SOLUTIONS INC.
    Inventors: Seiji Ohishi, Katsuya Tanitsu, Shinji Goda, Takayuki Ogino, Futoshi Kato, Ayumu Imai, Yasuyuki Kano
  • Patent number: 9057639
    Abstract: Spin coating a mixture of graphene oxide platelets, water, and an organic solvent by placing a drop of the mixture on a spinning substrate while blowing a drying gas onto the substrate and allowing the water and the organic solvent on the substrate to evaporate; and repeating the spin coating one or more times to form a graphene oxide film in contact with the substrate. An about 1-100 nm thick film of overlapping platelets of reduced graphene oxide.
    Type: Grant
    Filed: April 25, 2012
    Date of Patent: June 16, 2015
    Assignee: The United States of America, as represented by the Secretary of the Navy
    Inventors: Jeremy T. Robinson, Eric S Snow
  • Patent number: 9028915
    Abstract: A method for forming a photoresist layer on a semiconductor device is disclosed. An exemplary includes providing a wafer. The method further includes spinning the wafer during a first cycle at a first speed, while a pre-wet material is dispensed over the wafer and spinning the wafer during the first cycle at a second speed, while the pre-wet material continues to be dispensed over the wafer. The method further includes spinning the wafer during a second cycle at the first speed, while the pre-wet material continues to be dispensed over the wafer and spinning the wafer during the second cycle at the second speed, while the pre-wet material continues to be dispensed over the wafer. The method further includes spinning the wafer at a third speed, while a photoresist material is dispensed over the wafer including the pre-wet material.
    Type: Grant
    Filed: September 4, 2012
    Date of Patent: May 12, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Wei Chang, Chih-Chien Wang, Wang-Pen Mo, Hung-Chang Hsieh
  • Patent number: 9023693
    Abstract: A multi-mode thin film deposition apparatus including a reaction chamber, a carrying seat, a showerhead, an inert gas supplying source, a first gas inflow system and a second gas inflow system is provided. The carrying seat is disposed in the reaction chamber. The showerhead has a gas mixing room and gas holes disposed at a side of the gas mixing room. The gas mixing room is connected to the reaction chamber through the plurality of gas holes which faces the carrying seat. The first gas inflow system is connected to the reaction chamber and supplies a first process gas during a first thin film deposition process mode. The inert gas supplying source is connected to the gas mixing room for supplying an inert gas. The second gas inflow system is connected to the gas mixing room to supply a second process gas during a second thin film deposition process mode.
    Type: Grant
    Filed: December 23, 2013
    Date of Patent: May 5, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Kung-Liang Lin, Chien-Chih Chen, Fu-Ching Tung, Chih-Yung Chen, Shih-Chin Lin, Kuan-Yu Lin, Chia-Hao Chang, Shieh-Sien Wu
  • Patent number: 8987147
    Abstract: A method of depositing a film on substrates using an apparatus including a turntable mounting substrates, first and second process areas above the upper surface of the turntable provided with gas supplying portions, a separation gas supplying portion between the first and second process areas, and a separation area including depositing a first oxide film by rotating the turntable first turns while supplying a first reaction gas, the oxidation gas from the second gas supplying portion, and the separation gas; rotating at least one turn while supplying the separation gas from the first gas supplying portion and the separation gas supplying portion, and the oxidation gas from the second gas supplying portion; and rotating at least second turns to deposit a second oxide film while supplying a second reaction gas from the first gas supplying portion, the oxidation gas from the second gas supplying portion, and the separation gas.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: March 24, 2015
    Assignee: Tokyo Electron Limited
    Inventors: Hiroaki Ikegawa, Masahiko Kaminishi, Kosuke Takahashi, Masato Koakutsu, Jun Ogawa
  • Publication number: 20150079806
    Abstract: A method includes rotating a wafer at a first speed for a first time duration. The wafer is rotated at a second speed that is lower than the first speed for a second time duration after the first time duration. The wafer is rotated at a third speed that is higher than the second speed for a third time duration after the second time duration. A photoresist is dispensed on the wafer during the first time duration and at least a portion of a time interval that includes the second time duration and the third time duration.
    Type: Application
    Filed: September 17, 2013
    Publication date: March 19, 2015
    Inventors: Chih-Hsien Hsu, Hong-Hsing Chou, Hu-Wei Lin, Chi-Jen Hsieh, Jr-Wei Ye, Yuan-Ting Huang, Ching-Hsing Chiang, Hua-Kuang Teng, Yen-Chen Lin, Carolina Poe, Tsung-Cheng Huang, Chia-Hung Chu
  • Patent number: 8975196
    Abstract: According to one embodiment, a method of manufacturing a semiconductor device includes providing a substrate, supplying a first liquid including a terpene to a surface of the substrate, supplying a second liquid including a silicon-containing compound to the surface of the substrate, and converting the silicon-containing compound to a silicon oxide compound.
    Type: Grant
    Filed: September 2, 2013
    Date of Patent: March 10, 2015
    Assignee: Kabushiki Kaisha Toshiba
    Inventor: Keisuke Nakazawa
  • Publication number: 20150056820
    Abstract: Systems and methods of solvent temperature control for wafer coating processes are provided. In an embodiment, a method for spin coating a wafer includes attaching the wafer to a rotatable chuck. The chuck is then rotated, and solvent is dispensed onto the wafer. The solvent dispensing temperature is controlled while the solvent is dispensed onto the wafer.
    Type: Application
    Filed: August 20, 2013
    Publication date: February 26, 2015
    Applicant: GLOBALFOUNDRIES, Inc.
    Inventors: Jason Lewis Behnke, Christos Karanikas
  • Patent number: 8962495
    Abstract: A film deposition method includes a first step and a second step. In the first step, a first reaction gas is supplied from a first gas supply part to a first process area, and a second reaction gas capable of reacting with the first reaction gas is supplied from a second gas supply part to a second process area, while rotating a turntable and supplying a separation gas to separate the first process area and the second process area from each other. In the second step, the second reaction gas is supplied from the second gas supply part to the second process area without supplying the first reaction gas from the first gas supply part for a predetermined period, while rotating the turntable and supplying the separation gas to separate the first process area and the second process area from each other.
    Type: Grant
    Filed: June 12, 2013
    Date of Patent: February 24, 2015
    Assignee: Tokyo Electron Limited
    Inventors: Hiroaki Ikegawa, Masahiko Kaminishi, Yoshinobu Ise, Jun Ogawa
  • Patent number: 8956981
    Abstract: A stabilizing solution for treating photoresist patterns and methods of preventing profile abnormalities, toppling and resist footing are disclosed. The stabilizing solution comprises a non-volatile component, such as non-volatile particles or polymers, which is applied after the photoresist material has been developed. By treating the photoresist with the solution containing a non-volatile component after developing but before drying, the non-volatile component fills the space between adjacent resist patterns and remains on the substrate during drying. The non-volatile component provides structural and mechanical support for the resist to prevent deformation or collapse by liquid surface tension forces.
    Type: Grant
    Filed: October 2, 2013
    Date of Patent: February 17, 2015
    Assignee: Micron Technology, Inc.
    Inventors: Jon Daley, Yoshiki Hishiro
  • Patent number: 8956694
    Abstract: A pretreatment process, carried out prior to a developing process, spouts pure water, namely, a diffusion-assisting liquid for assisting the spread of a developer over the surface of a wafer, through a cleaning liquid spouting nozzle onto a central part of the wafer to form a puddle of pure water. The developer is spouted onto the central part of the wafer for prewetting while the wafer is rotated at a high rotating speed to spread the developer over the surface of the wafer. The developer dissolves the resist film partly and produces a solution. The rotation of the wafer is reversed, for example, within 7 s in which the solution is being produced to reduce the water-repellency of the wafer by spreading the solution over the entire surface of the wafer. Then, the developer is spouted onto the rotating wafer to spread the developer on the surface of the wafer.
    Type: Grant
    Filed: October 14, 2010
    Date of Patent: February 17, 2015
    Assignee: Tokyo Electron Limited
    Inventors: Hirofumi Takeguchi, Tomohiro Iseki, Yuichi Yoshida, Kousuke Yoshihara
  • Patent number: 8951609
    Abstract: A nanotube-photoresist composite is fabricated by preparing a nanotube suspension using a nanotube structure-containing raw material, dispersing the nanotube suspension in a photoresist using ultra-sonication to produce a nanotube suspension-photoresist mix, spin-coating the nanotube suspension-photoresist mix on a substrate to form a nanotube suspension-photoresist composite layer, and removing one or more solvents in the nanotube suspension-photoresist composite layer by baking.
    Type: Grant
    Filed: April 25, 2011
    Date of Patent: February 10, 2015
    Assignee: STMicroelectronics Asia Pacific Pte Ltd
    Inventors: Shanzhong Wang, Mui Hoon Nai, Zhonglin Miao
  • Patent number: 8940649
    Abstract: A coating treatment method includes: a first step of rotating a substrate at a first rotation number; a second step of rotating the substrate at a second rotation number being slower than the first rotation number; a third step of rotating the substrate at a third rotation number being faster than the second rotation number and slower than the first rotation number; a fourth step of rotating the substrate at a fourth rotation number being slower than the third rotation number; and a fifth step of rotating the substrate at a fifth rotation number being faster than the fourth rotation number. A supply of a coating solution to a central portion of the substrate is continuously performed from the first step to a middle of the second step or during the first step, and the fourth rotation number is more than 0 rpm and 500 rpm or less.
    Type: Grant
    Filed: July 13, 2011
    Date of Patent: January 27, 2015
    Assignee: Tokyo Electron Limited
    Inventors: Kousuke Yoshihara, Shinichi Hatakeyama
  • Patent number: 8940365
    Abstract: A device to form a coating film which can quickly coat a substrate of a follow-up lot after coating a preceding lot. The device is configured such that nozzles for a preceding lot and a following lot are integrated into a common movement mechanism and moved between an upper side of a liquid processing unit and a standby area. A coating method includes sucking air into the nozzle for the preceding lot to form an upper gas layer, sucking a solvent for the preceding lot in the standby area to form a thinner layer, and sucking air into the nozzle for the preceding lot to form a lower gas layer within the nozzle, and thus forming a state that a solvent layer is interposed between the upper gas layer and the lower gas layer.
    Type: Grant
    Filed: December 23, 2011
    Date of Patent: January 27, 2015
    Assignee: Tokyo Electron Limited
    Inventors: Akira Miyata, Yoshitaka Hara, Kouji Fujimura
  • Patent number: 8936832
    Abstract: A method for wet treatment of plate-like articles includes, a chuck for holding a single plate-like article having an upwardly facing surface for receiving liquid running off a plate-like article when being treated with liquid, wherein the chuck is outwardly bordered by a circumferential annular lip. The chuck has an outer diameter greater than the greatest diameter of the plate-like article to be treated, and a rotatable part with an upwardly facing ring-shaped surface for receiving liquid running off the circumferential lip of the chuck. The rotatable part is rotatable with respect to the chuck, the ring-shaped surface is coaxially arranged with respect to the circumferential annular lip, the inner diameter of the ring-shaped surface is smaller than the outer diameter of the chuck, and the distance d between the lip and the upwardly facing ring-shaped surface is in a range from 0.1 mm to 5 mm.
    Type: Grant
    Filed: December 21, 2011
    Date of Patent: January 20, 2015
    Assignee: Lam Research AG
    Inventors: Michael Brugger, Alexander Schwarzfurtner
  • Patent number: 8932672
    Abstract: A substrate processing apparatus comprises an indexer block, an anti-reflection film processing block, a resist film processing block, a development processing block, a resist cover film processing block, a resist cover film removal block, a cleaning/drying processing block, and an interface block. An exposure device is arranged adjacent to the interface block in the substrate processing apparatus. The exposure device subjects a substrate to exposure processing by means of an immersion method. In the edge cleaning unit in the cleaning/drying processing block, a brush abuts against an end of the rotating substrate, so that the edge of the substrate before the exposure processing is cleaned. At this time, the position where the substrate is cleaned is corrected.
    Type: Grant
    Filed: November 30, 2009
    Date of Patent: January 13, 2015
    Assignee: SCREEN Semiconductor Solutions Co., Ltd.
    Inventors: Koji Kaneyama, Masashi Kanaoka, Tadashi Miyagi, Kazuhito Shigemori, Shuichi Yasuda, Tetsuya Hamada
  • Patent number: 8927440
    Abstract: A film deposition apparatus that laminates layers of reaction product by repeating cycles of sequentially supplying process gases that mutually reacts in a vacuum atmosphere includes a turntable receiving a substrate, process gas supplying portions supplying mutually different process gases to separated areas arranged in peripheral directions, and a separation gas supplying portion separating the process gases, wherein at least one process gas supplying portion extends between peripheral and central portions of the turntable and includes a gas nozzle discharging one process gas toward the turntable and a current plate provided on an upstream side to allow the separation gas to flow onto its upper surface, wherein a gap between the current plate and the turntable is gradually decreased from a central side of the turntable to a peripheral side of the turntable, and the gap is smaller on the peripheral side by 1 mm or greater.
    Type: Grant
    Filed: July 8, 2013
    Date of Patent: January 6, 2015
    Assignee: Tokyo Electron Limited
    Inventors: Hitoshi Kato, Shigehiro Miura