Abstract: The present disclosure reduces and, in some instances, eliminates the density of interface states in III-V compound semiconductor materials by providing a thin crystalline interlayer onto an upper surface of a single crystal III-V compound semiconductor material layer to protect the crystallinity of the single crystal III-V compound semiconductor material layer's surface atoms prior to further processing of the structure.

Abstract: A composite dielectric material doped with rare earth metal oxide and a manufacturing method thereof are provided. The composite dielectric material is doped with nano-crystalline rare metal oxide which is embedded in silicon dioxide glass matrix, and the composite dielectric material of the nano-crystalline rare metal oxide and the silicon dioxide glass matrix is synthesized by the manufacturing method using sol-gel route. The dielectric value of the glass composite dielectric material is greater than that of pure rare metal oxide or that of silicon dioxide. In presence of magnetic field, the dielectric value of the composite dielectric material is substantially enhanced compared with that of the composite dielectric material at zero field.

Abstract: Embodiments of the present invention provide apparatus and methods for supporting, positioning or rotating a semiconductor substrate during processing. One embodiment of the present invention provides a method for processing a substrate comprising positioning the substrate on a substrate receiving surface of a susceptor, and rotating the susceptor and the substrate by delivering flow of fluid from one or more rotating ports.

Abstract: A substrate treatment apparatus is used for treating a major surface of a substrate with a chemical liquid. The substrate treatment apparatus includes: a substrate holding unit which holds the substrate; a chemical liquid supplying unit having a chemical liquid nozzle which supplies the chemical liquid onto the major surface of the substrate held by the substrate holding unit; a heater having an infrared lamp to be located in opposed relation to the major surface of the substrate held by the substrate holding unit to heat the chemical liquid supplied onto the major surface of the substrate by irradiation with infrared radiation emitted from the infrared lamp, the heater having a smaller diameter than the substrate; and a heater moving unit which moves the heater along the major surface of the substrate held by the substrate holding unit.

Abstract: According to one embodiment, a pattern forming method is disclosed. A resist pattern having a top surface is formed pattern on a substrate. A coating film having a first thickness distribution is formed on the substrate. The coating film covers the resist pattern. The coating film is thinned to expose the top surface of the resist pattern. The first thickness distribution is changed into a second thickness distribution which is more uniform than the first thickness distribution. The resist pattern is removed without removing the coating film. A pattern is formed in the substrate by processing the substrate by using the coating film as a mask.

Abstract: Methods for forming or patterning nanostructure arrays are provided. The methods involve formation of arrays on coatings comprising nanostructure association groups, formation of arrays in spin-on-dielectrics, solvent annealing after nanostructure deposition, patterning using resist, and/or use of devices that facilitate array formation. Related devices for forming nanostructure arrays are also provided, as are devices including nanostructure arrays (e.g., memory devices).

Abstract: A substrate is rotated at a first rotation number (first step). The rotation of the substrate is decelerated to 1500 rpm that is a second rotation number and the substrate is rotated at the second rotation number for 0.5 seconds (second step). The rotation of the substrate is further decelerated to a third rotation number and the substrate is rotated at the third rotation number (third step). The rotation of the substrate is accelerated to a fourth rotation number and the substrate is rotated at the fourth rotation number (fourth step). A resist solution is continuously supplied to a center portion of the substrate from a middle of the first step to a middle of the third step.

Abstract: The present invention supplies a solvent to a front surface of a substrate while rotating the substrate. The substrate is acceleratingly rotated to a first number of rotations, and a resist solution is supplied to a central portion of the substrate during the accelerating rotation and the rotation at a first number of rotations. The substrate is deceleratingly rotated to a second number of rotations, and after the number of rotations of the substrate reaches the second number of rotations, the resist solution is discharged to the substrate. The substrate is then acceleratingly rotated to a third number of rotations higher than the second number of rotations so that the substrate is rotated at the third number of rotations. According to the present invention, consumption of the resist solution can be suppressed and a high in-plane uniformity can be obtained for the film thickness of the resist film.

Abstract: An emissive device includes a substrate; a switching element disposed on a surface of the substrate; an insulating layer covering the switching element; a contact hole disposed in the insulating layer; a first electrode disposed on a surface of the insulating layer and electrically connected to the switching element via the contact hole in the insulating layer; a second electrode disposed at a side opposite the substrate with respect to the first electrode; a luminescent layer disposed between the first electrode and the second electrode; and a light shield disposed at a side from which light from the luminescent layer emerges and having a portion covering the contact hole when viewed in a direction perpendicular to the substrate.

Abstract: A protective film forming method for forming a protective film of resin on the front side of a wafer, where the method includes a step of holding the wafer on a spinner table in the condition where the front side of said wafer is oriented upward; a step of forming a water layer of a thickness of between about 1 mm and about 3 mm to cover the front side of the wafer; a step of dropping a liquid resin onto the water layer at the center of the wafer; and a step of rotating the spinner table to rotate the wafer held on the spinner table, thereby scattering the water layer and radially spreading the liquid resin dropped on the water layer to form a first resin film covering the front side of the wafer by a centrifugal force produced during rotation of the wafer.

Abstract: An organic planarizing layer (OPL) is formed atop a semiconductor substrate which includes a plurality of gate lines thereon. Each gate line includes at least a high k gate dielectric and a metal gate. A patterned photoresist having at least one pattern formed therein is then positioned atop the OPL. The at least one pattern in the photoresist is perpendicular to each of the gate lines. The pattern is then transferred by etching into the OPL and portions of each of the underlying gate lines to provide a plurality of gate stacks each including at least a high k gate dielectric portion and a metal gate portion. The patterned photoresist and the remaining OPL layer are then removed utilizing a sequence of steps including first contacting with a first acid, second contacting with an aqueous cerium-containing solution, and third contacting with a second acid.

Abstract: The interlayer insulating layer forming method for forming an interlayer insulating layer of a semiconductor device via a plasma CVD method includes: carrying a substrate into a depressurized processing container; supplying a plasma generating gas to a first space spaced apart from the substrate; exciting the plasma generating gas in the first space; and supplying a raw material gas including a boron compound that includes at least a hydrogen group or hydrocarbon group, to a second space between the first space and the substrate. Also, a semiconductor device is interconnected in a multilayer through an interlayer insulating layer having an amorphous structure including boron, carbon, and nitrogen, wherein, in the interlayer insulating layer, a hydrocarbon group or an alkyl amino group is mixed in the amorphous structure comprising hexagonal boron nitride and cubic boron nitride.

Abstract: In a coating step, a substrate is rotated at a high speed, and in that state a resist solution is discharged from a first nozzle to a central portion of the substrate to apply the resist solution over the substrate. Subsequently, in a flattening step, the rotation of the substrate is decelerated and the substrate is rotated at a low speed to flatten the resist solution on the substrate. In this event, the discharge of the resist solution by the first nozzle in the coating step is performed until a middle of the flattening step, and when the discharge of the resist solution is finished in the flattening step, the first nozzle is moved to move a discharge position of the resist solution from the central portion of the substrate. According to the present invention, the resist solution can be applied uniformly within the substrate.

Abstract: A transfer flow is produced in accordance with a process recipe of a process to be carried out. In the transfer flow, a type of modules listed in accordance with a substrate transfer order is associated with a necessary staying time from when the substrate is transferred into a module by a substrate transfer unit to when the substrate is ready to be transferred back to the substrate transfer unit after the corresponding process is finished. A cycle limiting time is determined to be the longest necessary transfer cycle time among those obtained by dividing the necessary staying time by the number of the modules mounted in the coater/developer. The number of the modules to be used is determined to be a value obtained by dividing the necessary staying time by the cycle limiting time or a nearest integer to which the value is raised.

Abstract: An organic planarizing layer (OPL) is formed atop a semiconductor substrate which includes a plurality of gate lines thereon. Each gate line includes at least a high k gate dielectric and a metal gate. A patterned photoresist having at least one pattern formed therein is then positioned atop the OPL. The at least one pattern in the photoresist is perpendicular to each of the gate lines. The pattern is then transferred by etching into the OPL and portions of each of the underlying gate lines to provide a plurality of gate stacks each including at least a high k gate dielectric portion and a metal gate portion. The patterned photoresist and the remaining OPL layer are then removed utilizing a sequence of steps including first contacting with a first acid, second contacting with an aqueous cerium-containing solution, and third contacting with a second acid.

Abstract: A silicon-containing insulating film is formed on a target substrate by CVD, in a process field to be selectively supplied with a first process gas including di-iso-propylaminosilane gas and a second process gas including an oxidizing gas or nitriding gas. The film is formed by performing a plurality of times a cycle alternately including first and second steps. The first step performs supply of the first process gas, thereby forming an adsorption layer containing silicon on a surface of the target substrate. The second performs supply of the second process gas, thereby oxidizing or nitriding the adsorption layer on the surface of the target substrate. The second step includes an excitation period of supplying the second process gas to the process field while exciting the second process gas by an exciting mechanism.

Abstract: A semiconductor device includes a plurality of wiring lines which are provided on an upper side of a semiconductor substrate and which have connection pad portions, and columnar electrodes are provided on the connection pad portions of the wiring lines. A first sealing film is provided around the columnar electrodes on the upper side of the semiconductor substrate and on the wiring lines. A second sealing film is provided on the first sealing film. The first sealing film is made of a resin in which fillers are not mixed, and the second sealing film is made of a material in which fillers are mixed in a resin.

Abstract: A liquid treatment apparatus treating a surface of a substrate held generally horizontally on a stage in a housing by supplying a treating liquid to said surface from a supply nozzle. The liquid treatment apparatus includes a cup body provided so as to surround the substrate held in the substrate holding part laterally, the cup body being mounted detachably to a base inside the housing from an upward direction thereof; a cup body holding part holding the cup body detachably; and an elevating mechanism moving the cup body holding part up and down between a first position at which the cup body is mounted upon the base body and a second position located above the first position.

Abstract: A semiconductor light-emitting element includes a first semiconductor layer having a first conduction type, a second semiconductor layer having a second conduction type, an active layer provided between the first and second semiconductor layers, a polarity inversion layer provided on the second semiconductor layer, and a third semiconductor layer having the second conduction type provided on the polarity inversion layer. Crystal orientations of the first through third semiconductor layers are inverted, with the polarity inversion layer serving as a boundary. The first and third semiconductor layers have uppermost surfaces made from polar faces having common constitutional elements. Hexagonal conical protrusions arising from a crystal structure are formed at outermost surfaces of the first and third semiconductor layers. The first through third semiconductor layers are made from a wurtzite-structure group III nitride semiconductor, and are layered along a C-axis direction of the crystal structure.

Abstract: A processing method of a semiconductor wafer is provided. The method comprising the steps of: removing at least part of oxide film from a surface of the semiconductor wafer; removing liquid from the surface; and providing at least partial oxide film on the surface by applying an oxidizing gas wherein a gas flow of the oxidizing gas and/or an ambient gas involved by the oxidizing gas is characterized by an unsaturated vapor pressure of the liquid such that the liquid on the surface vaporizes. The above-described steps are conducted in this order.

Abstract: The present invention includes: a first step of discharging a coating solution from a nozzle to a center portion of the substrate to apply the coating solution on a surface of the substrate while rotating the substrate; a second step of decelerating, after the first step, the rotation of the substrate and continuously rotating the substrate; and a third step of accelerating, after the second step, the rotation of the substrate to dry the coating solution on the substrate, wherein: the substrate is rotated at a fixed speed of a first speed immediately before the first step; and in the first step, the rotation of the substrate which is at the first speed before start of the first step is gradually accelerated after the start of the first step so as to make the speed continuously change, and the acceleration of the rotation of the substrate is gradually decreased so as to make the speed of the rotation of the substrate converge in a second speed higher than the first speed at end of the first step.

Abstract: An integrated circuit structure includes a semiconductor substrate; a through-semiconductor via (TSV) opening extending into the semiconductor substrate; and a TSV liner in the TSV opening. The TSV liner includes a sidewall portion on a sidewall of the TSV opening and a bottom portion at a bottom of the TSV opening. The bottom portion of the TSV liner has a bottom height greater than a middle thickness of the sidewall portion of the TSV liner.

Abstract: There is provided a coating method which can efficiently apply a coating liquid, such as a liquid resist, to the entire surface of a wafer even when the coating liquid is supplied in a smaller amount than a conventional one, and can therefore reduce the consumption of the coating liquid. The coating method includes: a first step of rotating the substrate at a first rotating speed while supplying the coating liquid onto approximately the center of the rotating substrate; a second step of rotating the substrate at a second rotating speed which is lower than the first rotating speed; a third step of rotating the substrate at a third rotating speed which is higher than the second rotating speed; and a fourth step of rotating the substrate at a fourth rotating speed which is higher than the second rotating speed and lower than the third rotating speed.

Abstract: A coating treatment apparatus supplying a coating solution to a front surface of a rotated substrate and diffusing the supplied coating solution to an outer periphery side of the substrate to thereby apply the coating solution on the front surface of the substrate includes: a substrate holding part holding a substrate; a rotation part rotating the substrate held on the substrate holding part; a supply part supplying a coating solution to a front surface of the substrate held on the substrate holding part; and an airflow control plate provided at a predetermined position above the substrate held on the substrate holding part for locally changing an airflow above the substrate rotated by the rotation part at an arbitrary position.

Abstract: There is provided an apparatus including: a processing cup having an opening opened upward to allow a substrate to be loaded and unloaded, an exhaust port for exhausting an unnecessary atmosphere produced in forming a film applied on the substrate, and an aspiration port for aspirating external air; and an aspiration device aspirating the unnecessary atmosphere through the exhaust port, wherein when the substrate is accommodated in the opening of the processing cup, the substrate has a perimeter spaced from the opening by a predetermined gap, and below the substrate accommodated in the processing cup there is formed an exhaust flow path extending from the aspiration port to the exhaust port.

Abstract: An apparatus and process operate to impose sonic pressure upon a spin-on film liquid mass that exhibits a liquid topography and in a solvent vapor overpressure to alter the liquid topography. Other apparatus and processes are disclosed.

Abstract: A deposition process for coating a substrate with films of a different thickness on front and rear surface of a substrate can be achieve in one growth. The thickness of the film deposition can be controlled by the separation between the substrates. Different separation distances between the substrates in the same chemical bath will result in different film thicknesses on the substrate. Substrates may be arranged to have different separation distances between front and back surfaces, a V-shaped arrangement, or placed next to a curtain with varying separation distances between a substrate and the curtain.

Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.

Abstract: Methods of forming a roughened metal surface on a substrate are provided, along with structures comprising such roughened surfaces. In preferred embodiments roughened surfaces are formed by selectively depositing metal or metal oxide on a substrate surface to form discrete, three-dimensional islands. Selective deposition may be obtained, for example, by modifying process conditions to cause metal agglomeration or by treating the substrate surface to provide a limited number of discontinuous reactive sites. The roughened metal surface may be used, for example, in the manufacture of integrated circuits.

Abstract: A substrate processing apparatus includes a processing chamber configured to process a plurality of substrates, a substrate holder accommodated within the processing chamber and configured to hold the substrates in a vertically spaced-apart relationship, a thermal insulation portion configured to support the substrate holder from below within the processing chamber, a heating unit provided to surround a substrate accommodating region within the processing chamber, and a gas supply system configured to supply a specified gas to at least a thermal insulation portion accommodating region within the processing chamber.

Abstract: A method of forming a semiconductor device includes the following processes. A groove is formed in a semiconductor substrate. A first spin-on-dielectric layer is formed over a semiconductor substrate. An abnormal oxidation of the first spin-on-dielectric layer is carried out. A surface of the first spin-on-dielectric layer is removed. A second spin-on-dielectric layer is formed over the first spin-on-dielectric layer. A non-abnormal oxidation of the first and second spin-on-dielectric layers is carried out to modify the second spin-on-dielectric layer without modifying the first spin-on-dielectric layer.

Abstract: Embodiments of the invention provide methods and systems for depositing a viscous material on a substrate surface. In one embodiment, the invention provides a method of depositing a viscous material on a substrate surface, the method comprising: applying a pre-wet material to a surface of a substrate; depositing a viscous material atop the pre-wet material; rotating the substrate about an axis to spread the viscous material along the surface of the substrate toward a substrate edge; and depositing additional pre-wet material in a path along the surface and adjacent the spreading viscous material.

Abstract: Provided are a semiconductor manufacturing apparatus and method, capable of reliably and rapidly transporting a heated semiconductor wafer. the apparatus is provided for transporting a semiconductor wafer, which has been processed by desired treatment (for example, film formation) and is held by a susceptor equipped with a heater, to the outside by a transport arm which holds the semiconductor wafer by suction, by moving the susceptor to a certain position above a top of a wafer waiting stage and introducing the semiconductor wafer held by the susceptor onto the top of the wafer waiting stage. Then, the susceptor present on the top of the wafer waiting stage is moved in a horizontal direction. After a certain cooling time, the transport arm holds the semiconductor wafer placed on the wafer waiting stage by suction and transports the semiconductor wafer to outside.

Abstract: Such a method is disclosed that includes forming a liner film to cover a surface of the substrate including a trench, washing a surface of the liner film with water, removing remaining water after the washing, applying a polysilazane solution to fill the trench by spin coating after the removing, and reforming the polysilazane solution into a silicon oxide film by annealing.

Abstract: Embodiments of the invention provide dielectric films and low-k dielectric films and methods for making dielectric and low-k dielectric films. Dielectric films are made from carbosilane-containing precursors. In embodiments of the invention, dielectric film precursors comprise attached porogen molecules. In further embodiments, dielectric films have nanometer-dimensioned pores.

Abstract: Provided is a substrate processing apparatus capable of suppressing accumulation of reaction products or decomposed matters on an inner wall of a nozzle and suppressing scattering of foreign substances in a process chamber. The substrate processing apparatus includes a process chamber, a heating unit, a source gas supply unit, a source gas nozzle, an exhaust unit, and a control unit configured to control at least the heating unit, the source gas supply unit and the exhaust unit. The source gas nozzle is disposed at a region in the process chamber, in which a first process gas is not decomposed even under a temperature in the process chamber higher than a pyrolysis temperature of the first process gas, and the control unit supplies the first process gas into the process chamber two or more times at different flow velocities to prevent the first process gas from being mixed.

Abstract: A method of semiconductor fabrication including an etching process is provided. The method includes providing a substrate and forming a target layer on the substrate. An etchant layer is formed on the target layer. The etchant layer reacts with the target layer and etches a portion of the target layer. In an embodiment, an atomic layer of the target layer is etched. The etchant layer is then removed from the substrate. The process may be iterated any number of times to remove a desired amount of the target layer. In an embodiment, the method provides for decreased lateral etching. The etchant layer may provide for improved control in forming patterns in thin target layers such as, capping layers or high-k dielectric layers of a gate structure.

Abstract: A method forms a first inorganic dielectric layer having a first concentration of defects and a second inorganic dielectric layer in contact with a first layer and having a second lesser concentration of defects.

Abstract: A semiconductor substrate having a semiconductor device formable area, wherein a reinforcing part, which is thicker than the semiconductor device formable area and has a top part of which surface is flat, is formed on an outer circumference part of the semiconductor substrate, and an inner side surface connecting the top part of the reinforcing part and the semiconductor device formable area has a cross-sectional shape of which inner diameter becomes smaller as being closer to the semiconductor device formable area.

Abstract: A naphthalene derivative having formula (1) is provided wherein An and Art denote a benzene or naphthalene ring, and n is such a natural number as to provide a weight average molecular weight of up to 100,000. A material comprising the naphthalene derivative or a polymer comprising the naphthalene derivative is spin coated to form a resist bottom layer having improved properties. A pattern forming process in which a resist bottom layer formed by spin coating is combined with an inorganic hard mask formed by CVD is available.

Abstract: The present invention provides a process for preparing a melt-processed organic-inorganic hybrid material including the steps of maintaining a solid organic-inorganic hybrid material at a temperature above the melting point but below the decomposition temperature of the organic-inorganic hybrid material for a period of time sufficient to form a uniform melt and thereafter, cooling the uniform melt to an ambient temperature under conditions sufficient to produce the melt-processed organic-inorganic hybrid material.

Abstract: Disclosed is a heat treatment unit 4 serving as a heat treatment apparatus, which includes a chamber 42 for containing a wafer W on which a low dielectric constant interlayer insulating film is formed, a formic acid supply device 44 for supplying gaseous formic acid into the chamber 42, and a heater 43 for heating the wafer W in the chamber 42 which is supplied with formic acid by the formic acid supply device 44.

Abstract: An image display system and manufacturing method are disclosed. According to the present invention, the image display system comprises a substrate, a switching TFT, a driving TFT, a photo sensor and a capacitor. A buffer layer is formed on a substrate. A separation layer is formed in a first area for forming a switching TFT, but no heat sink layer is formed thereon. A heat sink layer is formed on a second area for forming the driving TFT, the photo sensor and the capacitor, and then, the separation layer is formed thereafter. The present invention can form poly silicon layers with different crystal grain sizes on the first area and on the second area in a single laser crystallization process by utilizing the heat sink phenomenon of ELA with or without the heat sink layer. Therefore, the image display system of the present invention can operate with good luminance uniformity.

Abstract: A coating treatment method includes: a first step of rotating a substrate at a first rotation number; a second step of rotating the substrate at a second rotation number being slower than the first rotation number; a third step of rotating the substrate at a third rotation number being faster than the second rotation number and slower than the first rotation number; a fourth step of rotating the substrate at a fourth rotation number being slower than the third rotation number; and a fifth step of rotating the substrate at a fifth rotation number being faster than the fourth rotation number. A supply of a coating solution to a central portion of the substrate is continuously performed from the first step to a middle of the second step or during the first step, and the fourth rotation number is more than 0 rpm and 500 rpm or less.

Abstract: For patterning during integrated circuit fabrication, a first pattern of first masking structures is formed, and a buffer layer is formed on exposed surfaces of the first masking structures. Also, a second pattern of second masking structures is formed in recesses between the buffer layer at sidewalls of the first masking structures. Furthermore, the first and masking structures are formed from spin-coating respective high carbon containing materials. Such first and second masking structures pattern a target layer with higher pitch than possible with traditional photolithography.

Abstract: A coating method based on such a technique includes a prewetting step of supplying a prewetting liquid to the center of a substrate (W) and rotating the substrate thereby spreading the prewetting liquid over the whole surface of a first substrate, and a coating film forming step of supplying a coating solution (e.g., a resist solution) to the substrate supplied with the prewetting liquid and drying the coating solution thereby forming a coating film on the surface of the first substrate. The prewetting liquid used is a mixed liquid obtained by mixing a solvent capable of dissolving components of the coating film (e.g., components of resist) and a high surface tension liquid having a surface tension higher than that of the solvent, the mixed liquid having a surface tension higher than that of the coating solution.

Abstract: A method of forming a nanoporous film is disclosed. The method comprises forming a coating solution including clusters, surfactant molecules, a solvent, and one of an acid catalyst and a base catalyst. The clusters comprise inorganic groups. The method further comprises aging the coating solution for a time period to select a predetermined phase that will self-assemble and applying the coating solution on a substrate. The method further comprises evaporating the solvent from the coating solution and removing the surfactant molecules to yield the nanoporous film.

Abstract: An on-wafer crystallization method of spin-coating a silicon wafer with a low-k dielectric zeolite material which includes the steps of forming a synthesis solution; generating a nucleated precursor solution; spin-coating the nucleated precursor onto a substrate as a precursor film; and annealing the precursor film into a zeolite film.

Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.

Abstract: In one embodiment the present invention is a method of conducting multiple step multiple chamber chemical vapor deposition while avoiding reactant memory in the relevant reaction chambers. The method includes depositing a layer of semiconductor material on a substrate using vapor deposition in a first deposition chamber followed by evacuation of the growth chamber to reduce vapor deposition source gases remaining in the first deposition chamber after the deposition growth and prior to opening the chamber. The substrate is transferred to a second deposition chamber while isolating the first deposition chamber from the second deposition chamber to prevent reactants present in the first chamber from affecting deposition in the second chamber and while maintaining an ambient that minimizes or eliminates growth stop effects. After the transferring step, an additional layer of a different semiconductor material is deposited on the first deposited layer in the second chamber using vapor deposition.