Having Metal Oxide Or Copper Sulfide Compound Semiconductive Component Patents (Class 438/85)
  • Patent number: 11623280
    Abstract: An ink composition for use as a support ink in three dimensional (3D) printing processes comprises a dispersion of solid particles in liquid carder, compatible with an inkjet print head, wherein after removing the liquid carder, the solid particles serve as support material for a Three Dimensional (3D) printed object, wherein the support material is separable from the 3D printed object.
    Type: Grant
    Filed: July 7, 2020
    Date of Patent: April 11, 2023
    Assignee: XJET LTD.
    Inventors: Yohai Dayagi, Axel Benichou, Eli Kritchman
  • Patent number: 11127834
    Abstract: The present disclosure generally relates to semiconductor structures and, more particularly, to gate structures and methods of manufacture. The method includes: forming a first gate structure and a second gate structure with gate materials; etching the gate materials within the second gate structure to form a trench; and depositing a conductive material within the trench so that the second gate structure has a metal composition different than the first gate structure.
    Type: Grant
    Filed: October 11, 2019
    Date of Patent: September 21, 2021
    Assignee: GLOBALFOUNDRIES U.S. INC
    Inventors: Jiehui Shu, Sipeng Gu, Halting Wang
  • Patent number: 11049666
    Abstract: A fabrication method for a flexible bifacial dye-sensitized solar cell is described. The method involves forming a flexible counter electrode of crystalline Pt nanoparticles on a first conductive layer by irradiating a precursor solution with a UV lamp. A flexible photoanode is formed by applying metal oxide particles to a second conductive layer, and then the solar cell is constructed by sandwiching an electrolyte between the counter electrode and photoanode.
    Type: Grant
    Filed: December 26, 2018
    Date of Patent: June 29, 2021
    Assignees: KING FAHD UNIVERSITY OF PETROLEUM AND MINERALS, Abdulrahman Bin Faisal University
    Inventors: Idris Kayode Popoola, Muhammad Ashraf Gondal, Jwaher M. Alghamdi, Talal F. Qahtan
  • Patent number: 10903185
    Abstract: A bonding material includes: fine silver particles having an average primary particle diameter of 1 to 50 nm, each of the fine silver particles being coated with an organic compound having a carbon number of not greater than 8, such as hexanoic acid; silver particles having an average primary particle diameter of 0.5 to 4 ?m each of the silver particles being coated with an organic compound, such as oleic acid; a solvent containing a primary alcohol solvent and a terpene alcohol solvent; and a dispersant containing a phosphoric acid ester dispersant (or a phosphoric acid ester dispersant and an acrylic resin dispersant), wherein the content of the fine silver particles is in the range of from 5 wt % to 30 wt %, and the content of the silver particles is in the range of from 60 wt % to 90 wt %, the total content of the fine silver particles and the silver particles being not less than 90 wt %, and wherein the bonding material further includes a sintering aid of a monocarboxylic acid having an ether bond.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: January 26, 2021
    Assignee: Dowa Electronics Materials Co., Ltd.
    Inventors: Keiichi Endoh, Koichi Yuzaki, Minami Nagaoka, Hiromasa Miyoshi, Satoru Kurita
  • Patent number: 10896977
    Abstract: A novel material and a transistor including the novel material are provided. One embodiment of the present invention is a composite oxide including at least two regions. One of the regions includes In, Zn and an element M1 (the element M1 is one or more of Al, Ga, Si, B, Y, Ti, Fe, Ni, Ge, Zr, Mo, La, Ce, Nd, Hf, Ta, W, Mg, V, Be, and Cu) and the other of the regions includes In, Zn, and an element M2 (the element M2 is one or more of Al, Ga, Si, B, Y, Ti, Fe, Ni, Ge, Zr, Mo, La, Ce, Nd, Hf, Ta, W, Mg, V, Be, and Cu). In an analysis of the composite oxide by energy dispersive X-ray spectroscopy, the detected concentration of the element M1 in a first region is less than the detected concentration of the element M2 in a second region, and a surrounding portion of the first region is unclear in an observed mapping image of the energy dispersive X-ray spectroscopy.
    Type: Grant
    Filed: October 12, 2017
    Date of Patent: January 19, 2021
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 10431709
    Abstract: A method (200) for fabricating thin-film optoelectronic devices (100), the method comprising: providing a substrate (110), forming a back-contact layer (120); forming at least one absorber layer (130) made of an ABC chalcogenide material, adding at least one alkali metal (235), and forming at least one cavity (236, 610, 612, 613) at the surface of the absorber layer wherein forming of said at least one cavity is by dissolving away from said surface of the absorber layer at least one crystal aggregate comprising at least one alkali crystal comprising at least one alkali metal. The method (200) is advantageous for more environmentally-friendly production of photovoltaic devices (100) on flexible substrates with high photovoltaic conversion efficiency and faster production rate.
    Type: Grant
    Filed: September 27, 2018
    Date of Patent: October 1, 2019
    Assignee: Flisom AG
    Inventors: Patrick Reinhard, Fabian Pianezzi, Benjamin Bissig, Stephan Buecheler, Ayodhya Nath Tiwari
  • Patent number: 9312413
    Abstract: A colored substrate and a method for producing a substrate having a colored interference filter layer containing a polycrystalline metal oxide or polycrystalline metal oxides with the aid of physical or chemical vapor deposition using a coating system, in particular with the aid of a sputtering gas, in which at least two, in particular at least six, coating layers are vapor deposited one on top of the other forming polycrystalline metal oxides in each case.
    Type: Grant
    Filed: September 23, 2010
    Date of Patent: April 12, 2016
    Assignee: ROBERT BOSCH GMBH
    Inventors: Frank Hergert, Volker Probst, Jan Rudolf Thyen
  • Patent number: 9231148
    Abstract: A method for chemically cleaning and passivating a chalcogenide layer is provided, wherein the method comprises bringing the chalcogenide layer into contact with an ammonium sulfide containing ambient, such as an ammonium sulfide liquid solution or an ammonium sulfide containing vapor. Further, a method for fabricating photovoltaic cells with a chalcogenide absorber layer is provided, wherein the method comprises: providing a chalcogenide semiconductor layer on a substrate; bringing the chalcogenide semiconductor layer into contact with an ammonium sulfide containing ambient, thereby removing impurities and passivating the chalcogenide semiconductor layer; and afterwards providing a buffer layer on the chalcogenide semiconductor layer.
    Type: Grant
    Filed: September 29, 2014
    Date of Patent: January 5, 2016
    Assignees: IMEC, Katholieke Universiteit Leuven, KU Leuven R&D, Universiteit Hasselt
    Inventors: Marie Buffiere, Marc Meuris, Guy Brammertz
  • Patent number: 9103028
    Abstract: The present invention aims at providing a method for forming a metal oxide film which can further improve the production efficiency while maintaining low resistance of a metal oxide film formed thereby. In the method for forming a metal oxide film of the present invention, a solution (4) containing a metallic element and ammonia (4a) is formed into a mist. Meanwhile, a substrate (2) is heated. Then, the solution (4) formed into a mist is supplied onto a first main surface of the substrate (2) being heated.
    Type: Grant
    Filed: April 20, 2009
    Date of Patent: August 11, 2015
    Assignees: TOSHIBA MITSUBISHI—ELECTRIC INDUSTRIAL SYSTEMS CORPORATION, KYOTO UNIVERSITY
    Inventors: Hiroyuki Orita, Takahiro Shirahata, Akio Yoshida, Shizuo Fujita, Naoki Kameyama
  • Publication number: 20150144199
    Abstract: A dye-sensitized solar cell and a method for manufacturing same are disclosed. The dye-sensitized solar cell includes: a transparent substrate; a working electrode including a dye-adsorbed metallic oxide disposed on the transparent substrate; a separation film disposed on the working electrode; an electrolyte disposed on the separation film; and an opposite electrode disposed on the electrolyte. A carbon nano-web coated with graphene is disposed between the working electrode and the separation film.
    Type: Application
    Filed: May 23, 2013
    Publication date: May 28, 2015
    Inventors: Hoon Huh, Hui Jin Kim, Jee Young Jang
  • Publication number: 20150136213
    Abstract: A method for the preparation of copper indium gallium diselenide/disulfide (CIGS) nanoparticles utilizes a copper-rich stoichiometry. The copper-rich CIGS nanoparticles are capped with organo-chalcogen ligands, rendering the nanoparticles processable in organic solvents. The nanoparticles may be deposited on a substrate and thermally processed in a chalcogen-rich atmosphere to facilitate conversion of the excess copper to copper selenide or copper sulfide that may act as a sintering flux to promote liquid phase sintering and thus the growth of large grains. The nanoparticles so produced may be used to fabricate CIGS-based photovoltaic devices.
    Type: Application
    Filed: November 14, 2014
    Publication date: May 21, 2015
    Inventors: Christopher Newman, Ombretta Masala, Paul Kirkham, Cary Allen, Stephen Whitelegg
  • Publication number: 20150140723
    Abstract: A method for providing a coated strip, which includes the steps of providing a metal or metal alloy strip, applying one or more coating layers on the metal or metal alloy strip and irradiating one or more of the applied coating layers with electromagnetic radiation, wherein one or more of the applied coating layers includes dielectric particles capable of absorbing microwave radiation and wherein microwave radiation is used to selectively heat one or more of the coating layers containing the dielectric particles to dry and/or cure and/or sinter the coating layer.
    Type: Application
    Filed: July 3, 2013
    Publication date: May 21, 2015
    Inventors: Sivasambu Böhm, Henagame Lyanage Mallika Böhm, Sreedhara Sarma
  • Patent number: 9029170
    Abstract: A magnetic tunnel junction (MTJ) device is formed by a process that includes forming a trench in a substrate and depositing an MTJ structure within the trench. The MTJ structure includes a bottom electrode, a fixed layer, a tunnel barrier layer, a free layer, and a top electrode. The process includes applying reverse photo etching to remove material that is not directly over the trench. The process also includes plagiarizing the MTJ structure without performing a photo-etch process on the MTJ structure.
    Type: Grant
    Filed: January 4, 2013
    Date of Patent: May 12, 2015
    Assignee: QUALCOMM Incorporated
    Inventor: Xia Li
  • Publication number: 20150122325
    Abstract: The present disclosure described herein generally relates to a dye-sensitized solar cell including an organic-inorganic composite dye having a perovskite structure, and a producing method of the same.
    Type: Application
    Filed: December 29, 2014
    Publication date: May 7, 2015
    Applicant: RESEARCH & BUSINESS FOUNDATION SUNGKYUNKWAN UNIVERSITY
    Inventors: Nam-Gyu PARK, Huiseon KIM, Changryul LEE, Jeong-Hyeok IM
  • Publication number: 20150114463
    Abstract: Disclosed is a thin film solar cell including a substrate, a first electrode, a light absorbing layer, a buffer layer, a window layer, and a second electrode, wherein a compound layer of MxSy or MxSey (here, M is metal, and x and y each are a natural number) is present in an interface between the first electrode and the light absorbing layer, the thickness of the compound layer of MxSy or MxSey being 150 nm or less.
    Type: Application
    Filed: August 22, 2014
    Publication date: April 30, 2015
    Inventors: Kee Jeong Yang, Bo Ram Jeon, Jun Hyoung Sim, Dae Ho Son, Jin Kyu Kang
  • Patent number: 9018032
    Abstract: A method for manufacturing a CIGS thin film photovoltaic device includes forming a back contact layer on a substrate, forming an Se-rich layer on the back contact layer, forming a precursor layer on the Se-rich layer by depositing copper, gallium and indium resulting in a first interim structure, annealing or selenizing the first interim structure, thereby forming Cu/Se, Ga/Se or CIGS compounds along the interface between the back contact layer and the precursor layer and resulting in a second interim structure, and selenizing the second interim structure, thereby converting the precursor layer into a CIGS absorber layer on the back contact layer.
    Type: Grant
    Filed: April 13, 2012
    Date of Patent: April 28, 2015
    Assignee: TSMC Solar Ltd.
    Inventors: Hsuan-Sheng Yang, Wen-Chin Lee, Li-Huan Chu
  • Patent number: 9012905
    Abstract: A transistor including an oxide semiconductor with favorable electric characteristics and a manufacturing method thereof are provided. A semiconductor device includes a transistor. The transistor includes an oxide semiconductor film over a base insulating film, a gate electrode overlapping with the oxide semiconductor film with a gate insulating film interposed therebetween, and a pair of electrodes in contact with the oxide semiconductor film and serving as a source electrode and a drain electrode. The base insulating film includes a first oxide insulating film partly in contact with the oxide semiconductor film and a second oxide insulating film in the periphery of the first oxide insulating film. An end portion of the oxide semiconductor film which crosses the channel width direction of the transistor is located over the second oxide insulating film.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: April 21, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Publication number: 20150097180
    Abstract: The present invention provides an image sensor including an oxide semiconductor layer formed on a gate electrode, an oxide film formed on a surface of a channel region of the oxide semiconductor layer, source and drain electrodes formed on the oxide semiconductor layer and spaced apart from each other with the channel region interposed therebetween, an anti-etching film formed on the source and drain electrodes and configured to cover the oxide film, and a photodiode connected to the drain electrode.
    Type: Application
    Filed: August 8, 2014
    Publication date: April 9, 2015
    Inventors: Gyo Sun YU, Myeong Ho KIM, Jin Hyeong PARK, SEUNG IK JUN, Duck Kyun CHOI
  • Patent number: 8987856
    Abstract: A photodiode, a light sensor and a fabricating method thereof are disclosed. An n-type semiconductor layer and an intrinsic semiconductor layer of the photodiode respectively comprise n-type amorphous indium gallium zinc oxide (IGZO) and intrinsic IGZO. The oxygen content of the intrinsic amorphous IGZO is greater than the oxygen content of the n-type amorphous IGZO. A light sensor comprise the photodiode is also disclosed.
    Type: Grant
    Filed: March 29, 2012
    Date of Patent: March 24, 2015
    Assignee: E Ink Holdings Inc.
    Inventors: Fang-An Shu, Yao-Chou Tsai, Ted-Hong Shinn
  • Patent number: 8980744
    Abstract: This disclosure provides a method of fabricating a semiconductor stack and associated device, such as a capacitor and DRAM cell. In particular, a bottom electrode has a material selected for lattice matching characteristics. This material may be created from a relatively inexpensive metal oxide which is processed to adopt a conductive, but difficult-to-produce oxide state, with specific crystalline form; to provide one example, specific materials are disclosed that are compatible with the growth of rutile phase titanium dioxide (TiO2) for use as a dielectric, thereby leading to predictable and reproducible higher dielectric constant and lower effective oxide thickness and, thus, greater part density at lower cost.
    Type: Grant
    Filed: November 13, 2012
    Date of Patent: March 17, 2015
    Assignees: Intermolecular, Inc., Elpida Memory, Inc.
    Inventors: Hanhong Chen, Toshiyuki Hirota, Pragati Kumar, Xiangxin Rui, Sunil Shanker
  • Patent number: 8980686
    Abstract: An object is to provide a deposition technique for depositing an oxide semiconductor film. Another object is to provide a method for manufacturing a highly reliable semiconductor element using the oxide semiconductor film. A novel sputtering target obtained by removing an alkali metal, an alkaline earth metal, and hydrogen that are impurities in a sputtering target used for deposition is used, whereby an oxide semiconductor film containing a small amount of those impurities can be deposited.
    Type: Grant
    Filed: September 2, 2014
    Date of Patent: March 17, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8980682
    Abstract: Methods of forming absorber layers in a TFPV device are provided. Methods are described to provide the formation of metal oxide films and heating the metal oxide films in the presence of a chalcogen to form a metal-oxygen-chalcogen alloy. Methods are described to provide the formation of metal oxide films, forming a layer of elemental chalcogen on the metal oxide film, and heating the stack to form a metal-oxygen-chalcogen alloy. In some embodiments, the metal oxide film includes zinc oxide and the chalcogen includes selenium.
    Type: Grant
    Filed: December 18, 2013
    Date of Patent: March 17, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Haifan Liang, Jeroen Van Duren
  • Patent number: 8975147
    Abstract: This disclosure provides a method of fabricating a semiconductor stack and associated device, such as a capacitor and DRAM cell. In particular, a bottom electrode has a material selected for lattice matching characteristics. This material may be created from a relatively inexpensive metal oxide which is processed to adopt a conductive, but difficult-to-produce oxide state, with specific crystalline form; to provide one example, specific materials are disclosed that are compatible with the growth of rutile phase titanium dioxide (TiO2) for use as a dielectric, thereby leading to predictable and reproducible higher dielectric constant and lower effective oxide thickness and, thus, greater part density at lower cost.
    Type: Grant
    Filed: December 7, 2012
    Date of Patent: March 10, 2015
    Assignees: Intermolecular, Inc., Elpida Memory, Inc.
    Inventors: Xiangxin Rui, Hanhong Chen, Pragati Kumar, Sandra G. Malhotra
  • Publication number: 20150063543
    Abstract: A radiation detector may include: a first photoconductor layer including a plurality of photosensitive particles; and/or a second photoconductor layer on the first photoconductor layer, and including a plurality of crystals obtained by crystal-growing photosensitive material. At least some of the plurality of photosensitive particles of the first photoconductor layer may fill gaps between the plurality of crystals of the second photoconductor layer. A method of manufacturing a radiation detector may include: forming a first photoconductor layer by applying paste, including solvent mixed with a plurality of photosensitive particles, to a first substrate; forming a second photoconductor layer by crystal-growing photosensitive material on a second substrate; pressing the crystal-grown second photoconductor layer on the first photoconductor layer that is applied to the first substrate; and/or removing the solvent in the first photoconductor layer via a drying process.
    Type: Application
    Filed: September 1, 2014
    Publication date: March 5, 2015
    Inventors: Seung-hyup LEE, Sun-il KIM, Young KIM, Chang-jung KIM
  • Publication number: 20150059855
    Abstract: A method for fabricating a photovoltaic device includes forming a film including titanium on a conductive layer formed on a substrate. An absorber layer is formed including a Cu—Zn—Sn containing chalcogenide compound with a kesterite structure of the formula: Cu2-xZn1+ySn(S1-zSez)4+q wherein 0?x?1; 0?y?1; 0?z?1; ?1?q?1 (CZTS) on the film. The absorber layer is annealed to diffuse titanium therein and to recrystallize the CZTS material of the film. A buffer layer is formed on the absorber layer, and a transparent conductive layer is formed on the buffer layer.
    Type: Application
    Filed: August 29, 2013
    Publication date: March 5, 2015
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Marinus J. Hopstaken, David B. Mitzi, Wei Wang, Mark T. Winkler
  • Patent number: 8969123
    Abstract: In an apparatus for manufacturing a dye-sensitized solar cell, a photosensitization dye solution makes contact with an electrode material layer that functions as a working electrode of a dye-sensitized solar cell so that the photosensitizing dye is adsorbed on the layer. Such an apparatus for manufacturing a dye-sensitized solar cell has a substrate housing section to house a substrate with the electrode material layer formed on its surface, and a circulation mechanism to circulate the photosensitization dye solution in such a way that the solution passes a surface of the substrate housed in the substrate housing section. In such an apparatus, a cross-sectional area of a flow path for the photosensitization dye solution in a portion facing the substrate in the substrate housing section is set smaller than a cross-sectional area of a flow path for the photosensitization dye solution in other portions.
    Type: Grant
    Filed: February 24, 2011
    Date of Patent: March 3, 2015
    Assignees: Tokyo Electron Limited, Kyushu Institute of Technolgy
    Inventors: Hiroaki Hayashi, Ryuichi Shiratsuchi, Suehiro Ohkubo, Shuzi Hayase, Taiichi Mure, Yasuhiro Shishida
  • Patent number: 8963149
    Abstract: A thin film transistor including an oxide semiconductor with favorable electrical characteristics is provided. The thin film transistor includes a gate electrode provided over a substrate, a gate insulating film provided over the gate electrode, an oxide semiconductor film provided over the gate electrode and on the gate insulating film, a metal oxide film provided on the oxide semiconductor film, and a metal film provided on the metal oxide film. The oxide semiconductor film is in contact with the metal oxide film, and includes a region whose concentration of metal is higher than that of any other region in the oxide semiconductor film (a high metal concentration region). In the high metal concentration region, the metal contained in the oxide semiconductor film may be present as a crystal grain or a microcrystal.
    Type: Grant
    Filed: June 6, 2014
    Date of Patent: February 24, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Akiharu Miyanaga, Junichiro Sakata, Masayuki Sakakura, Masahiro Takahashi, Hideyuki Kishida, Shunpei Yamazaki
  • Patent number: 8956913
    Abstract: A semiconductor device having favorable electric characteristics and a manufacturing method thereof are provided. A transistor includes an oxide semiconductor layer formed over an insulating layer, a source electrode layer and a drain electrode layer which overlap with part of the oxide semiconductor layer, a gate insulating layer in contact with part of the oxide semiconductor layer, and a gate electrode layer over the gate insulating layer. In the transistor, a buffer layer having n-type conductivity is formed between the source electrode layer and the oxide semiconductor layer and between the drain electrode layer and the oxide semiconductor layer. Thus, parasitic resistance is reduced, resulting in improvement of on-state characteristics of the transistor.
    Type: Grant
    Filed: June 19, 2014
    Date of Patent: February 17, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Patent number: 8952381
    Abstract: High field-effect mobility is provided for a semiconductor device including an oxide semiconductor. Further, a highly reliable semiconductor device including the transistor is provided. In a transistor in which a stack of oxide semiconductor layers is provided over a gate electrode layer with a gate insulating layer provided therebetween, an oxide semiconductor layer functioning as a current path (channel) of the transistor and containing an n-type impurity is sandwiched between oxide semiconductor layers having lower conductivity than the oxide semiconductor layer. In the oxide semiconductor layer functioning as the channel, a region on the gate insulating layer side contains the n-type impurity at a higher concentration than a region on the back channel side. With such a structure, the channel can be separated from the interface between the oxide semiconductor stack and the insulating layer in contact with the oxide semiconductor stack, so that a buried channel can be formed.
    Type: Grant
    Filed: June 18, 2013
    Date of Patent: February 10, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventor: Shunpei Yamazaki
  • Publication number: 20150028333
    Abstract: A metal matrix composite having high corrosion resistance even if the coating film deposit amount is low is obtained. A metal matrix composite includes a metal or alloy substrate coated with a molten transition metal oxide glass, wherein the transition metal oxide glass has an n-type polarity. Further, a method for producing a metal matrix composite includes a step of applying a paste containing a transition metal oxide glass, an organic binder, and an organic solvent onto the surface of a metal or alloy substrate, and a step of forming a glass coating film on the substrate by heating to and maintaining a temperature equal to or higher than the softening point of the transition metal oxide glass after the application step, wherein the transition metal oxide glass has an n-type polarity.
    Type: Application
    Filed: January 15, 2013
    Publication date: January 29, 2015
    Applicant: HITACHI, LTD.
    Inventors: Tadashi Fujieda, Takashi Naito, Takuya Aoyagi, Yuichi Sawai
  • Publication number: 20150027521
    Abstract: A method for forming a photovoltaic device includes forming a photovoltaic absorption stack on a substrate including one or more of I-III-VI2 and I2-II-IV-VI4 semiconductor material. A transparent conductive contact layer is deposited on the photovoltaic absorption stack at a temperature less than 200 degrees Celsius. The transparent conductive contact layer has a thickness of about one micron and is formed on a front light-receiving surface. The surface includes pyramidal structures due to an as deposited thickness. The transparent conductive contact layer is wet etched to further roughen the front light-receiving surface to reduce reflectance.
    Type: Application
    Filed: July 23, 2013
    Publication date: January 29, 2015
    Applicant: International Business Machines Corporation
    Inventors: Keith E. Fogel, Jeehwan Kim, David B. Mitzi, Mark T. Winkler
  • Patent number: 8940566
    Abstract: The semiconductor device (100) according to the present invention includes a gate electrode (102) of a TFT, a gate insulating layer (103) formed on the gate electrode (102), an oxide semiconductor layer (107) disposed on the gate insulating layer (103), a protecting layer (108) formed on the oxide semiconductor layer (107) by a spin-on-glass technique, and a source electrode (105) and a drain electrode (106) disposed on the protecting layer (108). Via a first contact hole (131) formed in the protecting layer (108), the source electrode (105) is electrically connected to the oxide semiconductor layer (104), and via a second contact hole (132), the drain electrode (106) is electrically connected to the oxide semiconductor layer (104).
    Type: Grant
    Filed: November 1, 2011
    Date of Patent: January 27, 2015
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Okifumi Nakagawa, Yoshimasa Chikama, Takeshi Hara, Hiromitsu Katsui
  • Patent number: 8936963
    Abstract: If an oxide semiconductor layer is crystallized by heat treatment without being covered with an inorganic insulating film, surface unevenness and the like are formed due to the crystallization, which may cause variation in electrical characteristics. Steps are performed in the following order: a second insulating film is formed on an oxide semiconductor layer over a substrate and then heat treatment is performed, instead of performing heat treatment during a period immediately after formation of the oxide semiconductor layer and immediately before formation of an inorganic insulating film including silicon oxide on the oxide semiconductor layer. The density of hydrogen included in the inorganic insulating film including silicon oxide is 5×1020/cm3 or more, and the density of nitrogen is 1×1019/cm3 or more.
    Type: Grant
    Filed: March 9, 2010
    Date of Patent: January 20, 2015
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Hiroki Ohara, Toshinari Sasaki
  • Publication number: 20150011041
    Abstract: A circuit layer is formed on a surface of a substrate and includes a transistor. A photoelectric conversion element includes a photoelectric conversion layer of a chalcopyrite-type semiconductor provided between a first electrode and a second electrode. A supply layer is formed between the circuit layer and the photoelectric conversion layer and contains an Ia group element. Diffusion of the Ia group element to the photoelectric conversion layer improves the photoelectric conversion efficiency. A protective layer is formed between the supply layer and the circuit layer and prevents the diffusion of the Ia group element to the circuit layer.
    Type: Application
    Filed: September 22, 2014
    Publication date: January 8, 2015
    Inventor: Manabu KUDO
  • Patent number: 8927324
    Abstract: A method for the production of a wafer-based, back-contacted heterojunction solar cell includes providing at least one absorber wafer. Metallic contacts are deposited as at least one of point contacts and strip contacts in a predetermined distribution on a back side of the at least one absorber wafer. The contacts have steep flanks that are higher than a cumulative layer thickness of an emitter layer and an emitter contact layer and are sheathed with an insulating sheath. The emitter layer is deposited over an entire surface of the back side of the at least one absorber wafer. The emitter contact layer is deposited over an entire surface of the emitter layer so as to form an emitter contact system. At least one of the emitter layer and the emitter contact layer is selectively removed so as to expose the steep flanks of the contacts that are covered with the insulating sheath.
    Type: Grant
    Filed: October 10, 2009
    Date of Patent: January 6, 2015
    Assignee: Helmholtz-Zentrum Berlin Fuer Materialien und Energie GmbH
    Inventor: Rolf Stangl
  • Patent number: 8927322
    Abstract: The present disclosure is directed to methods of forming different types of Cu2ZnSnS4 (CZTS) solar cells and Copper Indium Gallium DiSelenide (CIGS) solar cells that can be combinatorially varied and evaluated. These methodologies all incorporate the formation of site-isolated regions using a combinatorial processing tool and the use of these site-isolated regions to form the solar cell area. Therefore, multiple solar cells may be rapidly formed on a single substrate for use in combinatorial methodologies. Any of the individual processes of the methods described may be varied combinatorially to test varied process conditions or materials.
    Type: Grant
    Filed: May 3, 2011
    Date of Patent: January 6, 2015
    Assignee: Intermolecular, Inc.
    Inventors: Upendra Avachat, Tony Chiang, Craig Hunter, Jian Li, Guizhen Zhang
  • Patent number: 8921691
    Abstract: There is provided a solar cell in which a lower electrode layer, a photoelectric conversion layer having a chalcopyrite structure that includes a Group Ib element, a Group IIIb element, and a Group VIb element, and an upper electrode layer are sequentially formed on top of a substrate, wherein the solar cell is provided with a silicate layer between the substrate and the lower electrode layer.
    Type: Grant
    Filed: March 19, 2009
    Date of Patent: December 30, 2014
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Shogo Ishizuka, Shigeru Niki, Nobuaki Kido, Hiroyuki Honmoto
  • Patent number: 8907205
    Abstract: A solar cell comprising a semiconductor solar cell of a first band gap; a buffer layer formed on a surface of the semiconductor solar cell; and at least one layer of a multiferroic or a ferroelectric material formed on the buffer layer; wherein the at least one layer of a multiferroic or a ferroelectric material has a second bang gap, the first band gap being smaller than the second band gap.
    Type: Grant
    Filed: June 16, 2011
    Date of Patent: December 9, 2014
    Assignee: Institut National de la Recherche Scientifique (INRS)
    Inventors: Riad Nechache, Andreas Ruediger, Federico Rosei
  • Patent number: 8906732
    Abstract: A method for fabricating a thin film photovoltaic device is provided. The method includes providing a substrate comprising a surface region made of a thin-film photovoltaic absorber including copper, indium, gallium, selenium, and sulfur species. Additionally, the method includes applying a dip-in chemical bath deposition process for forming a buffer layer containing at least zinc-ogygen-sulfide material but substantially free of cadmium species. Furthermore, the method includes producing a chemical bath including steps of heating a bath of water to about 75° C., adding aqueous ammonia to mix with the bath of water, adding a solution of sodium hydroxide, adding zinc salt solution, and adding a solution of thiourea. The dip-in chemical bath deposition process includes immersing a plurality of substrates formed with the thin-film photovoltaic absorber substantially vertically in the chemical bath for 30 minutes to form the zinc-oxygen-sulfide buffer layer followed by a cleaning and drying process.
    Type: Grant
    Filed: January 14, 2014
    Date of Patent: December 9, 2014
    Assignee: Stion Corporation
    Inventors: Robert D. Wieting, Jason Todd Jackson
  • Patent number: 8907334
    Abstract: Disclosed is an oxide for a semiconductor layer of a thin-film transistor, said oxide being excellent in the switching characteristics of a thin-film transistor, specifically enabling favorable characteristics to be stably obtained even in a region of which the ZnO concentration is high and even after forming a passivation layer and after applying stress. The oxide is used in a semiconductor layer of a thin-film transistor, and the aforementioned oxide contains Zn and Sn, and further contains at least one element selected from group X consisting of Al, Hf, Ta, Ti, Nb, Mg, Ga, and the rare-earth elements.
    Type: Grant
    Filed: April 18, 2011
    Date of Patent: December 9, 2014
    Assignees: Kobe Steel, Ltd., Samsung Display Co., Ltd.
    Inventors: Aya Miki, Yumi Iwanari, Toshihiro Kugimiya, Shinya Morita, Yasuaki Terao, Satoshi Yasuno, Jae Woo Park, Je Hun Lee, Byung Du Ahn
  • Patent number: 8900914
    Abstract: A method of manufacturing a TFT substrate includes: forming a gate electrode (12) and a gate insulating film (30) on a substrate (8); forming a source electrode (14) and a drain electrode (15) at a gap from each other on the gate insulating film (30), and forming a drain connection part (16); forming, after the step of forming the source electrode and the drain electrode, an oxide semiconductor layer (18, 18a, 18b) that contains a channel portion connecting the source electrode (14) to the drain electrode (15) and that contains an additional portion (18a) covering the drain connection part (16); oxidizing a surface of the oxide semiconductor layer (18, 18a, 18b); forming a contact hole (22) in an insulating film (32) that covers the oxide semiconductor layer; removing a portion of the additional portion (18a) of the oxide semiconductor layer that is located inside the contact hole (22); and forming a conductive layer (20) that electrically connects the drain connection part (16) that has been exposed.
    Type: Grant
    Filed: May 29, 2012
    Date of Patent: December 2, 2014
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Yudai Takanishi, Masao Moriguchi, Yohsuke Kanzaki, Takatsugu Kusumi
  • Patent number: 8894826
    Abstract: A method and apparatus for forming a thin film of a copper indium gallium selenide (CIGS)-type material are disclosed. The method includes providing first and second targets in a common sputtering chamber. The first target includes a source of CIGS material, such as an approximately stoichiometric polycrystalline CIGS material, and the second target includes a chalcogen, such as selenium, sulfur, tellurium, or a combination of these elements. The second target provides an excess of chalcogen in the chamber. This can compensate, at least in part, for the loss of chalcogen from the CIGS-source in the first target, resulting in a thin film with a controlled stoichiometry which provides effective light absorption when used in a solar cell.
    Type: Grant
    Filed: September 17, 2010
    Date of Patent: November 25, 2014
    Inventors: Jesse A. Frantz, Jasbinder S. Sanghera, Robel Y. Bekele, Vinh Q Nguyen, Ishwar D. Aggarwal, Allan J. Bruce, Michael Cyrus, Sergey V. Frolov
  • Patent number: 8889468
    Abstract: A tandem photovoltaic cell. The tandem photovoltaic cell includes a bifacial top cell and a bottom cell. The top bifacial cell includes a top first transparent conductive oxide material. A top window material underlies the top first transparent conductive oxide material. A first interface region is disposed between the top window material and the top first transparent conductive oxide material. The first interface region is substantially free from one or more entities from the top first transparent conductive oxide material diffused into the top window material. A top absorber material comprising a copper species, an indium species, and a sulfur species underlies the top window material. A top second transparent conductive oxide material underlies the top absorber material. A second interface region is disposed between the top second transparent conductive oxide material and the top absorber material. The bottom cell includes a bottom first transparent conductive oxide material.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: November 18, 2014
    Assignee: Stion Corporation
    Inventor: Howard W. H. Lee
  • Patent number: 8890140
    Abstract: A radiation-emitting component includes a semiconductor chip and a conversion element. The semiconductor chip includes an active layer suitable for generating electromagnetic radiation and a radiation exit face. The conversion element includes a matrix material and a luminescent material. The conversion element is arranged downstream of the radiation exit face of the semiconductor chip. The matrix material comprises at least 40 wt. % tellurium oxide and is free of boron trioxide and/or germanium oxide. A method for producing such a radiation-emitting component is furthermore stated.
    Type: Grant
    Filed: February 25, 2011
    Date of Patent: November 18, 2014
    Assignees: OSRAM OPTO Semiconductor GmbH, OSRAM AG
    Inventors: Angela Eberhardt, Joachim Wirth-Schoen, Ewald Poesl
  • Patent number: 8889466
    Abstract: A method for forming a photovoltaic device includes forming an absorber layer with a granular structure on a conductive layer; conformally depositing an insulating protection layer over the absorber layer to fill in between grains of the absorber layer; and planarizing the protection layer and the absorber layer. A buffer layer is formed on the absorber layer, and a top transparent conductor layer is deposited over the buffer layer.
    Type: Grant
    Filed: April 12, 2013
    Date of Patent: November 18, 2014
    Assignee: International Business Machines Corporation
    Inventors: Talia S. Gershon, Supratik Guha, Jeehwan Kim, Mahadevaiyer Krishnan, Byungha Shin
  • Patent number: 8889478
    Abstract: Provided is a method for manufacturing a variable resistance nonvolatile semiconductor memory element, and a nonvolatile semiconductor memory element which make it possible to operate at a low voltage and high speed when initial breakdown is caused, and exhibit favorable diode element characteristics. The method for manufacturing the nonvolatile semiconductor memory element includes, after forming a top electrode of a variable resistance element and at least before forming a top electrode of an MSM diode element, oxidizing to insulate a portion of a variable resistance film in a region around an end face of a variable resistance layer.
    Type: Grant
    Filed: November 18, 2011
    Date of Patent: November 18, 2014
    Assignee: Panasonic Corporation
    Inventors: Takumi Mikawa, Yukio Hayakawa, Yoshio Kawashima, Takeki Ninomiya
  • Publication number: 20140332079
    Abstract: The present invention provides a porous semiconductor electrode passivated by way of a layer applied by an atomic layer deposition (ALD) process. The semiconductor electrode can be advantageously used in dye-sensitized solar cells (DSCs) having increase open current voltages (Voc). By selecting the thickness and the material of the passivating or blocking layer, high Voc without substantial reduction of short circuit current (JSC) is achieved, thereby resulting in devices exhibiting excellent power conversion efficiencies.
    Type: Application
    Filed: December 8, 2011
    Publication date: November 13, 2014
    Inventors: Aravind Kumar Chandiran, Mohammad Khaja Nazeeruddin, Michael Graetzel
  • Publication number: 20140326311
    Abstract: A metal-chalcogenide photovoltaic device includes a first electrode, a window layer spaced apart from the first electrode, and a photon-absorption layer between the first electrode and the window layer. The photon-absorption layer includes a metal-chalcogenide semiconductor. The window layer includes a layer of metal-oxide nanoparticles, and at least a portion of the window layer provides a second electrode that is substantially transparent to light within a range of operating wavelengths of the metal-chalcogenide photovoltaic device. A method of producing a metal-chalcogenide photovoltaic device includes providing a photovoltaic substructure, providing a solution of metal-oxide nanoparticles, and forming a window layer on the substructure using the solution of metal-oxide nanoparticles such that the window layer includes a layer of metal-oxide nanoparticles formed by a solution process.
    Type: Application
    Filed: January 14, 2013
    Publication date: November 6, 2014
    Applicant: The Regents of the University of California
    Inventors: Yang Yang, Huanping Zhou, Bao Lei, Choong-Heui Chung, Brion P. Bob
  • Patent number: 8877542
    Abstract: Disclosed are a nanostructure array substrate, a method for fabricating the same, and a dye-sensitized solar cell by using the same. The nanostructure array substrate includes a plurality of metal oxide nanostructures vertically aligned on the substrate while being separated from each other. The metal oxide nanostructures include nanorods having a ZnO core/TiO2 shell structure or TiO2 nanotubes. The method includes the steps of forming ZnO nanorods vertically aligned from a seed layer formed on a substrate; and coating a TiO2 sol on the ZnO nanorods and sintering the ZnO nanorods to form nanorods having a ZnO core/TiO2 shell structure. The transparency and flexibility of the substrate are ensured. The photoelectric conversion efficiency of the solar cell is improved if the nanostructure array substrate is employed in the photo electrode of the dye-sensitized solar cell.
    Type: Grant
    Filed: December 14, 2011
    Date of Patent: November 4, 2014
    Assignee: Gwangju Institute of Science and Technology
    Inventors: Gun Young Jung, Hui Song, Ki Seok Kim
  • Publication number: 20140319519
    Abstract: An oxide semiconductor layer in which “safe” traps exist exhibits two kinds of modes in photoresponse characteristics. By using the oxide semiconductor layer, a transistor in which light deterioration is suppressed to the minimum and the electric characteristics are stable can be achieved. The oxide semiconductor layer exhibiting two kinds of modes in photoresponse characteristics has a photoelectric current value of 1 pA to 10 nA inclusive. When the average time ?1 until which carriers are captured by the “safe” traps is large enough, there are two kinds of modes in photoresponse characteristics, that is, a region where the current value falls rapidly and a region where the current value falls gradually, in the result of a change in photoelectric current over time.
    Type: Application
    Filed: July 14, 2014
    Publication date: October 30, 2014
    Inventors: Takayuki Inoue, Masashi Tsubuku, Suzunosuke Hiraishi, Junichiro Sakata, Erumu Kikuchi, Hiromichi Godo, Akiharu Miyanaga, Shunpei Yamazaki