Cleaning Of Reaction Chamber Patents (Class 438/905)
  • Patent number: 11817313
    Abstract: Exemplary deposition methods may include forming a plasma of a silicon-containing precursor and at least one additional precursor within a processing region of a semiconductor processing chamber. The processing region may house a semiconductor substrate on a substrate support. The methods may include depositing material on the semiconductor substrate to a target thickness. The methods may include halting delivery of the silicon-containing precursor while maintaining the plasma with the one or more precursors. The methods may include purging the processing region of the semiconductor processing chamber.
    Type: Grant
    Filed: February 5, 2020
    Date of Patent: November 14, 2023
    Assignee: Applied Materials, Inc.
    Inventors: Madhu Santosh Kumar Mutyala, Sanjay Kamath, Deenesh Padhi
  • Patent number: 11666989
    Abstract: Provided is a laser crystallizing apparatus including a laser generator generating a laser beam and an optical system photo-converting the laser beam to make a converted laser beam. A beam transmitting unit includes a passage through which the converted laser beam is transmitted into the chamber. The beam transmitting unit includes a chamber window provided on the chamber to transmit the laser beam, and a shield window movably disposed below the chamber window to prevent a material generated in the chamber from reaching the chamber window.
    Type: Grant
    Filed: April 7, 2020
    Date of Patent: June 6, 2023
    Assignee: SAMSUNG DISPLAY CO., LTD.
    Inventors: Hong Ro Lee, Chung Hwan Lee
  • Patent number: 11660563
    Abstract: An apparatus for collecting a by-product, includes: a chamber provided with a gas inlet and a gas outlet and having an internal space; a heater disposed on the gas inlet side of the internal space within the chamber and varying a heating temperature in time series; a vortex forming member disposed around the heater; a plurality of first collecting members disposed below the heater; a second collecting member disposed below the first collecting member so that a plurality of second collecting members intersect each other; and a third collecting member disposed on the gas outlet side of the internal space within the chamber.
    Type: Grant
    Filed: July 20, 2021
    Date of Patent: May 30, 2023
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Seoyoung Maeng, Iljun Jeon, Suji Gim, Youngseok Roh, Jongyong Bae, Jungjoon Pyeon
  • Patent number: 8916056
    Abstract: A plasma processing apparatus includes a process chamber housing defining a process chamber, a platen positioned in the process chamber for supporting a workpiece, a source configured to generate plasma in the process chamber, and a biasing system. The biasing system is configured to bias the platen to attract ions from the plasma towards the workpiece during a first processing time interval and configured to bias the platen to repel ions from the platen towards interior surfaces of the process chamber housing during a cleaning time interval. The cleaning time interval is separate from the first processing time interval and occurring after the first processing time interval.
    Type: Grant
    Filed: October 11, 2012
    Date of Patent: December 23, 2014
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Bon-Woong Koo, Richard M. White
  • Patent number: 8910644
    Abstract: Embodiments of the invention generally relate to apparatus and methods for cleaning chamber components using a cleaning plate. The cleaning plate is adapted to be positioned on a substrate support during a cleaning process, and includes a plurality of turbulence-inducing structures. The turbulence-inducing structures induce a turbulent flow of cleaning gas while the cleaning plate is rotated during a cleaning process. The cleaning plate increases the retention time of the cleaning gas near the showerhead during cleaning. Additionally, the cleaning plate reduces concentration gradients within the cleaning plate to provide a more effective clean. The method includes positioning a cleaning plate adjacent to a showerhead, and introducing cleaning gas to the space between the showerhead and the cleaning plate. A material deposited on the surface of the showerhead is then heated and vaporized in the presence of the cleaning gas, and then exhausted from the processing chamber.
    Type: Grant
    Filed: March 4, 2011
    Date of Patent: December 16, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Hua Chung, Xizi Dong, Kyawwin Jason Maung, Hiroji Hanawa, Sang Won Kang, David H. Quach, Donald J. K. Olgado, David Bour, Wei-Yung Hsu, Alexander Tam, Anzhong Chang, Sumedh Acharya
  • Patent number: 8911559
    Abstract: A method for cleaning an etching chamber is disclosed. The method comprises providing an etching chamber; introducing a first gas comprising an inert gas into the etching chamber for a first period of time; and transporting a first wafer into the etching chamber after the first period of time, wherein the first wafer undergoes an etching process.
    Type: Grant
    Filed: May 8, 2009
    Date of Patent: December 16, 2014
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Yu Chao Lin, Ryan Chia-Jen Chen, Yih-Ann Lin, Jr Jung Lin
  • Patent number: 8895457
    Abstract: To provide a method of manufacturing a semiconductor device, including: forming a thin film different from a silicon oxide film on a substrate by supplying a processing gas into a processing vessel in which the substrate is housed; removing a deposit including the thin film adhered to an inside of the processing vessel by supplying a fluorine-containing gas into the processing vessel after executing forming the thin film prescribed number of times; and forming a silicon oxide film having a prescribed film thickness on the inside of the processing vessel by alternately supplying a silicon-containing gas, and an oxygen-containing gas and a hydrogen-containing gas into the heated processing vessel in which a pressure is set to be less than an atmospheric pressure after removing the deposit.
    Type: Grant
    Filed: February 18, 2011
    Date of Patent: November 25, 2014
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Naonori Akae, Kotaro Murakami, Yoshiro Hirose, Kenji Kameda
  • Patent number: 8889090
    Abstract: There are provided methods capable of easily and efficiently recovering and recycling ammonia from exhaust gas containing a small amount of ammonia, the exhaust gas being exhausted from a production process of a gallium nitride compound semiconductor. The method of recovering ammonia includes filtering exhaust gas containing ammonia, hydrogen, nitrogen, and a solid compound with a filter to remove the solid compound from the exhaust gas; pressurizing and cooling the filtered exhaust gas with a heat pump to liquefy ammonia contained in the filtered exhaust gas; and separating liquefied ammonia from hydrogen and nitrogen to recover liquefied ammonia. The method of recycling ammonia includes evaporating recovered liquid ammonia; mixing the evaporated ammonia with another crude ammonia to obtain mixed gas; purifying the mixed gas; and supplying the purified gas to the production process of a gallium nitride compound semiconductor.
    Type: Grant
    Filed: May 24, 2013
    Date of Patent: November 18, 2014
    Assignee: Japan Pionics Co., Ltd.
    Inventors: Kansei Izaki, Masanori Iwaki, Toshio Akiyama
  • Patent number: 8877553
    Abstract: The present invention generally comprises a floating slit valve for interfacing with a chamber. A floating slit valve moves or “floats” relative to another object such as a chamber. The slit valve may be coupled between two chambers. When a chamber coupled with the slit valve is heated, the slit valve may also be heated by conduction. As the slit valve is heated, it may thermally expand. When a vacuum is drawn in a chamber, the slit valve may deform due to vacuum deflection. By disposing a low friction material spacer between the chamber and the slit valve, the slit valve may not rub against the chamber during thermal expansion/contraction and/or vacuum deflection and thus, may not generate undesirable particle contaminants. Additionally, slots drilled through the chamber for coupling the slit valve to the chamber may be sized to accommodate thermal expansion/contraction and vacuum deflection of the slit valve.
    Type: Grant
    Filed: August 1, 2011
    Date of Patent: November 4, 2014
    Assignee: Applied Materials, Inc.
    Inventors: John M. White, Shinichi Kurita, Takayuki Matsumoto
  • Patent number: 8821643
    Abstract: A method of cleaning a chamber used for annealing doped wafer substrates. In one embodiment the method provides removing dopants deposited in an annealing chamber after an annealing process of a doped substrate by flowing one or more volatilizing gases into the annealing chamber, applying heat to volatilize the deposited dopants in the annealing chamber, and exhausting the chamber to remove volatilized dopants from the annealing chamber.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: September 2, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Balasubramanian Ramachandran, Tae Jung Kim, Jung Hoon Sun, Joung Woo Lee, Hwa Joong Lim, Sang Phil Lee, Joseph M. Ranish
  • Patent number: 8815017
    Abstract: A method of manufacturing a semiconductor device includes: holding a semiconductor substrate with a surface inclined with respect to the vertical direction and the horizontal direction; and immersing the semiconductor substrate in a cleaning solution including an acid.
    Type: Grant
    Filed: July 26, 2013
    Date of Patent: August 26, 2014
    Assignee: Fujitsu Limited
    Inventors: Shirou Ozaki, Masayuki Takeda, Norikazu Nakamura, Junichi Kon
  • Patent number: 8798778
    Abstract: A cluster tool may be operated on the basis of an enhanced sequencing regime in which the supply of substrates is controlled such that a planned time of maintenance is reached for two or more process chambers simultaneously. Consequently, the occurrence of non-correlated sequential down times of various process chambers may be significantly reduced, thereby enhancing throughput and availability of complex cluster tools.
    Type: Grant
    Filed: December 21, 2009
    Date of Patent: August 5, 2014
    Assignee: Advanced Micro Devices, Inc.
    Inventor: Kilian Schmidt
  • Patent number: 8789744
    Abstract: Reflow solderable, surface mount LED optic mounting devices are provided. Embodiments that include turnings (e.g., made on a swiss turning machine) and stampings (e.g., made with a progressive die) are provided. The LED optic mounting devices are suitably positioned by the same pick-and-place machine that is used to mount LED on planar surface with circuitry and solder pads and are attached to the solder pads by soldering.
    Type: Grant
    Filed: October 16, 2011
    Date of Patent: July 29, 2014
    Inventor: Philip Premysler
  • Patent number: 8784676
    Abstract: A method for reducing contamination in an etch chamber is provided. A substrate with a metal containing layer is placed in the etch chamber. The metal containing layer is etched, producing nonvolatile metal residue deposits on surfaces of the etch chamber, wherein some of the metal residue of the metal residue deposits is in a first state. The substrate is removed from the etch chamber. The chamber is conditioned by converting metal residue in the first state to metal residue in a second state, where metal residue in the second state has stronger adhesion to surfaces of the etch chamber than metal residue in the first state.
    Type: Grant
    Filed: February 3, 2012
    Date of Patent: July 22, 2014
    Assignee: Lam Research Corporation
    Inventors: Joydeep Guha, Sanket Sant, Butsurin Jinnai
  • Patent number: 8721798
    Abstract: Methods for processing substrates in twin chamber processing systems having first and second process chambers and shared processing resources are provided herein. In some embodiments, a method may include providing a substrate to the first process chamber of the twin chamber processing system, wherein the first process chamber has a first processing volume that is independent from a second processing volume of the second process chamber; providing one or more processing resources from the shared processing resources to only the first processing volume of the first process chamber; and performing a process on the substrate in the first process chamber.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: May 13, 2014
    Assignee: Applied Materials, Inc.
    Inventors: James P. Cruse, Dermot Cantwell, Ming Xu, Charles Hardy, Benjamin Schwarz, Kenneth S. Collins, Andrew Nguyen, Zhifeng Sui, Evans Lee
  • Patent number: 8719993
    Abstract: Semiconductor equipment is provided to include a reaction chamber, a movable frame, and at least one cleaning brush head. The cleaning brush head is configured to operate on at least one dirty portion to be cleaned within the reaction chamber. The movable frame is disposed within the reaction chamber. The movable frame is capable of carrying a susceptor. The cleaning brush head is capable of touching the dirty portion. The cleaning brush head is capable of moving relative to the dirty portion for removing the residue which is attached to the portion to be cleaned.
    Type: Grant
    Filed: April 3, 2013
    Date of Patent: May 13, 2014
    Assignee: Hermes-Epitek Corporation
    Inventors: Chien-Ping Huang, Tsan-Hua Huang, Tsung-Hsun Han
  • Patent number: 8696921
    Abstract: In a method of manufacturing a semiconductor device, a substrate is loaded to a process chamber having, unit process sections in which unit processes are performed, respectively. The unit processes are performed on the substrate independently from one another at the unit process sections under a respective process pressure. The substrate sequentially undergoes the unit processes at the respective unit process section of the process chamber. Cleaning processes are individually performed to the unit process sections, respectively, when the substrate is transferred from each of the unit process sections and no substrate is positioned at the unit process sections. Accordingly, the process defects of the process units may be sufficiently prevented and the operation period of the manufacturing apparatus is sufficiently elongated.
    Type: Grant
    Filed: January 15, 2010
    Date of Patent: April 15, 2014
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jin-Ho Park, Gil-Heyun Choi, Byung-Lyul Park, Jong-Myeong Lee, Zung-Sun Choi, Hye-Kyung Jung
  • Patent number: 8657961
    Abstract: Embodiments of the invention generally provide methods for cleaning a UV processing chamber. In one embodiment, the method includes flowing an oxygen-containing gas through a plurality of passages formed in a UV transparent gas distribution showerhead and into a processing region located between the UV transparent gas distribution showerhead and a substrate support disposed within the thermal processing chamber, exposing the oxygen-containing gas to UV radiation under a pressure scheme comprising a low pressure stage and a high pressure stage to generate reactive oxygen radicals, and removing unwanted residues or deposition build-up from exposed surfaces of chamber components presented in the thermal processing chamber using the reactive oxygen radicals.
    Type: Grant
    Filed: April 4, 2013
    Date of Patent: February 25, 2014
    Assignee: Applied Materials, Inc.
    Inventors: Bo Xie, Alexandros T. Demos, Scott A. Hendrickson, Sanjeev Baluja, Juan Carlos Rocha-Alvarez
  • Patent number: 8657942
    Abstract: A trap device includes means for separating a liquid compound from a waste stream exhaust from a process chamber, means for collecting the liquid compound separated from the waste stream, means for selectively isolating the collected liquid compound from the waste stream, and means for evaporating the collected liquid compound to return the compound in gaseous form to the waste stream. This can enable a volatile liquid to be collected at a defined location, isolated from the waste stream, and, when so desired, returned to the waste stream in the form of a gas for subsequent abatement.
    Type: Grant
    Filed: March 9, 2006
    Date of Patent: February 25, 2014
    Assignee: Edwards Limited
    Inventors: Christopher John Shaw, Graeme Huntley, Andrew James Seeley
  • Patent number: 8647442
    Abstract: A cleaning substrate that can prevent a decrease in the operating rate of a substrate processing apparatus. The cleaning substrate that cleans the interior of a chamber in the substrate processing apparatus has a removal mechanism that removes foreign matter in the chamber.
    Type: Grant
    Filed: April 24, 2012
    Date of Patent: February 11, 2014
    Assignee: Tokyo Electron Limited
    Inventors: Yohei Yamazawa, Hiroshi Nagaike, Masashi Saito, Masanobu Honda
  • Patent number: 8597401
    Abstract: An exhausting method includes determining an exhaust flow rate of a process gas to be a predetermined value that is less than or equal to a gas flow rate corresponding to a maximum process capability of a purification system when the process gas is diluted to a lower explosive limit; calculating a pressure drop amount per unit time to maintain the determined exhaust flow rate of the process gas, based on a relation between the exhaust flow rate and the pressure drop amount per unit time; and evacuating an inside of the chamber to maintain the determined exhaust flow rate, while controlling the pressure through an automatic pressure control valve by setting a target pressure value to be updated as a control value of the automatic pressure control valve at every predetermined time interval so as to achieve a calculated pressure drop amount per unit time.
    Type: Grant
    Filed: August 8, 2011
    Date of Patent: December 3, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Norihiko Amikura, Risako Miyoshi
  • Patent number: 8591659
    Abstract: Improved methods and apparatuses for removing residue from the interior surfaces of the deposition reactor are provided. The methods involve increasing availability of cleaning reagent radicals inside the deposition chamber by generating cleaning reagent radicals in a remote plasma generator and then further delivering in-situ plasma energy while the cleaning reagent mixture is introduced into the deposition chamber. Certain embodiments involve a multi-stage process including a stage in which the cleaning reagent mixture is introduced at a high pressure (e.g., about 0.6 Torr or more) and a stage the cleaning reagent mixture is introduced at a low pressure (e.g., about 0.6 Torr or less).
    Type: Grant
    Filed: January 16, 2009
    Date of Patent: November 26, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Zhiyuan Fang, Pramod Subramonium, Jon Henri, Keith Fox
  • Patent number: 8591752
    Abstract: A method for plasma-etching a magnetic film and plasma-cleaning, in which deposits in an etching processing chamber are efficiently removed while corrosion of a wafer is suppressed, is provided. A plasma processing method for plasma-etching a to-be-processed substrate having a magnetic film in an etching processing chamber includes the steps of plasma-etching the magnetic film using a first gas not containing chlorine, transferring out the to-be-processed substrate from the etching processing chamber, first plasma-cleaning of the etching processing chamber using a second gas containing chlorine, and second plasma-cleaning using a third gas containing hydrogen after the first plasma cleaning.
    Type: Grant
    Filed: February 17, 2012
    Date of Patent: November 26, 2013
    Assignee: Hitachi High Technologies Corporation
    Inventors: Takahiro Abe, Takeshi Shimada, Atsushi Yoshida, Kentaro Yamada, Daisuke Fujita
  • Patent number: 8591809
    Abstract: A substrate transfer container comprises a housing including a plurality of substrate slots positioned within a gas chamber having an interior environment. Each substrate slot accommodates a substrate undergoing a substrate manufacturing process, the interior environment of the gas chamber being selectively sealed from an exterior environment. A detection unit at the housing is constructed and arranged to detect an environmental property of the interior environment of the gas chamber, and to generate a detection signal in response. A signal transmission module at the housing is configured to wirelessly transmit a detection signal received from the detection unit.
    Type: Grant
    Filed: March 15, 2011
    Date of Patent: November 26, 2013
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Byung-Koog Ra, Tae-Sik Yun, Kunhyung Lee, Hyunjoon Kim, Hyeogki Kim, KiDoo Kim
  • Patent number: 8562751
    Abstract: A dry cleaning method of a substrate processing apparatus includes forming a metal oxide by oxidizing a metal film adhered to the inside of a processing chamber of the substrate processing apparatus; forming a complex by reacting the metal oxide with ?-diketone; and sublimating the complex to be removed. A cleaning gas containing oxygen and ?-diketone is supplied into the processing chamber while heating the inside of the processing chamber. A flow rate ratio of oxygen to ?-diketone in the cleaning gas is set such that a formation rate of the metal oxide is lower than a formation rate of the complex.
    Type: Grant
    Filed: January 17, 2012
    Date of Patent: October 22, 2013
    Assignees: Tokyo Electron Limited, Central Glass Company, Limited
    Inventors: Isao Gunji, Yusaku Izawa, Hitoshi Itoh, Tomonori Umezaki, Yuta Takeda, Isamu Mori
  • Patent number: 8541307
    Abstract: A treatment method for reducing particles in a Dual Damascene Silicon Nitride (DDSN) process, including the following steps: forming a seed layer of copper on a silicon wafer; depositing a deposition layer of copper to cover the seed layer of copper; planarizing the deposition layer of copper; providing the silicon wafer into a reaction chamber and performing a pre-treatment on a surface of the deposition layer of copper using NH3 gas under a plasma condition so as to reduce copper oxide (CuO) to copper (Cu) formed on the deposition layer of copper; in the reaction chamber, generating an etching block layer on the deposition layer of copper using a DDSN deposition process; cleaning the reaction chamber using NF3 gas; and directing N2O gas into the reaction chamber and removing the remaining hydrogen (H) and fluorine (F) in the reaction chamber using the N2O gas under the plasma condition.
    Type: Grant
    Filed: December 29, 2011
    Date of Patent: September 24, 2013
    Assignee: Shanghai Huali Microelectronics Corporation
    Inventors: Meimei Gu, Duoyuan Hou, Jun Xu, Ke Wang
  • Patent number: 8536073
    Abstract: Hardmask films having high hardness and low stress are provided. In some embodiments a film has a stress of between about ?600 MPa and 600 MPa and hardness of at least about 12 GPa. In some embodiments, a hardmask film is prepared by depositing multiple sub-layers of doped or undoped silicon carbide using multiple densifying plasma post-treatments in a PECVD process chamber. In some embodiments, a hardmask film includes a high-hardness boron-containing film selected from the group consisting of SixByCz, SixByNz, SixByCzNw, BxCy, and BxNy. In some embodiments, a hardmask film includes a germanium-rich GeNx material comprising at least about 60 atomic % of germanium. These hardmasks can be used in a number of back-end and front-end processing schemes in integrated circuit fabrication.
    Type: Grant
    Filed: July 11, 2012
    Date of Patent: September 17, 2013
    Assignee: Novellus Systems, Inc.
    Inventors: Vishwanathan Rangarajan, George Andrew Antonelli, Ananda Banerji, Bart Van Schravendijk
  • Patent number: 8518774
    Abstract: Embodiments of a manufacturing process flow for producing standalone memory devices that can achieve bit cell sizes on the order of 4F2 or 5F2, and that can be applied to common source/drain, separate source/drain, or common source only or common drain only transistor arrays. Active area and word line patterns are formed as perpendicularly-arranged straight lines on a Silicon-on-Insulator substrate. The intersections of the active area and spaces between word lines define contact areas for the connection of vias and metal line layers. Insulative spacers are used to provide an etch mask pattern that allows the selective etching of contact areas as a series of linear trenches, thus facilitating straight line lithography techniques. Embodiments of the manufacturing process remove first layer metal (metal-1) islands and form elongated vias, in a succession of processing steps to build dense memory arrays.
    Type: Grant
    Filed: March 21, 2008
    Date of Patent: August 27, 2013
    Assignee: Micron Technology, Inc.
    Inventor: Pierre Fazan
  • Patent number: 8500912
    Abstract: Provided is a plasma processing method capable of removing a Ti-series deposit from the surface of a processing chamber of a plasma processing apparatus without production of a foreign matter such as a boron oxide. The plasma processing method includes carbon-series deposition discharge which succeeds product etching during which a sample containing a Ti material is processed, and during which a carbon-series film is deposited on a Ti reaction by-product deposited on the surface of the processing chamber, and chlorine-series discharge which succeeds the carbon-series deposition discharge and during which the carbon-series film and Ti that are deposited on the surface of the processing chamber are removed.
    Type: Grant
    Filed: January 19, 2011
    Date of Patent: August 6, 2013
    Assignee: Hitachi High-Technologies Corporation
    Inventor: Kousa Hirota
  • Patent number: 8496756
    Abstract: Methods for processing substrates in twin chamber processing systems having first and second process chambers and shared processing resources are provided herein. In some embodiments, a method may include flowing a process gas from a shared gas panel to a processing volume of the first process chamber and to a processing volume of the second process chamber; forming a first plasma in the first processing volume to process the first substrate and a second plasma to process the second substrate; monitoring the first processing volume and the second processing volume to determine if a process endpoint is reached in either volume; and either terminating the first and second plasma simultaneously when a first endpoint is reached; or terminating the first plasma when a first endpoint is reached in the first processing volume while continuing to provide the second plasma in the second processing volume until a second endpoint is reached.
    Type: Grant
    Filed: October 29, 2010
    Date of Patent: July 30, 2013
    Assignee: Applied Materials, Inc.
    Inventors: James P. Cruse, Dermot Cantwell, Ming Xu, Charles Hardy, Benjamin Schwarz, Kenneth S. Collins, Andrew Nguyen, Zhifeng Sui, Evans Lee
  • Patent number: 8455368
    Abstract: A method for operating one or more electronic device manufacturing systems is provided, including the steps 1) performing a series of electronic device manufacturing process steps with a process tool, wherein the process tool produces effluent as a byproduct of performing the series of process steps; 2) abating the effluent with an abatement tool; 3) supplying an abatement resource to the abatement tool from a first abatement resource supply; 4) changing an abatement resource supply from the first abatement resource supply to a second abatement resource supply, wherein changing the abatement resource supply comprises: i) interrupting a flow of the abatement resource from the first abatement resource supply; and ii) beginning a flow of the abatement resource from the second abatement resource supply; and 5) continuing to perform the series of process steps with the process tool, while changing, and after changing, the abatement resource supply.
    Type: Grant
    Filed: May 25, 2008
    Date of Patent: June 4, 2013
    Assignee: Applied Materials, Inc.
    Inventors: Phil Chandler, Daniel O. Clark, Robbert M. Vermeulen, Jay J. Jung, Roger M. Johnson, Youssef A. Loldj, James L. Smith
  • Patent number: 8452455
    Abstract: In a control device of a plasma processing system, a communication unit is configured to receive processing information related to a carrier of a next processing lot. A determination unit is configured to determine whether the processing information received by the communication unit has pre-treatment information related to one of the plasma processing devices. When it is determined that the processing information has the pre-treatment information by the determination unit, a generation unit is configured to generate an object for declaring execution of the pre-treatment for the carrier of a next processing lot if a desired condition of transferring of the carrier is satisfied. In addition, if the object is generated by the generation unit, a process executing control unit is configured to start the pre-treatment for the target object in the carrier of a next processing lot without any notification that the carrier reaches a destination plasma processing device.
    Type: Grant
    Filed: July 1, 2009
    Date of Patent: May 28, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Hiroaki Mochizuki, Masahiro Numakura
  • Patent number: 8448288
    Abstract: Semiconductor equipment is provided to include a reaction chamber, a movable frame, and at least one cleaning brush head. The cleaning brush head is configured to operate on at least one dirty portion to be cleaned within the reaction chamber. The movable frame is disposed within the reaction chamber. The movable frame is capable of carrying a susceptor. The cleaning brush head is capable of touching the dirty portion. The cleaning brush head is capable of moving relative to the dirty portion for removing the residue which is attached to the portion to be cleaned.
    Type: Grant
    Filed: March 17, 2010
    Date of Patent: May 28, 2013
    Assignee: Hermes-Epitek Corporation
    Inventors: Chien-Ping Huang, Tsan-Hua Huang, Tsung-Hsun Han
  • Patent number: 8404135
    Abstract: A method for cleaning and refurbishing a chamber component includes placing a chamber component having process deposits on an exterior surface in a plasma vapor deposition chamber. The chamber component is bombarded with a plasma comprising Argon for a period of time sufficient to remove the process deposits from the exterior surface of the chamber component.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: March 26, 2013
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Jian-Bin Chiou, Wen-Cheng Cheng, Wen-Sheng Wu
  • Patent number: 8389389
    Abstract: Provided are a semiconductor layer manufacturing method and a semiconductor manufacturing apparatus capable of forming a high quality semiconductor layer even by a single chamber system, with a shortened process time required for reducing a concentration of impurities that exist in a reaction chamber before forming the semiconductor layer. A semiconductor device manufactured using such a method and apparatus is also provided.
    Type: Grant
    Filed: December 5, 2007
    Date of Patent: March 5, 2013
    Assignee: Sharp Kabushiki Kaisha
    Inventors: Katsushi Kishimoto, Yusuke Fukuoka
  • Patent number: 8382910
    Abstract: A cleaning method for a substrate processing system capable of appropriately cleaning a housing chamber. In the substrate processing system, the number of execution times of product processing is accumulated, if the product processing to be executed next corresponds to first product processing for a subsequent lot, a time interval between preceding and subsequent lots is not longer than a predetermined time period, and a type of the last product processing performed for the preceding lot is the same as that of the first product processing to be performed for the subsequent lot. When the accumulated number of execution times is not less than a predetermined number of times, a cleaning treatment is executed, which corresponds to a chamber indicated in a system recipe set for a lot including a wafer on which the product processing is performed immediately before execution of the cleaning treatment.
    Type: Grant
    Filed: March 5, 2009
    Date of Patent: February 26, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Masahiro Numakura, Hiroaki Mochizuki, Kiyohito Iijima
  • Patent number: 8382938
    Abstract: A gate valve cleaning method that can clean a gate valve that brings an atmospheric transfer chamber and an internal pressure variable transfer chamber that transfer a substrate into communication with each other or shuts them off from each other without bringing about a decrease in the throughput of a substrate processing system. Before the gate valve brings the atmospheric transfer chamber and the internal pressure variable transfer chamber into communication with each other, the pressure in the internal pressure variable transfer chamber is increased so that the pressure in the internal pressure variable transfer chamber can become higher than the pressure in the atmospheric transfer chamber.
    Type: Grant
    Filed: September 23, 2011
    Date of Patent: February 26, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Tsuyoshi Moriya, Hiroyuki Nakayama, Keisuke Kondoh, Hiroki Oka
  • Patent number: 8364422
    Abstract: A method of presuming interior situation of process chamber that makes it possible to accurately presume the interior situation of a process chamber using the number of particles discharged from the interior of the process chamber. Characteristic values associated with respective particle removing modes of a particle removing sequence are extracted from time-series data on the number of particles discharged from the interior of the process chamber in which a substrate is accommodated and subjected to predetermined processing and to which the particle removing sequence is applied, and the relationship between the extracted characteristic values and the interior situation of the process chamber is calculated. The interior situation of the process chamber is presumed based on the calculated relationship and the characteristic values in new time-series data on the number of particles.
    Type: Grant
    Filed: May 27, 2009
    Date of Patent: January 29, 2013
    Assignee: Tokyo Electron Limited
    Inventor: Hiroyuki Nakayama
  • Patent number: 8357615
    Abstract: The present invention is an apparatus for manufacturing a semiconductor device comprising: a process vessel including a stage on which a substrate is placed, the substrate having a low dielectric constant film with a resist pattern being formed in an upper layer of the low dielectric constant film; an etching-gas supply unit that supplies an etching gas into the process vessel so as to etch the low dielectric constant film; an ashing-gas unit means that supplies an ashing gas into the process vessel so as to ash the resist pattern formed in the upper layer of the low dielectric constant film after the low dielectric constant film has been subjected to an etching process; a plasma generating means that generates a plasma by supplying an energy to the etching gas and the ashing gas in the process vessel; a unit that supplies a dipivaloylmethane gas into the process vessel, after the low dielectric constant film has been subjected to an ashing process, in order to recover a damage layer of the low dielectric con
    Type: Grant
    Filed: June 30, 2008
    Date of Patent: January 22, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Yuki Chiba, Eiichi Nishimura, Ryuichi Asako
  • Patent number: 8349401
    Abstract: A method for using a film formation apparatus includes performing a main cleaning process and a post cleaning process in this order inside a reaction chamber. The main cleaning process is arranged to supply a cleaning gas containing fluorine into the reaction chamber while exhausting gas from inside the reaction chamber, thereby etching a film formation by-product containing silicon. The post cleaning process is arranged to remove a silicon-containing fluoride generated by the main cleaning process and remaining inside the reaction chamber and to alternately repeat, a plurality of times, supplying an oxidizing gas into the reaction chamber to transform the silicon-containing fluoride into an intermediate product by oxidization, and supplying hydrogen fluoride gas into the reaction chamber while exhausting gas from inside the reaction chamber to remove the intermediate product by a reaction between the hydrogen fluoride gas and the intermediate product.
    Type: Grant
    Filed: January 8, 2010
    Date of Patent: January 8, 2013
    Assignee: Tokyo Electron Limited
    Inventors: Jun Sato, Kiyotaka Kikuchi, Hiroki Murakami, Shigeru Nakajima, Kazuhide Hasebe
  • Patent number: 8337623
    Abstract: Methods for operating a plasma processing chamber for a cleaning operation of an internal region of the plasma processing chamber are disclosed. The method is performed when a semiconductor wafer is not present in the plasma processing chamber. The plasma processing chamber has a bottom electrode assembly that includes an inner bottom electrode and an outer bottom electrode, and the inner bottom electrode and outer bottom electrode are electrically isolated by a dielectric ring. The method includes configuring the inner bottom electrode to be set at a floating potential and supplying a process gas into the plasma processing chamber. And, supplying RF power to the outer bottom electrode. The supplying of RF power to the outer bottom electrode is conducted while maintaining the inner bottom electrode at the floating potential and is isolated by the dielectric ring. The RF power produces a plasma that is generated substantially outside of the inner bottom electrode and over the outer bottom electrode.
    Type: Grant
    Filed: July 26, 2011
    Date of Patent: December 25, 2012
    Assignee: Lam Research Corporation
    Inventor: Rajinder Dhindsa
  • Patent number: 8334214
    Abstract: A susceptor treatment method including placing a first substrate on a susceptor and forming a Si film on the first substrate by epitaxial growth, placing a second substrate on the susceptor in place of the first substrate and forming a SiC film on the second substrate by epitaxial growth, and allowing HCl gas to flow downward from above the susceptor while the susceptor, from which the second substrate has been removed, is heated to a temperature and rotated to remove the remaining crystalline grains derived from the epitaxial growth of Si film and the SiC film on the susceptor.
    Type: Grant
    Filed: June 28, 2011
    Date of Patent: December 18, 2012
    Assignees: NuFlare Technology, Inc., Denso Corporation
    Inventors: Kunihiko Suzuki, Shinichi Mitani
  • Patent number: 8303719
    Abstract: A deposit removing method that can reliably remove deposit produced in plasma processing using plasma produced from a process gas containing methane gas and oxygen gas. In a chamber in which an electrode to which radio frequency electrical power is supplied is disposed, plasma processing is carried out on a substrate using the plasma produced from the process gas containing methane gas and oxygen gas, and then a cleaning step is carried out in which plasma is produced from a mixed gas containing fluorinated compound gas containing hydrogen in the chamber.
    Type: Grant
    Filed: February 19, 2009
    Date of Patent: November 6, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Sungtae Lee, Yusuke Nakagawa, Jun Yashiro
  • Patent number: 8278195
    Abstract: In a plasma CVD apparatus, unnecessary discharge such as arc discharge is prevented, the amount of particles due to peeling of films attached to a reaction chamber is reduced, and the percentage of a time contributing to production in hours of operation of the apparatus is increased while enlargement of the apparatus and easy workability are maintained. The plasma CVD apparatus is configured such that in a conductive reaction chamber 104 with a power source 113, a vacuum exhausting means 118, and a reaction gas introduction pipe 114, plasma 115 is generated in a space surrounded by an electrode 111, a substrate holder 112, and an insulator 120.
    Type: Grant
    Filed: November 2, 2011
    Date of Patent: October 2, 2012
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Toru Takayama, Mitsunori Sakama, Hisashi Abe, Hiroshi Uehara, Mika Ishiwata
  • Patent number: 8268675
    Abstract: Methods of protecting a surface of a copper layer or a copper bonding pad on a semiconductor device against oxidation. A surface of the layer or bonding pad is cleaned by removing an oxidation layer with a plasma. A polymer layer is formed on the cleaned surface of the layer using a plasma-enhanced deposition process to protect the cleaned surface of the layer against exposure to an oxidizing gas.
    Type: Grant
    Filed: February 11, 2011
    Date of Patent: September 18, 2012
    Assignee: Nordson Corporation
    Inventors: David Keating Foote, James Donald Getty
  • Patent number: 8268081
    Abstract: A method for cleaning a workpiece support that includes using a workpiece that has been coated on its bottom surface with a suitable material is disclosed. This specially coated workpiece is placed on the support, and some time later, it is removed, taking with it particles from the support. In certain embodiments, the workpiece undergoes an ion implantation process to increase its temperature, and to increase the tackiness of the coating on the bottom surface. The material used to coat the bottom can be of variable types, including photoresists, oxides and deposited glasses.
    Type: Grant
    Filed: October 2, 2008
    Date of Patent: September 18, 2012
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: David Suuronen, Frederick B. Ammon, David Burgdorf, Lyudmila Stone
  • Patent number: 8262922
    Abstract: Plasma confinement ring assemblies are provided that include confinement rings adapted to reach sufficiently high temperatures on plasma-exposed surfaces of the rings to avoid polymer deposition on those surfaces. The plasma confinement rings include thermal chokes adapted to localize heating at selected portions of the rings that include the plasma exposed surfaces. The thermal chokes reduce heat conduction from those portions to other portions of the rings, which causes selected portions of the rings to reach desired temperatures during plasma processing.
    Type: Grant
    Filed: August 26, 2008
    Date of Patent: September 11, 2012
    Assignee: Lam Research Corporation
    Inventors: Rajinder Dhindsa, Felix Kozakevich, James H. Rogers, David Trussell
  • Patent number: 8261762
    Abstract: A gas supplying system includes a processing gas supply pipe for supplying a processing gas from a gas cylinder 210 into a processing apparatus and a nonreactive gas supply source 230 for supplying a nonreactive gas into the gas supply pipe. While the system is in operation, the gas supply pipe is charged with the nonreactive gas and a control unit is in a standby state. If a processing gas use start signal is received from the processing apparatus, the system exhausts the nonreactive gas from the gas supply pipe to create a vacuum therein; charges the gas supply pipe with the processing gas; and starts a supply of the processing gas from the processing gas supply source. If a processing gas use finish signal is received from the processing apparatus, the system stops the supply of the processing gas from the processing gas supply source; exhausts the processing gas from the gas supply pipe to create a vacuum therein; and charges the gas supply pipe with the nonreactive gas.
    Type: Grant
    Filed: August 10, 2007
    Date of Patent: September 11, 2012
    Assignee: Tokyo Electron Limited
    Inventors: Kiyoshi Komiyama, Akitoshi Tsuji, Takuya Fujiwara
  • Patent number: 8255072
    Abstract: A control unit of a substrate processing apparatus controls a process to be performed in a chamber. The process includes a step of performing a preceding first process; a step of performing a subsequent second process after performing the first process; a step of determining whether to perform an inter-process conditioning, for arranging the environment in the chamber, during a period between the end of the first process and the start of the second process, based on information on the first process and information on the second process; and a step of performing the inter-process conditioning prior to the second process when it is determined in the determining step that the inter-process conditioning is to be performed.
    Type: Grant
    Filed: February 2, 2009
    Date of Patent: August 28, 2012
    Assignee: Tokyo Electron Limited
    Inventor: Daisuke Morisawa
  • Patent number: 8247332
    Abstract: Hardmask films having high hardness and low stress are provided. In some embodiments a film has a stress of between about ?600 MPa and 600 MPa and hardness of at least about 12 GPa. In some embodiments, a hardmask film is prepared by depositing multiple sub-layers of doped or undoped silicon carbide using multiple densifying plasma post-treatments in a PECVD process chamber. In some embodiments, a hardmask film includes a high-hardness boron-containing film selected from the group consisting of SixByCz, SixByNz, SixByCzNw, BxCy, and BxNy. In some embodiments, a hardmask film includes a germanium-rich GeNx material comprising at least about 60 atomic % of germanium. These hardmasks can be used in a number of back-end and front-end processing schemes in integrated circuit fabrication.
    Type: Grant
    Filed: December 4, 2009
    Date of Patent: August 21, 2012
    Assignee: Novellus Systems, Inc.
    Inventors: Vishwanathan Rangarajan, George Andrew Antonelli, Ananda Banerji, Bart van Schravendijk