Abstract: Examples of methods and systems for laser processing of materials are disclosed. Methods and systems for singulation of a wafer comprising a coated substrate can utilize a laser outputting light that has a wavelength that is transparent to the wafer substrate but which may not be transparent to the coating layer(s). Using techniques for managing fluence and focal condition of the laser beam, the coating layer(s) and the substrate material can be processed through ablation and internal modification, respectively. The internal modification can result in die separation.

Abstract: A device and method for providing access to a signal of a flip chip semiconductor die. A hole is bored into a semiconductor die to a test probe point. The hole is backfilled with a conductive material, electrically coupling the test probe point to a signal redistribution layer. A conductive bump of the signal redistribution layer is electrically coupled to a conductive contact of a package substrate. An external access point of the package substrate is electrically coupled to the conductive contact, such that signals of the flip chip semiconductor die are accessible for measurement at the external access point.

Abstract: A method of forming an aperture (e.g., a through via, a blind via, a trench, an alignment feature, etc.) within a substrate includes irradiating a substrate with a laser beam to form a laser-machined feature having a sidewall. The laser-machined feature is then processed to change at least one characteristic (e.g., the sidewall surface roughness, diameter, taper, aspect ratio, cross-sectional profile, etc.) of the laser-machined feature. The laser-machined feature can be processed to form the aperture by performing an isotropic wet-etch process employing an etchant solution containing HNO3, HF and, optionally acetic acid.

Abstract: The invention relates to a serial connection of thin layer solar cells. The invention provides a structuring method for creating a reliable and effective connections, preventing short-circuits and enlarging usable solar cell surfaces. The solar cells comprise a substrate, a back contact layer, an absorber layer, a buffer layer, and a transparent front contact layer. Each solar cell is subdivided by three trenches A, B, C to create a plurality of adjacent cell segments. Trenches A and B extend down to the back contact layer, trench C extends down to the substrate. Trench C is filled with electrically insulating paste and trench B is filled with electrically conducting paste. The electrically conducting paste also covers trench C. The adjacent cell segments are electrically connected. Trench A is then created and filled with electrically insulating paste.

Abstract: Disclosed is a method for manufacturing an organic EL display, which comprises: a step of preparing an organic EL panel that comprises a substrate and organic EL elements arranged as a matrix on the substrate, wherein each organic EL element has a pixel electrode arranged on the substrate, an organic layer arranged on the pixel electrode, a transparent counter electrode arranged on the organic layer, a protective layer arranged on the transparent counter electrode, and a color filter arranged on the protective layer, and a defect portion present in the organic layer in each organic EL element is detected; a step of destroying a region of the transparent counter electrode positioned above the defect portion by irradiating the region with laser light through the color filter; and a step wherein a region of the color filter positioned above the defect portion is removed.

Abstract: A method of manufacture of an integrated packaging system includes: providing a substrate; mounting an integrated circuit on the substrate; mounting an interposer substrate having an interposer pad on the integrated circuit; covering an encapsulant over the integrated circuit and the interposer substrate; forming a hole through the encapsulant aligned over the interposer pad; and placing a conductive connector on and in direct contact with the interposer pad.

Abstract: Structures and methods for the dissipation of charge build-up during the formation of cavities in semiconductor substrates.

Abstract: An electrical connector for electrically connecting a central processing unit (CPU) comprises an insulating housing having a plurality of terminals received therein and a pick-up cap removably assembled to the insulating housing for carrying and placing the CPU onto the insulating housing. The insulating housing has a plurality of receiving slots sunk from top surfaces of two sidewalls thereof and a plurality of wedge-shaped grooves disposed between the receiving slots on one same sidewall. The pick-up cap defines a plurality of hooks extending therefrom for buckling to the insulating housing. The pick-up cap also defines a plurality of latches corresponding to the receiving slots and a plurality of releasing arms corresponding to the grooves. The latches received in the receiving slots can clasp the CPU to retain the CPU on the pick-up cap and be released the CPU when the releasing arms are pulled outwardly.

Abstract: The present invention relates generally to semiconductors, material layers within semiconductors, a production method of semiconductors, and a manufacturing arrangement for producing semiconductors. A semiconductor according to the invention includes at least one layer with a surface, produced by laser ablation, wherein the uniform surface area to be produced includes at least an area 0.2 dm2 and the layer has been produced by employing ultra short pulsed laser deposition wherein pulsed laser beam is scanned with a rotating optical scanner including at least one mirror for reflecting the laser beam.

Abstract: A conventional laser processing method has a problem that the number of scanning lines is large, and it is difficult to shorten the time needed for the marking. In a laser processing method of the present invention, a first laser processing is performed in accordance with the outer border of, for example, an English letter “A,” and thereafter, second and subsequent laser processings are performed on an inner region inside the outer border. In this event, for the second and subsequent laser processings, the respective processing lines (scanning lines) are set up in a longitudinal direction of a processing region. Thus, the number of processing lines is greatly reduced. As a result, the time needed for the marking is greatly shortened, and the laser marking workability is improved.

Abstract: A radiation-emitting thin-film semiconductor chip with an epitaxial multilayer structure (12), which contains an active, radiation-generating layer (14) and has a first main face (16) and a second main face (18)—remote from the first main face—for coupling out the radiation generated in the active, radiation-generating layer. Furthermore, the first main face (16) of the multilayer structure (12) is coupled to a reflective layer or interface, and the region (22) of the multilayer structure that adjoins the second main face (18) of the multilayer structure is patterned one- or two-dimensionally with convex elevations (26).

Abstract: A method for roughening an epitaxy structure layer, including: providing an epitaxy structure layer; and etching a surface of the epitaxy structure layer by an excimer laser having an energy density of 1000 mJ/cm2 or less to form a roughened surface. In addition, a method for manufacturing a light-emitting diode having a roughened surface is provided.

Abstract: A method of dicing a semiconductor wafer comprises scribing at least one dielectric layer along dice lanes to remove material from a surface of the wafer using a laser with a pulse-width between 1 picosecond and 1000 picoseconds and with a repetition frequency corresponding to times between pulses shorter than a thermal relaxation time of the material to be scribed. The wafer is then diced through a metal layer and at least partially through a substrate of the semiconductor wafer.

Abstract: Provided are a processing method for forming division originating points in a workpiece and a laser processing apparatus performing the method, which are capable of reducing light absorption in a processing trail, increasing light extraction efficiency from sapphire, and performing high speed processing. A pulsed laser beam is irradiated to a workpiece so that irradiation regions for each of unit pulsed beams of the pulsed laser beam of ultra-short pulse are formed discretely in the workpiece, and cleavage or parting of the workpiece is sequentially generated between the irradiation regions by a shock or a stress when each of unit pulsed beam is irradiated at an irradiation point, to thereby form originating points for division in the workpiece.

Abstract: A method for manufacturing a semiconductor device, includes: a step of etching a Si (111) substrate along a (111) plane of the Si (111) substrate to separate a Si (111) thin-film device having a separated surface along the (111) plane.

Abstract: A dielectric film stack of a solar cell is ablated using a laser. The dielectric film stack includes a layer that is absorptive in a wavelength of operation of the laser source. The laser source, which fires laser pulses at a pulse repetition rate, is configured to ablate the film stack to expose an underlying layer of material. The laser source may be configured to fire a burst of two laser pulses or a single temporally asymmetric laser pulse within a single pulse repetition to achieve complete ablation in a single step.

Abstract: Laser processing schemes are disclosed for producing various types of hetero-junction and homo-junction solar cells. The methods include base and emitter contact opening, selective doping, and metal ablation. Also, laser processing schemes are disclosed that are suitable for selective amorphous silicon ablation and selective doping for hetero-junction solar cells. These laser processing techniques may be applied to semiconductor substrates, including crystalline silicon substrates, and further including crystalline silicon substrates which are manufactured either through wire saw wafering methods or via epitaxial deposition processes, that are either planar or textured/three-dimensional. These techniques are highly suited to thin crystalline semiconductor, including thin crystalline silicon films.

Abstract: A semiconductor light emitting device has a light emitting element, a first electrode layer, a second electrode layer, a seed electrode layer and a plated layer. The light emitting element has a nitride-based III-V compound semiconductor on a substrate. The light emitting element having a light extraction surface. The first electrode layer on the light extraction surface. The second electrode layer is provided on a surface opposite to the light extraction surface of the light emitting element. The seed electrode layer is configured to cover the entire surface of the second electrode layer. The plated layer is provided on the seed electrode layer. The light emitting element has a light emitting layer, a first conductive type semiconductor layer, and a second conductive type semiconductor layer.

Abstract: A method for removing coating from a substrate may include: locating an edge of a substrate; directing a laser beam along a first path to a first position on a surface of the substrate proximate to an edge of the substrate at an angle of incidence suitable to redirect the laser beam along a second path, through the substrate, to a second position on a second surface of the substrate corresponding to the located edge of the substrate, where the second surface can include a coating; and ablating at least a portion of coating at the second position on the second surface of the substrate.

Abstract: A laser processing apparatus including a laser beam applying unit. The laser beam applying unit includes a laser beam generating unit, a focusing unit, and an optical system for guiding a laser beam from the laser beam generating unit to the focusing unit.

Abstract: A laser processing method for a semiconductor wafer including a groove forming step of applying a pulsed laser beam having an absorption wavelength to the semiconductor wafer along a division line formed on the semiconductor wafer to thereby form a laser processed groove along the division lines on the semiconductor wafer, wherein the pulse width of the pulsed laser beam to be applied in the groove forming step is set to 2 ns or less, and the peak energy density is set in the range of 5 to 200 GW/cm2.

Abstract: Solar cells and methods for fabrication thereof are provided. A method may include forming a via through at least one dielectric layer formed on a semiconductor wafer by using a laser to ablate a region of the at least one dielectric layer such that at least a portion of the surface of the semiconductor wafer is exposed by the via. The method may further include applying a self-doping metal paste to the via. The method may additionally include heating the semiconductor wafer and self-doping metal paste to a temperature sufficient to drive at least some dopant from the self-doping metal paste into the portion of the surface of the semiconductor wafer exposed by the via to form a selective emitter region and a contact overlying and self-aligned to the selective emitter region.

Abstract: Provided herein are methods and systems for scribing solar cell structures to create isolated solar cells. According to various embodiments, the methods involve scanning an excimer laser beam along a scribe line of a solar cell structure to ablate electrically active layers of the structure. A photomask having variable transmittance is disposed between the beam source and the solar cell structure. The transmittance is calibrated to produce variable fluence levels such that a stepped scribed profile is obtained. In certain embodiments, a front contact/absorber/back contact stack is removed along a portion of the scribe line, while a front contact/absorber stack is simultaneously removed along a parallel portion, with the back contact layer unremoved. In this manner, the scribe electrically isolates solar cells on either side of the scribe line, while providing a contact point to the back contact layer of one of the solar cells for subsequent cell-cell interconnection.

Abstract: A substrate processing method includes preparing a substrate, a first mask adjacent to a first surface of the substrate and including a first light transmitting portion allowing light to be transmitted therethrough, a condenser adjacent to the first surface, a second mask including a second light transmitting portion, and a photo detecting member including a photo detecting portion detecting light having passed through the second light transmitting portion, the condenser condensing light having passed through the first light transmitting portion toward the second light transmitting portion, the second light transmitting portion allowing the light condensed by the condenser to be transmitted therethrough, and forming a recess in the substrate by laser beam irradiation from a direction opposite to the first surface. When an intensity of the laser beam detected by the photo detecting portion is at or above a specific intensity, the irradiation of the laser beam is stopped.

Abstract: A dielectric film stack of a solar cell is ablated using a laser. The dielectric film stack includes a layer that is absorptive in a wavelength of operation of the laser source. The laser source, which fires laser pulses at a pulse repetition rate, is configured to ablate the film stack to expose an underlying layer of material. The laser source may be configured to fire a burst of two laser pulses or a single temporally asymmetric laser pulse within a single pulse repetition to achieve complete ablation in a single step.

Abstract: A method for generating an electrode layer pattern in an organic functional device (101; 201) comprising a first transparent electrode layer (103; 203), a second electrode layer (104; 204) and an organic functional layer (102; 202) sandwiched between said first and second electrode layers (103, 104; 203, 204). The method comprises the steps of arranging (601) a laser (704; 804) to irradiate said organic functional device (701; 801) through said first transparent electrode layer (103; 203), selecting (602) a set of laser parameters in order to enable said laser (704; 804) to locally modify an electric conductivity of said second electrode layer (104; 204), and locally modifying, by said laser (704; 804) in accordance with said set of laser parameters, the electric conductivity of said second electrode layer (104; 204), thereby generating said electrode layer pattern.

Abstract: To provide a manufacturing apparatus of a semiconductor device, which does not use a stepper in a manufacturing process in the case where mass production of semiconductor devices is carried out by using a large-sized substrate. A thin film formed over a substrate having an insulating surface is selectively irradiated with a laser beam through light control means, specifically through an electro-optical device to cause ablation; accordingly, the thin film is partially removed, thereby processing the thin film in a remaining region into a desired shape. The electro-optical device functions as a variable mask by inputting an electrical signal based on design CAD data of the semiconductor device.

Abstract: Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a liquid on a region of a die, and then forming an identification mark through the liquid on the die.

Abstract: According to one embodiment, a method for manufacturing a semiconductor light emitting device includes forming a separation groove on a major surface of a substrate. A semiconductor layer including a light emitting layer is formed on the substrate. The separation groove separates the semiconductor layer into a plurality of elements. The method includes forming an insulating film on the major surface of the substrate. The insulating film covers the semiconductor layer and a bottom surface of the separation groove provided on the substrate. The method includes separating the substrate from the semiconductor layer by irradiating the semiconductor layer with laser light from an surface of the substrate opposite to the major surface. An edge portion of irradiation area of the laser light is positioned near an edge portion of the semiconductor layer neighboring the separation groove.

Abstract: In one aspect, the present invention provides a silicon photodetector having a surface layer that is doped with sulfur inclusions with an average concentration in a range of about 0.5 atom percent to about 1.5 atom percent. The surface layer forms a diode junction with an underlying portion of the substrate. A plurality of electrical contacts allow application of a reverse bias voltage to the junction in order to facilitate generation of an electrical signal, e.g., a photocurrent, in response to irradiation of the surface layer. The photodetector exhibits a responsivity greater than about 1 A/W for incident wavelengths in a range of about 250 nm to about 1050 nm, and a responsivity greater than about 0.1 A/W for longer wavelengths, e.g., up to about 3.5 microns.

Abstract: In some embodiments, selective electroless plating for electronic substrates is presented. In this regard, a method is introduced including forming a film on a surface of a substrate, the film designed to prevent the seeding of an electroless plating catalyst, laser ablating the surface of the substrate through the film to form trenches, and seeding the surface of the substrate with an electroless plating catalyst. Other embodiments are also disclosed and claimed.

Abstract: A wafer laser processing method for forming deteriorated layers in the inside of a wafer having a device area and a peripheral excess area surrounding the device area, the surface of the device area being higher than the surface of the peripheral excess area, involving a first step for forming a deteriorated layer in the insides of the peripheral excess area and device area by applying a laser beam to the peripheral excess area and the device area with its focal point set in the material of the peripheral excess area and the device area from the front surface side of the wafer; and a second step for forming a deteriorated layer in the inside of the device area by applying a laser beam to the device area with its focal point set in the material of the device area without applying the laser beam to the peripheral excess area.

Abstract: For manufacturing a photovoltaic module (1) having on a transparent substrate (2) a transparent front electrode layer (3), a semiconductor layer (4) and a back electrode layer (5) as functional layers, the functional layers (3-5) are removed in the edge area (10) of the substrate (2) with a laser emitting infrared radiation. Subsequently, a back cover (12) is laminated on the coated substrate (2) with an adhesive film (11).

Abstract: Methods for manufacturing thin film transistor arrays utilizing three steps of lithography and one step of laser ablation while the lithography procedure is used four to five times in conventional processes are disclosed. The use of the disclosed methods assists in improving throughput and saving of manufacturing cost.

Abstract: Methods and apparatus for reducing defects on transparent conducting oxide (TCO) layer are provided. In one embodiment, a method for depositing a silicon layer on a transparent conducting oxide (TCO) layer may include providing a substrate having a TCO layer disposed thereon, wherein the TCO layer has a peripheral region and a cell integrated region, the cell integrated region having laser scribing patterns disposed thereon, positioning the substrate on a substrate support assembly disposed in a processing chamber, wherein the substrate support assembly has a roughened surface in contact with the substrate, contacting a shadow frame to the peripheral region of the TCO layer and to the substrate support assembly thereby creating an electrical ground path between the TCO layer and substrate support through the shadow frame, and depositing a silicon containing layer on the TCO layer through an aperture of the shadow frame.

Abstract: In one aspect of the present invention, a method of making an OLED device comprises providing a substrate; a first electrode, a conductive bus line over the substrate and an organic electroluminescent media over the first electrode and over the conductive bus line. A laser that operating at a predetermined wavelength and is scanned over the conductive bus line in a predetermined direction so that the conductive bus line absorbs sufficient energy to cause the ablation a portion of the organic electroluminescent media over the conductive bus line thereby forming an opening in the organic electroluminescent media. The width of the laser beam in the predetermined direction is less than four times the width of the conductive bus line; and forming a second electrode over the organic electroluminescent media, the first electrode, and through the opening in the organic electroluminescent media.

Abstract: A substrate (16) is machined to form, for example, a via. The substrate is in a chamber (15) within which the gaseous environment is controlled. The machining laser beam (13) is delivered with control of parameters such as pulsing parameters to achieve desired effects. The gaseous environment may be controlled to control integral development of an insulating lining for a via, thereby avoiding the need for downstream etching and oxide growth steps. Also, machining may be performed in multiple passes in order to minimize thermal damage and to achieve other desired effects such as a particular via geometry.

Abstract: Methods for forming a patterned layer from common layer in a photovoltaic application are provided. The patterned layer is configured to form one or more portions of one or more solar cells on a rigid substrate. A first pass is made with a first laser beam over an area on the common layer. A second pass is made with a second laser beam over approximately the same area on the common layer. The first pass provides a first level of electrical isolation between a first portion and a second portion of the common layer. The second pass provides a second level of electrical isolation between the first portion and the second portion of the common layer. The second level of electrical isolation is greater than the first level of electrical isolation.

Abstract: To provide a manufacturing apparatus of a semiconductor device, which does not use a stepper in a manufacturing process in the case where mass production of semiconductor devices is carried out by using a large-sized substrate. A thin film formed over a substrate having an insulating surface is selectively irradiated with a laser beam through light control means, specifically through an electro-optical device to cause ablation; accordingly, the thin film is partially removed, thereby processing the thin film in a remaining region into a desired shape. The electro-optical device functions as a variable mask by inputting an electrical signal based on design CAD data of the semiconductor device.

Abstract: The described embodiments relate to laser micromachining a substrate. One exemplary embodiment removes substrate material from a substrate to a first depth relative to a first surface of the substrate while delivering an assist gas at a first flow rate; and, removes substrate material at a second greater depth while delivering the assist gas at a second higher flow rate.

Abstract: Methods for manufacturing thin film transistor arrays utilizing three steps of lithography and one step of laser ablation while the lithography procedure is used four to five times in conventional processes are disclosed. The use of the disclosed methods assists in improving throughput and saving of manufacturing cost.

Abstract: A lead frame and a method of fabricating a semiconductor package including the lead frame, where the lead frame includes a die pad, a tie bar supporting the die pad, and a plurality of leads. The leads may include inner and outer leads arranged along an outer periphery of the die pad, with each of the inner and outer leads having tip terminals. The lead frame may include a connecting bar connected to tip terminals of each of the inner leads. In the method, a bonding pad of a semiconductor chip is mounted on the die pad and connected via a conductive wire to the inner leads of the lead frame. The semiconductor chip, wire and inner leads may be subjected to a molding process, and the connecting bar which connects the tip terminals of the inner leads may be cut so as to independently separate each of the inner leads from the die pad.

Abstract: A method of providing connectivity to a microsized device, the method includes the steps of providing an ablative base material having at least a top surface; providing a die having a first and second surface and having bonding pads at least upon the first surface; placing the die with the at least first surface of the die contacting the at least first surface of the ablative base material; and ablating a channel in the ablative material proximate to the die.

Abstract: A method of dividing a wafer having a plurality of streets, which are formed in a lattice pattern on the front surface, and having devices, which are formed in a plurality of areas sectioned by the plurality of streets, into individual devices along the streets, comprising: a protective member-affixing step for affixing a protective member for protecting devices onto the front surface of the wafer; a deteriorated layer-forming step for applying a laser beam of a wavelength having permeability for the wafer from the rear surface side of the wafer along the streets to form a deteriorated layer along the streets in an area where it does not reach the final thickness of each device from the front surface of the wafer and the rear surface of the wafer in the inside of the wafer; a groove-forming step for cutting areas corresponding to the streets from the rear surface side of the wafer where the deteriorated layer has been formed along the streets to form a groove reaching the deteriorated layer; a dividing the wa

Abstract: The present invention relates to systems, materials and methods for the formation of conducting, semiconducting, and dielectric layers, structures and devices from suspensions of nanoparticles. Drop-on-demand systems are used in some embodiments to fabricate various electronic structures including conductors, capacitors, FETs. Selective laser ablation is used in some embodiments to pattern more precisely the circuit elements and to form small channel devices.

Abstract: An energy-efficient method and system for processing target material such as microstructures in a microscopic region without causing undesirable changes in electrical and/or physical characteristics of material surrounding the target material is provided. The system includes a controller for generating a processing control signal and a signal generator for generating a modulated drive waveform based on the processing control signal. The waveform has a sub-nanosecond rise time. The system also includes a gain-switched, pulsed semiconductor seed laser for generating a laser pulse train at a repetition rate. The drive waveform pumps the laser so that each pulse of the pulse train has a predetermined shape. Further, the system includes a laser amplifier for optically amplifying the pulse train to obtain an amplified pulse train without significantly changing the predetermined shape of the pulses.

Abstract: A set (50) of laser pulses (52) is employed to sever a conductive link (22) in a memory or other IC chip. The duration of the set (50) is preferably shorter than 1,000 ns; and the pulse width of each laser pulse (52) within the set (50) is preferably within a range of about 0.1 ps to 30 ns. The set (50) can be treated as a single “pulse” by conventional laser positioning systems (62) to perform on-the-fly link removal without stopping whenever the laser system (60) fires a set (50) of laser pulses (52) at each link (22). Conventional IR wavelengths or their harmonics can be employed.

Abstract: A manufacturing process of a leadframe-based BGA package is disclosed. A leadless leadframe with an upper layer and a lower layer is provided for the package. The upper layer includes a plurality of ball pads, and the lower layer includes a plurality of sacrificial pads aligning and connecting with the ball pads. A plurality of leads are formed in either the upper layer or the lower layer to interconnect the ball pads or the sacrificial pads. An encapsulant is formed to embed the ball pads after chip attachment and electrical connections. During manufacturing process, a half-etching process is performed after encapsulation to remove the sacrificial pads to make the ball pads electrically isolated and exposed from the encapsulant for solder ball placement where the soldering areas of the ball pads are defined without the need of solder mask(s) to solve the problem of solder bleeding of the solder balls on the leads or the undesired spots during reflow. Moreover, mold flash can easily be detected and removed.

Abstract: A decapsulation apparatus 100 has a laser 8 that removes plastic encapsulant from a device 24. Chamber 20 is sealed. Exhaust port 9 removes debris and fumes. The device 24 is positioned and scanned using an X, Y table 2. A hinged end 4 rotates the device to an acute angle of incidence with respect to a laser 8. Endpoint detector 10 senses the exposed integrated circuit and moves or shuts down the laser 8.

Abstract: A decapsulation apparatus 100 has a laser 8 that removes plastic encapsulant from a device 24. Chamber 20 is sealed. Exhaust port 9 removes debris and fumes. The device 24 is positioned and scanned using an X, Y table 2. A hinged end 4 rotates the device to an acute angle of incidence with respect to a laser 8. Endpoint detector 10 senses the exposed integrated circuit and moves or shuts down the laser 8.