Abstract: A microelectronic substrate and method for manufacture. In one embodiment, the microelectronic substrate includes a body having a first surface, a second surface facing a direction opposite from the first surface, and a plurality of voids in the body between the first and second surfaces. The voids can extend from the first surface to a separation region beneath the first surface. At least one operable microelectronic device is formed at and/or proximate to the first surface of the substrate material, and then a first stratum of the microelectronic substrate above the separation region is separated from a second stratum of the microelectronic substrate below the separation region. The first stratum of the microelectronic substrate can be further separated into discrete microelectronic dies before the first stratum is separated from the second stratum. In one aspect of this embodiment, the substrate can support a film and microelectronic devices can be formed in the film and/or in the substrate.

Abstract: A method is disclosed for removing a decomposition residue and/or a processing residue, of a material of a resin layer, which is attached to the periphery and inside of holes formed in the resin layer of a printed board. The method provides shooting a laser beam having a wavelength for laser ablation at the holes to thereby remove the decomposition residue and/or the processing residue; reshaping the sectional shape perpendicular to the direction of advance of the laser beam by beam reshaping optics; and shooting the reshaped laser beam to shoot simultaneously all the holes formed in the resin layer and vicinity thereof, wherein the total irradiated area on the printed board is 200%-10,000% of the total sectional area of the holes formed in the printed board.

Abstract: A system and method for deprocessing a semiconductor die is disclosed. The semiconductor dies has an active area and at least one feature in the active area. The method and system include tuning an ablation laser. The method and system further include ablating a first portion of the semiconductor die using a tuned ablation laser to mark a location of the feature. The first portion is distinct from the active area and has a center. The center of the first portion is substantially above the feature. The method and system also include deprocessing a second portion of the semiconductor die using the first portion as a guide.

Abstract: A process for providing precision deposits (3) of metal films unto a working substrate (5) by transmitting an ultrafast laser pulse thorough a transparent target substrate (6) whose lower surface supports a metal film (7). Rapid laser heating produces pressure that propels vaporized metal unto the working substrate whereupon the metal vapor rapidly resolidifies on a dimension substantially equal to the ultrafast laser's focal spot size.

Abstract: A process for fabricating and releasing a thin-film structure from a primary carrier for further processing. The thin-film structure is built on a metal interconnect disposed on a dielectric layer which, in turn, is deposited on a primary carrier. The thin-film structure and metal interconnect are released from the dielectric layer and primary carrier along a release interface defined between the metal interconnect and the dielectric film. Release is accomplished by disturbing the interface, either by laser ablation or dicing.

Abstract: An etch of a fuse opening in overlying layers above a laser-blowable semiconductor fuse having a silicon nitride cap and silicon nitride spacers begins with a silicon nitride that is enclosed in a polysilicon conductive layer on a semiconductor wafer. The etch is performed by etching first with an etch process that etches silicon nitride and later with an etch process that is selective to silicon nitride. The later etch process etches the silicon nitride of the cap and spacers little or not at all, allowing a wider variation in etch depths without destroying the fuse. Also, a patch may be provided in the overlying layers above the fuse, and an etch process employed at the level of the patch that is selective to a material of the patch, resulting in an etch stop effect at that level. The etch process is then changed to an etch process that is not selective to a material of the patch, resulting in decreased variation in etch depth over the surface of the wafer.

Abstract: A process for the formation of deep clear laser marks on silicon wafers is described. Tall ridges of material which is erupted from the wafer surface during the deep laser penetration form adjacent to the marks. These ridges are of the order of 3 to 15 microns in height and must be removed prior to subsequent wafer processing to avoid fragmentation causing scratches and particulate contamination. The process of the invention deposits a non-conformal layer of photoresist or other flowable material on the wafer. The peaks of the ridges protrude above the surface of the conformal layer be a significant amount and are then etched away using an aqueous silicon etch. The non-conformal layer protects the wafer surface from the silicon etch so that only the ridges are removed. After the ridges are etched, the non-conformal layer is removed leaving residual ridges of a height less than or equal to the thickness of the conformal layer.

Abstract: A device repair process that includes removing a passivation polyimide layer. The passivation polyimide layer is removed using a first-half ash followed by a second-half ash. The device is rotated during the second-half ash. The device is then cleaned using sodium hydroxide (NaOH) and a subsequent light ash step is implemented. After the passivation polyimide layer is removed, a seed layer is deposited on the device. A photoresist is formed on the seed layer and bond sites are formed in the photoresist. Repair metallurgy is plated through the bond sites. The bond sites are plated by coupling the device to a fixture and applying the current for plating to the fixture. The contact between the device and the fixture is made though bottom surface metallurgy. After plating, the residual seed layer is removed and a laser delete process is implemented to disconnect and isolate the nets of the device.

Abstract: Methods of forming electrically interconnected lines using organic compound cleaning agents include the steps of forming a first electrically conductive line on a substrate and then forming a first electrically insulating layer on the first electrically conductive line to electrically isolate the first conductive line from adjacent regions and lines. An organic spin-on-glass (SOG) passivation layer is then formed as a planarization layer on the first electrically insulating layer. The organic SOG layer is then etched-back to define a first etched surface thereon, using a carbon-fluoride gas which also preferably contains argon. The organic SOG layer may even be sufficiently etched back to expose an upper surface of the first electrically insulating layer. The first etched surface is then exposed to an organic compound cleaning agent so that organic residues can be removed from the etched surface so that layers subsequently formed on the etched surface are less susceptible to lift-off and flaking.

Abstract: In a mask imaging method (by shooting a laser beam) for forming holes in a resin layer of a printed board, a sectional shape is reshaped by beam reshaping optics. Light path holes corresponding to the holes to be formed in the resin layer are used. The reshaped laser beam shoots the light path holes formed in the mask individually at once. Simultaneous passage of the laser beam through the light path holes formed in the mask is allowed, to form the holes in the resin layer. Exposure of the periphery and inside of a hole to the laser beam results in removal of a decomposition residue and/or processing residue.

Abstract: A method of producing an improved thin film transistor structure is provided having no source/gate or drain/gate overlap. A laser-assisted doping technique is applied to fabricate such transistors. A radiation filter is employed, which is transparent to light at the photolithography wavelength, but reflective or opaque at the laser wavelength. Eliminating source/gate and drain/gate overlap significantly reduces or eliminates parasitic capacitance and feed-through voltage between source and gate. Short-channel a-Si:H thin film transistors may be obtained having high field effect mobilities. Improved pixel performance and pixel-to-pixel uniformity is provided.

Abstract: A method of creating a rerouting pattern on a semiconductor die or cube by providing a semiconductor die having an active surface with bond pads thereon and sides. A layer of electrically insulating material is sputtered over the active surface and the sides while exposing the bond pads. Electrically conductive material is formed over the electrically insulating material on the active surface and the sides. A selected portion of the electrically conductive material is removed with an excimer laser. The step of sputtering a layer of electrically insulating material over the active surface and said sides can include the steps of sputtering a layer of electrically insulating material over the active surface including the bond pads and the sides, masking the electrically insulating material to expose the region of the electrically insulating material over the bond pads and ablating the electrically insulating material with an excimer laser at the exposed region down to said bond pads.

Abstract: A method for thin film or semiconductor technology, is discussed in which a metallization layer can be provided on an insulating layer, allowing opening of through holes in the insulating layer simultaneously with the same mask. A substrate 1 has a first 3 and a second 4 insulating layer on its surface 2, a cover layer 5 on the second insulating layer 4, a structured mask layer 6 on the cover layer 5, and through openings 7 filled with metal and extending from the rear side of the substrate as far as the substrate surface 2. The mask layer 6 features openings in the areas facing the through openings 7 and in the areas to be covered with a metal layer 8. The cover layer 5 is opened in the areas which are not covered by the structured mask layer 6 by means of a first etching process. Following this, the second insulating layer 4 is laser ablated in the areas facing the filled through openings 7, using dielectric mask.

Abstract: A method is provided for fabricating solar cells. A transparent conductive film is formed on a transparent substrate having an insulative surface and the transparent conductive film is segmented by a first scribing step to form transparent conductive film electrodes. An amorphous semiconductor layer is formed on the resulting substrate having the transparent conductive film electrodes. The amorphous semiconductor layer is segmented by a second scribing step to form amorphous semiconductor photoelectric conversion layers. A rear electrode layer is formed on the resulting substrate having the amorphous semiconductor photoelectric conversion layers and this rear electrode layer is segmented by a third scribing step to form rear electrodes. The third scribing step includes forming a resist film on the rear electrode layer, forming trenches in the resist film by laser scribing and etching off portions of the rear electrode layer with an etchant by using the resulting resist film as a mask.

Abstract: In processing an object to be processed by a laser beam, the laser beam is expanded by a beam expander and is introduced into a mask in which a light transmitted portion having a desired pattern is formed, the laser beam introduced into the mask is passed through the light transmitted portion having a desired pattern, to obtain a laser beam corresponding to the pattern of the light transmitted portion as well as having an approximately uniform energy distribution, the laser beam is formed and projected on the object to be processed by an image forming lens, and processing corresponding to the pattern of the light transmitted portion is performed on the object to be processed by the laser beam formed and projected. By this photoprocessing, a part of photoelectric converting elements in a photovoltaic device are removed to perform groove processing, or an amorphous semiconductor film is crystallized.

Abstract: An interface includes a surface having an electrically conductive pad; a compliant coating over the surface having a via extending to the pad; metallization patterned over the compliant coating and extending into the via; a low modulus dielectric interface layer overlying the compliant coating and having an interface via extending to the metallization; and a floating pad structure including floating pad metallization patterned over the dielectric interface layer with a first portion forming a central pad and a second portion forming an extension from the central pad extending into the interface via. Another interface includes a substrate including a low modulus dielectric interface material having a hole extending at least partially therethrough and a floating contact structure including electrically conductive material coating the hole with at least some of the floating pad metallization forming an extension from the hole.

Abstract: An electronic device includes at least one chip connected to a circuit board. The chip includes a die and an encapsulant which is applied in a liquid phase and dries to a solid phase. A shell may be positioned over the chip and in some embodiments of the invention extends over the entire device. A dam is connected to the circuit board adjacent the die in at least one direction so as to restrain flow of the encapsulant toward the dam when the encapsulant is in the liquid phase. The dam may include an upper end at an elevation higher than the uppermost portion of the chip (which would usually be encapsulated), the dam acting as a standoff between the shell and the chip. The upper end of the dam may be constantly in contact with the shell or, alternatively, the upper end of the dam may be ordinarily not in contact with the shell, but comes into contact with the shell if the shell is compressed or flexed toward the chip. A single dam may surround the die (and chip structure after the encapsulant dries).

Abstract: Vias are formed in a dielectric film overlying an electrode layer by sweeping a laser beam over the area in which the via is to be formed. In particular, a Nd:YAG laser, producing a beam of light having a 266 nm wave length, effectively ablates a barium strontium titanate dielectric film, without adversely affecting an underlying platinum electrode. The present invention overcomes the problem of wet chemical etching of dielectric films to form vias. Wet chemical etching often requires etchants that adversely affect the underlying metal electrode and typically require the use of environmentally undesirable chemicals.

Abstract: After an insulating film is deposited over metal patterns, a resist film is coated over the whole surface of the insulating film until the surface of the resist film becomes flat. The resist film is removed by reactive ion etching until a partial surface area of the insulating film deposited over the metal patterns is exposed. Another photoresist film is coated on the surface to cover a part of the exposed areas of the insulating film and the resist film, exposed and developed to form a resist mask. The area not covered with the resist mask and the resist film is selectively removed by anisotropic etching. The resist mask and the resist film are removed to obtain a window having a width equal to the width of a convex of the insulating film. A method of manufacturing a semiconductor device that is capable of exposing a metal wiring layer at a high precision is provided.

Abstract: A method of fabricating vertically integrated microelectronic systems by CMOS-compatible standard semiconductor process technology, by independently processing individual component layers of at least two separate substrates, including the formation of via holes penetrating through all existing component layers and connecting together the front surfaces of the two substrates, thinning the reverse surface of one of the substrates down to the via holes, increasing the depth of the via holes to a metallization plane of the other substrate and forming electrically conductive connections between the two substrates through the via holes.

Abstract: A method for fabricating custom integrated circuits includes the steps of 1) patterning the layer to be customized with standard precision masking techniques to define all possible connections, vias or cut-points, and 2) using a non-precision targeting energy beam to select the desired connections, vias or cut-points for customization. Consequently, the present invention requires no custom mask so that application specific integrated circuits (ASICs) can be produced with lower lead-time and costs when compared to prior methods.In other embodiments, a non-precision configuration mask may replace the targeting energy beam, where the configuration mask can be made by conventional mask-making techniques or by applying an opaque layer to a mask blank and using a targeting energy beam to selectively remove the desired portions of the opaque areas.

Abstract: An IC wiring connecting method for interconnecting conductive lines of the same wiring plane of an IC chip for correcting the wiring, for interconnecting conductive lines of different wiring lanes of a multilayer IC chip at the same position, or for connecting a conductive line of a lower wiring plane of a multilayer IC chip to a conductive line formed at a separate position on the same multilayer IC chip. The insulating film or films covering conductive lines to be interconnected are processed by an energy beam such as a concentrated ion beam to form holes so as to expose the respective parts of the conductive lines where the conductive lines are to be interconnected, then a metal is deposited over the surfaces of the holes and an area interconnecting the holes by irradiating the surfaces of the holes and the area by an energy beam or a concentrated ion beam in an atmosphere of a gaseous organic metal compound to form a conductive metal film electrically interconnecting the conductive lines.

Abstract: The invention provides a method for repairing a defect-generated cell using a laser for disconnecting a defect-generated portion of a fuse conductive line in the fabricating process of semiconductor integrated circuits, characterized in that an insulation layer on the fuse conductive line is isotropically etched partially to a predetermined thickness for the purpose of refracting laser beam incident to the defect-generated portion of the fuse conductive line.

Abstract: A method of producing light emitting diodes from silicon carbide with increased external efficiency is disclosed which includes directing a beam of laser light at one surface of a portion of silicon carbide, and in which the laser light is sufficient to vaporize the silicon carbide that it strikes to thereby define a cut in the silicon carbide portion; and then dry etching the silicon carbide portion to remove by-products generated when the laser light cuts the silicon carbide portion. The resulting wafer and diode structure are also disclosed.

Abstract: A method of forming via holes in an organic insulation film or cutting the film includes the steps of exposing predetermined parts of the film to a laser beam to raise a temperature of the exposed parts of the film until the exposed parts are transformed or decomposed and subjecting the film to an ultra sonic wave so that the transformed or decomposed parts are dispersed.