Abstract: A method for forming ohmic contact has the steps of a) a process for forming an insulating film having a predetermined thickness on a diffusive layer formed on a semiconductor substrate; b) a process for forming a mask on the insulating film; the mask having a small selective ratio with respect to the insulating film and having an opening portion for a contact hole; c) a process for implanting ions into the diffusive layer through the opening portion; d) a process for taking heat treatment to electrically activate the implanted ions; e) a process for completely removing the mask and forming the contact hole by simultaneously etching the mask and the insulating film exposed through the opening portion of the mask; and f) a process for making an electrode come in ohmic contact with the semiconductor substrate exposed from the formed contact hole. In this method, the ohmic contact is formed with high accuracy with respect to a fine contact hole.

Abstract: The present invention relates to a dual damascene structure and its manufacturing method. The invention uses two implanting step to form two stop layers. It uses the stop layers to perform an anisotropic etching step so as to form a via and trench. Finally, a conductive layer is filled into the via and trench followed by the completion of forming of the dual damascene structure. The invention controls the etching stop. Another advantage of the present invention is that of using the spacer as the trench mask instead of the multi-mask. Therefore, misalignment is prevented in the present invention.

Abstract: High energy implantation through varying vertical thicknesses of one or more films is used to form a vertically modulated sub-collector, which simultaneously reduces both the vertical and lateral components of parasitic collector resistance in a vertically integrated bipolar device. The need for a sinker implant or other additional steps to reduce collector resistance is avoided. The necessary processing modifications may be readily integrated into conventional bipolar or BiCMOS process flows.

Abstract: A method of forming a high resolution metal pattern on a substrate. A temporary polyvinyl alcohol (10) layer underneath the photoresist layer (20) aids in removing the photoresist layer after plating. The photoresist is photodelineated in conventional manner to form a pattern (40). During photodelineation, the developing process for the resist does not completely remove the PVA (45) that lies directly under the removed resist, but instead reveals those portions of the polyvinyl alcohol layer. The substrate is then rinsed in a hot aqueous solution to effect removal of the revealed PVA portions, now exposing portions (40) of the substrate (15). Metal (50) is then electroplated to build up a metal circuitry pattern. The remaining portions of the photoresist and the PVA are then removed by a hot aqueous solution.

Abstract: A composite of an anti-reflective coating on polysilicon is accurately etched to form a polysilicon pattern by initially etching the ARC with gaseous plasma containing helium and/or nitrogen which is substantially inert with respect to polysilicon.

Abstract: A method of forming first and second conductivity type wells in a semiconductor device includes the steps of forming an isolation layer on a semiconductor substrate, forming a multi-layer mask over a portion of the substrate to define the first and second conductivity type wells, implanting a first conductivity type impurity to form the first conductivity type well, removing a partial layer from the multi-layer mask, and implanting a second conductivity type impurity to form the second conductivity type well.

Abstract: Germanium is employed as an antireflective coating material for use in active area lithography and gate area lithography steps in the formation of a semiconductor integrated circuit. A germanium layer is deposited over an active area nitride layer or over a gate area nitride layer, and a photoresist layer is then formed on the germanium layer. The photoresist layer is than exposed and developed. During exposure, the germanium layer substantially reduces reflection from the underlying nitride layer, thereby relieving the dependency of exposure energy and resulting line width on the underlying nitride layer thickness. Germanium-silicon may also be employed as the antireflective layer.

Abstract: A method of manufacturing a semiconductor device is disclosed. The method comprises the steps of forming carbon layer on a light-reflective layer or a transparent layer formed on a light-reflective layer, forming a photosensitive resin layer on the carbon layer, selectively radiating light on the photosensitive resin layer, forming a photosensitive resin pattern by developing the photosensitive resin layer selectively irradiated with the light, forming a carbon pattern by etching the carbon layer using the photosensitive pattern as a mask, and forming a light-reflective pattern or a transparent layer pattern by etching the light-reflective layer using the photosensitive resin layer or the carbon pattern as a mask. When the light-reflective layer pattern is formed, the thickness of the carbon layer is set to be less than 100 nm. When the transparent layer pattern is formed, the thickness of the carbon layer is set to be 80 nm or more.

Abstract: Method for fabricating a semiconductor device is disclosed, including the steps of: forming a first resist layer on a substrate; patterning a predetermined region of the first resist layer to form a pattern having a first width which exposes the substrate; forming an insulating film on an entire surface of the substrate including the first resist layer; forming a second resist layer on the insulating film; patterning a predetermined region of the second resist layer to form a pattern over the pattern of the first resist layer having a second width which exposes the insulating film; using the second resist layer as a mask in etching the exposed insulating film to form sidewall spacers at sides of the pattern of the first resist layer; forming a metal layer on an entire resultant surface including the second photoresist layer; and, removing the first and second resist layers and the insulating film to form a T form gate electrode.

Abstract: A pattern forming method having a step of forming an amorphous carbon film on a patterning layer formed on a substrate, a step of forming a photoresist film on the amorphous carbon film, a step of selectively exposing and developing the photoresist film to form a photoresist pattern, and a step of successively dry-etching the amorphous carbon film and the patterning layer by using the photoresist film as an etching mask. Desired optical constants of an amorphous carbon film formed by sputtering can be obtained by controlling a substrate temperature and other parameters.

Abstract: A multilayer resist pattern forming method patterns a lower resist layer formed over the stepped surface of a workpiece by a high-speed, highly anisotropic ion mode etching using an intermediate pattern formed by etching an intermediate layer formed by a high-density plasma CVD process as a substantial etching mask. The intermediate layer formed by the high-density plasma CVD process has a dense film quality and highly resistant to ion bombardment. Therefore, the intermediate resist pattern is neither thinned nor contracted and, consequently, the lower resist pattern can be formed precisely in conformity with the design rule. Since the high-density plasma promotes interaction between source gases to enable the intermediate layer to be formed at a comparatively low processing temperature, which prevents damaging the lower resist layer by heat.