Plural Stages Controlled With Plates, Screen Grids, Or Cathodes Connected In Parallel Patents (Class 455/253.1)
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Patent number: 8996038Abstract: A method for displaying an idle screen, which is varied depending on a specific condition of a mobile communication terminal, for better graphic impressions. When the user of the mobile communication terminal travels between countries, and a border crossing is detected, a landmark image of a corresponding country is displayed on the idle screen. In addition, an animation effect is displayed on the idle screen so as to inform of the occurrence of the corresponding event. Accordingly, a novel graphic effect is provided to the user via a user interface having enhanced entertaining features.Type: GrantFiled: October 31, 2007Date of Patent: March 31, 2015Assignee: Samsung Electronics Co., Ltd.Inventors: Sung-Hwan Baek, Jin-Yong Kim, Kyoung-Sik Yoon, Hee-Woong Choi, In-Won Jong, Hee-Kyung Jeon
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Patent number: 8374560Abstract: Aspects of a method and system for processing signals in a high performance receive chain may include amplifying a plurality of radio frequency signals in one or more respective one or ones of a plurality of amplifier chains in a multistandard radio frequency front-end, which may comprise one or more shared processing stages. The plurality of radio frequency signals may be compliant with a plurality of radio frequency communication standards and may be received concurrently. The one or more shared processing stages may be shared between two or more of the plurality of amplifier chains. Each of the two or more of the plurality of amplifier chains may be operable to amplify signals compliant with different radio frequency communication standards.Type: GrantFiled: September 15, 2010Date of Patent: February 12, 2013Assignee: Broadcom CorporationInventors: Arya Behzad, Adedayo Ojo, Yuyu Chang, Hung-Ming Chien, Kishore Rama Rao, Guruprasad Seetharam
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Patent number: 8081943Abstract: A receiving apparatus includes an amplification section that amplifies a received signal and a frequency conversion section that converts a frequency of the received signal, from a radio frequency to a baseband, the baseband having a lower frequency than the radio frequency. A gain control section amplifies, by a predetermined gain, the signal that has been subjected to the frequency conversion to the baseband. A voltage calibration section performs calibration on an offset voltage generated in the signal subjected to frequency conversion to the baseband. A time constant control section sets a first time constant during a reception operation and sets a second time constant, which is reduced with respect to the first time constant, during the calibration.Type: GrantFiled: November 21, 2008Date of Patent: December 20, 2011Assignee: Panasonic CorporationInventors: Yoshito Shimizu, Takeaki Watanabe, Noriaki Saito
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Patent number: 8000672Abstract: In one embodiment, the present invention includes a receiver having two complementary input sense amplifiers to receive, amplify and latch a differential signal and to output complementary stage differential output signals to a latch coupled to receive and combine the n? them into a latched differential output signal. Other embodiments are described and claimed.Type: GrantFiled: October 29, 2007Date of Patent: August 16, 2011Assignee: Intel CorporationInventor: Taner Sumesaglam
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Patent number: 7869784Abstract: A radio frequency (RF) circuit (100) as disclosed herein is fabricated on a substrate (204, 304) using integrated passive device (IPD) process technology. The RF circuit (100) includes an RF inductor (200, 300) and an integrated inductive RF coupler (202, 302) located proximate to the RF inductor (200, 300). The inductive RF coupler (202, 302), its output and grounding contact pads, and its transmission lines are fabricated on the same substrate (204, 304) using the same IPD process technology. The inductive RF coupler (202, 302) includes a coupling section (212, 306) that is either located inside or outside a spiral of the RF inductor (200, 300). The inductive RF coupler (202, 302) and the RF inductor (200, 300) are cooperatively configured to function as the windings of an RF transformer, thus achieving the desired coupling. The inductive RF coupler (202, 302) provides efficient and reproducible RF coupling without increasing the die footprint of the RF circuit (100).Type: GrantFiled: February 27, 2007Date of Patent: January 11, 2011Assignee: Freescale Semiconductor, Inc.Inventor: Lianjun Liu
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Patent number: 7840198Abstract: Aspects of a method and system for processing signals in a high performance receive chain may include amplifying radio frequency signals in amplifier chains in a multistandard radio frequency front-end, comprising one or more shared processing stages, and combining, with substantially equal gain, a number of phase-shifted radio frequency signals of the radio frequency signals into substantially equal-gain-combined radio frequency signals. The substantially equal-gain-combined radio frequency signals may be demodulated to obtain inphase channels and quadrature channels. A number of inphase channels and quadrature channels may be processed in I-channel processing blocks and Q-channel processing blocks to generate an output analog baseband signal. The multistandard radio frequency front-end may be capable of processing Bluetooth® signals and Wireless Local Area Network (WLAN) signals.Type: GrantFiled: April 9, 2007Date of Patent: November 23, 2010Assignee: Broadcom Corp.Inventors: Arya Behzad, Adedayo Ojo, Yuyu Chang, Hung-Ming Chien, Kishore Rama Rao, Guruprasad Seetharam
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Patent number: 7477882Abstract: A reception apparatus capable of calibrating a DC offset voltage fast and with high accuracy even in an environment in which interferer exist without causing noise characteristic degradation. In this apparatus, a digital signal processing section (108) controls the gain of a received signal at such a gain that predetermined reception quality is obtained. A time constant control circuit (110) controls the time constant and makes the amount of attenuation of the received signal of a low pass filter (106a) more moderate compared to the case where a DC offset voltage is not calibrated during DC offset voltage calibration. A voltage calibration circuit (111) calibrates the DC offset voltage generated in the received signal when controlling the gain.Type: GrantFiled: November 30, 2004Date of Patent: January 13, 2009Assignee: Panasonic CorporationInventors: Yoshito Shimizu, Takeaki Watanabe, Noriaki Saito
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Patent number: 7116955Abstract: An AGC circuit includes both wide-band and narrow-band VGAs. Two power monitors monitor the power level of the two VGAs. Based upon the signals provided by the power monitors, the AGC circuit derives two error terms. The AGC circuit filters and combines the error terms to determine a desired adjustment to the total gain and a desired adjustment to the distribution of the gain between the wide-band VGA and the narrow-band VGA. The AGC circuit also minimizes the noise figure of the narrow-band VGA subject to linearity constraints.Type: GrantFiled: September 24, 2002Date of Patent: October 3, 2006Assignee: ATI Technologies, Inc.Inventors: Troy A. Schaffer, Samir N. Hulyalkar, Anand M. Shah
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AGC circuit of an FM receiver that reduces interference while maintaining high reception sensitivity
Patent number: 7050774Abstract: A first AGC voltage and a second AGC voltage are taken from the final stage of a radio-frequency circuit and the output side of a bandpass filter, respectively, and the gain of the radio-frequency circuit is controlled on the basis of the two AGC voltages. The pass-band width of the bandpass filter is approximately two times greater than the frequency interval of FM broadcast signals. The second AGC voltage is set higher than the first AGC voltage in the pass-band of the bandpass filter.Type: GrantFiled: January 16, 2003Date of Patent: May 23, 2006Assignee: Alps Electric Co., Ltd.Inventor: Atsushi Tominaga -
Publication number: 20040263482Abstract: A touch screen arrangement fitted to a mobile telephone apparatus and built-on or resting on a substrate. The touch screen includes a display unit and a number of light pulse emitting units and a number of light pulse receiving units, said units being edge-related to said display unit. The light pulse emitting units and the light pulse receiving units are orientated adjacent said display unit, with the directions of said emitted and received light pulses being at right angles, or at least generally at right angles, to a planar surface on the display unit. The touch screen also includes four light pulse deflecting devices positioned close to the display surface.Type: ApplicationFiled: April 29, 2004Publication date: December 30, 2004Inventor: Magnus Goertz
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Patent number: 6725030Abstract: A MOSFET amplifier includes a pre-amplifier stage and a power amplifier stage. The pre-amplifier is a CMOS inverter having a signal output that is DC connected to the gate of a MOS control transistor of the power amplifier stage. The CMOS inverter includes an NMOS transistor with a source connected through an inductor to ground and a drain to the source of a PMOS transistor. The drain of the PMOS transistor is connected through another inductor to a supply voltage. The gates of the NMOS and PMOS transistors are connected to both receive an input signal of the amplifier.Type: GrantFiled: December 28, 2000Date of Patent: April 20, 2004Assignee: Koninklijke Philips Electronics N.V.Inventor: Vickram Vathulya
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Patent number: 6658243Abstract: A high frequency power amplifying apparatus is provided with an amplifying section with a plurality of amplifying stages connected in cascade. A power control signal is supplied to the amplifying section through a control terminal so as to control the output of the high frequency power amplifying apparatus. Each of the amplifying stages has a gain smaller than that of a preceding stage. Gain control signals generated from the power control signal are supplied to the respective amplifying stages. Dividing resistors are connected in series with one another between the control terminal and a reference potential so as to divide the voltage of the power control signal to thereby generate a plurality of different gain control signals. Different ones of the gain control signals are supplied to the respective amplifying stages, an absolute value of a voltage of the gain control signal applied to each stage is smaller than that applied to an earlier preceding stage.Type: GrantFiled: July 22, 2002Date of Patent: December 2, 2003Assignees: Hitachi, Ltd., Hitachi Tohbu Semiconductor, Ltd.Inventors: Hitoshi Akamine, Nobuhiko Ishihara, Tetsuaki Adachi, Yasuhiro Nunogawa, Kogi Sugita
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Patent number: 6333675Abstract: A variable gain amplifier includes multiple unit variable gain amplifiers connected in series which amplify an input signal in accordance with their respective gains and generate a multi-stage amplified signal. A gain control circuit generates voltage control signals, one for each of the unit amplifiers, from a gain control input signal. The control signals control the respective gains of the unit amplifiers such that the gain of the first amplifier in the series is greater than the gain of the last amplifier in the series.Type: GrantFiled: April 6, 2000Date of Patent: December 25, 2001Assignee: Fujitsu LimitedInventor: Shinji Saito