Abstract: A number of biasing circuits for amplifiers including voltage controlled amplifier is presented. Also a number of field effect transistor circuits include voltage controlled attenuators or voltage controlled processing circuits. Example circuits include modulators, lower distortion variable voltage controlled resistors, sine wave to triangle wave converters, and or servo controlled biasing circuits.

Abstract: Embodiments of power efficient radio frequency mixers are provided. A generalized impedance matched low-voltage active mixer circuit technique, which utilizes a plurality of commutator cells and transformers, is disclosed. The active mixer techniques are reconfigurable between various operation configurations based, at least in part, on selectively activating at least one of a plurality of commutator cells. The low voltage active mixer function is coupled to an impedance matched amplifier which can be bypassed allowing changes in the gain of the mixer circuit suites while preserving impedance matching.

Abstract: An RF device package includes an RF input terminal, first and second amplifier input nodes, and a hybrid coupler integrally formed as part of the RF device package and connected between the RF input terminal and the first and second amplifier input nodes. The hybrid coupler includes a first LC network directly electrically connected to the RF input terminal and physically disconnected from the first and second amplifier input nodes, a second LC network directly electrically connected to the first amplifier input node and physically disconnected from the RF input terminal and the second amplifier input node, and a third LC network directly electrically connected to the second amplifier input node and physically disconnected from the RF input terminal and the first amplifier input node. The second and third LC networks are each inductively coupled to the first LC network in a transformer configuration.

Abstract: An active antenna module is disclosed. The active antenna module comprises a loop antenna, a RF transistor, a LR series circuit, a first bypass capacitor and a second bypass capacitor. The RF transistor comprises a control port, a first port, and a second port. Each of two ends of the loop antenna is electrically connected to one of the control port and the second port, and the control port and the second port are out of phase. The second port is electrically connected to the first port via the first bypass capacitor. The first port is electrically connected to ground via the LR series circuit. The second bypass capacitor and a resistor of the LR series circuit are connected in parallel.

Abstract: A structure and method for reducing second-order harmonic distortion in FET devices used in applications that are sensitive to such distortion, such as switching RF signals. The asymmetry of the drain-to-body capacitance Cdb and source-to-body capacitance Csb of a FET device are equalized by adding offsetting capacitance or a compensating voltage source.

Abstract: A radio-frequency amplifier includes a matching network comprising a switching unit. The switching unit is operable in a first condition to provide a selected impedance at a first selected frequency. The switching unit is operable in a second condition to form a bandstop filter. A stop band of the bandstop filter includes a second selected frequency. The first selected frequency may be a second harmonic of a transmission frequency different from the second selected frequency. A multi-band transceiver is also described, as is a method of transmitting a first signal and a second signal.

Abstract: An amplifier includes: an amplifying device configured to amplify an input signal; and a matching circuit coupled to the amplifying device, and including an impedance transformer and a parallel resonance circuit coupled to a wiring which spans from the impedance transformer to the amplifying device, wherein a circuit length of the impedance transformer is longer than one-fourth of wavelength of an electronic wave having a frequency which is substantially equal to a resonance frequency of the parallel resonance circuit.

Abstract: A sub-harmonic mixer comprising a mixer circuit with input ports for RF and LO signals, and an output port for the product of the signals at the input ports, and an LO switching stage with input ports for an LO signal and the LO signal phase shifted 180 degrees. The LO switching stage comprises a third input port to which the output port of the mixer circuit is connected and a first output port for the product of the signal at its third and first input ports, and a second output port for the product of the signal at the third and second input ports with the same amplitude as the first output signal 180 degrees phase shifted. In the sub-harmonic mixer the mixer circuit comprises a transconductance mixer.

Abstract: A signal processor includes a frequency generator that employs a direct digital synthesizer (DDS) to generate a first local oscillator (LO) signal with a variable first LO frequency. The signal processor also includes an oscillator generating a second LO signal having a second LO frequency. The DDS employs programmable frequency control word and a sampling clock signal having a variable sampling clock frequency that is derived from the second LO frequency, to generate a DDS output signal from which the first LO signal is produced. The variable sampling clock frequency and the programmable frequency control word are selected to avoid crossing spurs in the frequency spectrum of the DDS output signal.

Abstract: A sampling circuit and a receiver are provided having a high flexibility of filter design and excellent characteristics for removing an interfering wave. Provided also are a sampling circuit and a receiver having a low level of the higher harmonic spurious. The sampling circuit includes a charge sampling circuit, which executes sampling of an input signal, and a plurality of charge sharing circuits connected in parallel to the output stage of the charge sampling circuit. The charge sharing circuits include a charge sharing circuit group having transmission functions different from one another, a synthesis circuit, which is arranged at the output side of the charge sharing circuit group and synthesizes the outputs of the charge sharing circuits, and a digital control unit, which outputs a control signal for controlling the operation of the charge sharing circuit group and the synthesis circuit.

Abstract: Methods, systems, and apparatuses for down-converting an electromagnetic (EM) signal by aliasing the EM signal are described herein. Such methods, systems, and apparatuses operate by receiving an EM signal and an aliasing signal having an aliasing rate. The EM signal is aliased according to the aliasing signal to down-convert the EM signal. The term aliasing, as used herein, refers to both down-converting an EM signal by under-sampling the EM signal at an aliasing rate, and down-converting an EM signal by transferring energy from the EM signal at the aliasing rate. In an embodiment, the EM signal is down-converted to an intermediate frequency (IF) signal. In another embodiment, the EM signal is down-converted to a emodulated baseband information signal. In another embodiment, the EM signal is a frequency modulated (FM) signal, which is down-converted to a non-FM signal, such as a phase modulated (PM) signal or an amplitude modulated (AM) signal.

Abstract: According to one embodiment, a coupler apparatus includes a coupling element and a ground plane. The coupling element comprises a conductive material and configured to be subjected to power feeding to a feeding point. The ground plane comprises a conductive material and faces the coupling element. The coupling element has one or more through holes along an alignment direction of the coupling element and the ground plane.

Abstract: A sampling circuit and a receiver, with relatively simple configurations, and clocks, exhibiting excellent frequency characteristics, are provided. In discrete time circuits, a charging switch is controlled on and off using one of four-phase control signals. A rotate capacitor shares electrical charge accumulated in an IQ generating circuit via the charging switch. A dump switch is controlled on and off using a different signal from the control signal used to control the charging switch on and off, among the four-phase control signals. A buffer capacitor shares electrical charge with the rotate capacitor via the dump switch to form an output value.

Abstract: In one preferred embodiment, the data receiver includes an input matching circuit for receiving an input RF data and forming an impedance matched signal and an amplifier circuit responsive to the impedance matched signal for forming an impedance transformed signal. The data receiver further includes a dual band RF tank/IF tank circuit forming respective RF and IF components and a diode mixer for mixing the impedance transformed signal with the dual band RF/IF components to form a mixed signal so that the RF tank filters the RF component from the mixed signal to form an IF tone signal as an output. The amplifier circuit preferably includes a source impedance control circuit for controlling high RF and IF impedances and a low noise amplifier (LNA) for forming, in conjunction with the source impedance control circuit, the impedance transformed signal.

Abstract: A frequency translation filter includes a baseband filter circuit, a clock generator, and a switching circuit. The baseband filter circuit is operable to provide a baseband filter response. The clock generator is operable to generate multiple-phase clock signals at a desired frequency. The switching circuit is operable to frequency translate the baseband filter response of the baseband filter circuit to a high frequency filter response in accordance with the multiple-phase clock signals.

Abstract: There is provided a communication device including: a high frequency coupler; a band-pass filter; a switching mechanism that switches an electrical length a transmission line between the high frequency coupler and the band-pass filter; a communication unit that receives hardware information of other end of communication before establishing a communication connection; and a control unit that controls switching of the electrical length of the transmission line according to the received hardware information of the other end of communication by using the switching mechanism with or after establishing a communication connection.

Abstract: The present invention provides an oscillator and a communication system using the oscillator, in particular, an LC oscillator adapted to lessen phase noise deterioration due to harmonic distortions and increase the amplitude of oscillation, thereby having a favorable low phase noise characteristic. The oscillator comprises at least one voltage to current converter consisting of a transistor and a resonator comprising two LC tanks consisting of a pair of conductive elements and inductive elements. A feedback loop is formed such that an output terminal of the voltage to current converter is connected to the resonator and a current input to the resonator is converted to a voltage which is in turn fed back to an input terminal of the voltage to current converter. Inductive elements constituting the two LC tanks constituting the resonator are mutually inductively couple and a coefficient of the mutual induction is about ?0.6.

Abstract: In one embodiment, a local oscillator (LO) is configured to generate an LO signal. A transmission line receives the LO signal from the local oscillator and transmits the LO signal. A first set of taps and a second set of taps tap the transmission line to receive the LO signal. A plurality of transceiver blocks are configured to receive and transmit a plurality of phase-shifted radio frequency signals. Each transceiver block is coupled to a first tap and a second tap. Each LO signal received for a transceiver block is received with a different phase. However, the same reference phase may be calculated from a first LO signal received from the first tap and a second LO signal received from a second tap. Each transceiver block receives the reference LO signal having the reference phase determined from the first LO signal and the second LO signal.

Abstract: A cascaded directional couplers circuit having capacitive compensation such that the directivity of a resistively terminated one of the cascaded couplers is not degraded by an inductance of the other one of the cascaded directional couplers.

Abstract: A signal receiving device is provided which can prevent the imbalance occurring between in-phase and quadrature signals. A polarity of a local oscillator output signal to be outputted from a local oscillator 13 is switched by a polarity switching unit 14 in a time division way. Each of signals outputted from the polarity switching unit 14 is frequency divided by a frequency divider 16. The frequency-divided local oscillation signal is supplied to a mixer 34. Frequency conversion of a receiving signal is performed by the mixer 34 which receives the signal and local oscillation signal to demodulate received data.

Abstract: A receiver of a GNSS system is provided. The receiver comprises two mixers and a processing circuit. The first mixer down-converts an input radio-frequency signal comprising a first GNSS signal and a second GNSS signal into a first low-frequency signal. The second mixer down-converts the input radio-frequency signal into a second low-frequency signal. The processing circuit generates at least one phase-shifted low-frequency signal according to at least the first low-frequency signal, extract signal components of the first GNSS signal by rejecting signal components of the second GNSS signal according to the second low-frequency signal and the at least one phase-shifted low-frequency signal, and extract signal components of the second GNSS signal by rejecting signal components of the first GNSS signal according to the second low-frequency signal and the at least one phase-shifted low-frequency signal. The first and second GNSS signals are situated in different frequency ranges.

Abstract: Methods, systems, and apparatuses for down-converting an electromagnetic (EM) signal by aliasing the EM signal are described herein. Such methods, systems, and apparatuses operate by receiving an EM signal and an aliasing signal having an aliasing rate. The EM signal is aliased according to the aliasing signal to down-convert the EM signal. The term aliasing, as used herein, refers to both down-converting an EM signal by under-sampling the EM signal at an aliasing rate, and down-converting an EM signal by transferring energy from the EM signal at the aliasing rate. In an embodiment, the EM signal is down-converted to an intermediate frequency (IF) signal. In another embodiment, the EM signal is down-converted to a emodulated baseband information signal. In another embodiment, the EM signal is a frequency modulated (FM) signal, which is down-converted to a non-FM signal, such as a phase modulated (PM) signal or an amplitude modulated (AM) signal.

Abstract: Methods, systems, and apparatuses for down-converting an electromagnetic (EM) signal by aliasing the EM signal are described herein. Briefly stated, such methods, systems, and apparatuses operate by receiving an EM signal and an aliasing signal having an aliasing rate. The EM signal is aliased according to the aliasing signal to down-convert the EM signal. The term aliasing, as used herein, refers to both down-converting an EM signal by under-sampling the EM signal at an aliasing rate, and down-converting an EM signal by transferring energy from the EM signal at the aliasing rate. In an embodiment, the EM signal is down-converted to an intermediate frequency (IF) signal. In another embodiment, the EM signal is down-converted to a demodulated baseband information signal. In another embodiment, the EM signal is a frequency modulated (FM) signal, which is down-converted to a non-FM signal, such as a phase modulated (PM) signal or an amplitude modulated (AM) signal.

Abstract: A receiver according to one embodiment includes a frequency control unit configured to receive a stream of samples including a plurality of received instances of a transmitted signal. The frequency control unit is configured to output a first correction signal (e.g. indicating a rotation) that is based on more than one of the received instances and a second correction signal (e.g. to control an oscillator) that is also based on more than one of the received instances. In some embodiments, a controlled oscillator is used to receive and/or transmit another signal, such as a signal received from a GPS space vehicle. In other embodiments, the received instances are from a GPS signal. In further embodiments, a fixed-frequency oscillator is used, and the second correction signal is used to receive and/or transmit another signal, such as a GPS signal.

Abstract: A voltage control oscillator includes: first and second field effect transistors, a drain of one of which is connected to a gate of the other and a drain of the other of which is connected to a gate of the one; third and fourth field effect transistors, a drain of one of which is connected to a gate of the other and a drain of the other of which is connected to a gate of the one; a first inductor connected between the drain of the first field effect transistor and the drain of the second field effect transistor; a second inductor connected between the drain of the third field effect transistor and the drain of the fourth field effect transistor; a third inductor magnetically coupled to the first inductor; a fourth inductor magnetically coupled to the second inductor; a first capacitor that capacitively couples one end of the third inductor and one end of the fourth inductor; and a second capacitor that capacitively couples the other end of the third inductor and the other end of the fourth inductor.

Abstract: Radio-frequency (RF) circuits, methods and systems are implemented according to a variety of embodiments. According to one such embodiment, a radio-frequency (RF) receiver circuit is implemented with an adjustable RF filter circuit in a receive path of the RF receiver circuit. A local oscillator (LO) generates a LO signal and an RX_LO signal from the LO signal. A mixing circuit mixes a signal received from the adjustable RF filter circuit and the RX_LO signal. An intermediate-frequency (IF) circuit generates an IF_cal signal at the receiver circuit. A calibration circuit implements both a calibration mode and a receive mode. In the calibration mode, a calibration signal is injected into the receive path. A setting of the adjustable RF filter circuit is determined. In the receive mode, the calibration circuit disables the injection of the calibration signal into the receive path of the RF receiver circuit.

Abstract: A dual-LO mixer is disclosed. The dual-LO mixer receives an input signal, a first reference signal of a first reference frequency, and a second reference signal of a second reference frequency, and performs a frequency translation to convert the input signal into an output signal, wherein the frequency difference between the input signal and the output signal is a sum or a difference of the first reference frequency and the second reference frequency.

Abstract: Methods, systems, and apparatuses for down-converting an electromagnetic (EM) signal by aliasing the EM signal are described herein. Briefly stated, such methods, systems, and apparatuses operate by receiving an EM signal and an aliasing signal having an aliasing rate. The EM signal is aliased according to the aliasing signal to down-convert the EM signal. The term aliasing, as used herein, refers to both down-converting an EM signal by under-sampling the EM signal at an aliasing rate, and down-converting an EM signal by transferring energy from the EM signal at the aliasing rate. In an embodiment, the EM signal is down-converted to an intermediate frequency (IF) signal. In another embodiment, the EM signal is down-converted to a demodulated baseband information signal. In another embodiment, the EM signal is a frequency modulated (FM) signal, which is down-converted to a non-FM signal, such as a phase modulated (PM) signal or an amplitude modulated (AM) signal.

Abstract: A wideband receiver for a wireless communication system and a method for controlling the same are provided. In the wideband receiver for a wireless communication system, a receive path includes a mixer for receiving a Radio Frequency (RF) signal having a frequency fSG and for converting the RF signal into an Intermediate Frequency (IF) signal having a frequency fIF by mixing the RF signal with a first local oscillation signal having a first local oscillation frequency fLO1, and at least one Phase Locked Loop (PLL) for providing the local oscillation signal to the mixer. A control block determines whether a half-IF signal having a center frequency of fSG-fIF/2 exists in the IF signal, and when the half-IF signal exists, controls the at least one PLL to generate a second local oscillation signal having a second local oscillation frequency fLO2 greater than the first local oscillation frequency fLO1.

Abstract: A direct conversion multi-band TV tuner includes: a plurality of RF (radio frequency) paths for processing the RF signal and for generating a plurality of processed RF signals, respectively; and a TSC (tri-state chopper) based quadrature frequency converter for receiving one of said processed RF signals and converting the received processed RF signal into a in-phase baseband signal and a quadrature baseband signals; wherein the TSC based quadrature frequency converter operates in accordance with a first set of periodic three-state control signals and a second set of periodic three-state control signals that are approximately 90 degrees offset from the first set of periodic three-state control signals.

Abstract: A transceiver is described that includes a power amplifier (PA), a low noise amplifier (LNA), and an impedance matching circuit having a first and second differential output node. The first and second differential output nodes are coupled to outputs of the PA and to inputs of the LNA. The impedance matching circuit provides a load impedance to the outputs of the PA. The transceiver further includes a first impedance device having an output impedance coupled between the first and second differential output nodes. In this way, the combination of the output impedance and the load impedance matches with an impedance at the inputs of the LNA.

Abstract: A method of providing an input signal to a mixer circuit comprises coupling an output signal from a low-noise amplifier circuit to a mixer input of the mixer circuit via an AC coupling circuit, comprising an inductive of capacitive coupling circuit. For capacitive coupling configurations, a coupling capacitor is configured to have a capacitance value determined as a function of a transconductance sensitivity of the mixer circuit. For balanced output configurations of the low-noise amplifier circuit, matched coupling capacitors are used for coupling the balanced output signals to respective inputs of the mixer circuit. In one embodiment, the mixer circuit comprises a quadrature mixer circuit, which may be in a balanced or double-balanced configuration. In another embodiment, the mixer circuit comprises a four-phase mixer circuit, which may be configured as a balanced four-phase mixer circuit coupled to the low-noise amplifier circuit via inductive or capacitive embodiments of the coupling circuit.

Abstract: A communication system, including a transmitter having a transmitting circuit unit to generate a data transmission-adaptive RF signal and an electric-field-coupling antenna to send out the RF signal as an induction field and/or an electrostatic field, a receiver having a electric-field-coupling antenna and a receiving circuit unit to receive and process the RF signal received by the electric-field-coupling antenna, and a coupling apparatus having a plurality of transmitter-side electric-field-coupling antennas to receive the RF signal which is in capacitive coupling with the transmitter-side electric-field-coupling antenna and outputted from the electric-field-coupling antenna, a signal line to transmit the received RF signal, and a plurality of receiver-side electric-field-coupling antennas to output the RF signal which is in capacitive coupling with said the receiver-side electric-field-coupling antenna and transmitted through the signal line.

Abstract: According to one exemplary embodiment, a switching device with phase selection terminals to select between at least two phase shifting modes to reduce intermodulation distortion in the switching device includes a first phase selection terminal to select a first phase shifting mode of the switching device by enabling a first phase shifter in a first phase shifting switching branch coupled to an input of the switching device. The switching device further includes a second phase selection terminal to select a second phase shifting mode of the switching device by enabling a second phase shifting switching branch coupled to the switching device input. The intermodulation distortion in the switching device is reduced by selecting one of the first and second phase shifting modes. The switching device may further include a number of FETs coupled in series between an output of the switching device and the first and second phase shifting switching branches.

Abstract: Embodiments of the invention may provide for a CMOS antenna switch, which may be referred to as a CMOS SPDT switch. The CMOS antenna switch may operate at a plurality of frequencies, perhaps around 900 MHz, 1.9 GHz and 2.1 GHz according to an embodiment of the invention. The CMOS antenna switch may include both a receiver switch and a transmit switch. The receiver switch may utilize a multi-stack transistor with body substrate switching and attachment of external capacitor between drain and gate to block high power signals from the transmit path as well as to maintain low insertion loss at the receiver path. Exemplary embodiments of the CMOS antenna switch may provide for 38 dBm P 0.1 dB at multi bands (e.g., 900 MHz, 1.8 GHz, and 2.1 GHz). In addition, ?60 dBc second and third harmonic performance up to 30 dBm input, may be obtained according to example embodiments of the invention.

Abstract: Provided is a mixer including: an amplifier amplifying an input signal using at least one amplifier element; a mixing unit mixing the input signal amplified by the amplifier with a local oscillator signal output from a local oscillator. The mixing unit includes at least one pair of switching elements switching the amplifier, and the switching elements are MOSFETs having gates and body nodes to which a same local oscillator signal is applied. Thus, a time required for turning on the switching elements can be reduced, and 1/f noise is also reduced. Also, an overdrive voltage can be increased with respect to local oscillator signals having an identical intensity. Thus, a relatively low voltage operation can be performed.

Abstract: A downconverter and upconverter are provided which can obtain a sufficient image rejection ratio in a low-Intermediate Frequency (IF) scheme while reducing power consumption and can suppress Error Vector Magnitude (EVM)-related degradation in a zero-IF scheme. A complex-coefficient transversal filter rejects one side of a positive or negative frequency, and converts a Radio Frequency (RF) signal to a complex RF signal configured by real and imaginary parts. A local oscillator outputs a real local signal with a set frequency. A half-complex mixer, connected to the complex-coefficient transversal filter and the local oscillator, performs a frequency conversion process by multiplying the complex RF signal output from the complex-coefficient transversal filter and the real local signal output from the local oscillator, and outputs a complex signal of a frequency separated by the set frequency from a frequency of the RF signal.

Abstract: A mixer 1100 with a plurality of signal paths typically requires separate clock generating hardware for each signal path. However, the redundancy of having multiple clock generating hardware significantly increases power consumption and integrated circuit area when the mixer 1100 is integrated into silicon. A method and apparatus 1125 containing a circuit for generating a set of clock signals that can be shared by the different signal paths is presented. Advantage is taken of the significant capacitance difference between different sampling capacitors in the mixer and the superposition property.

Abstract: A system and method are provided for direct-conversion of a modulated radio-frequency (RF) signal. After receiving an RF signal, the RF signal is mixed with a plurality of oscillator signals with different phases in an interleaving manner.

Abstract: In one aspect, a mixer that provides improved isolation between an input oscillator and a mixing cell. In another aspect, a mixer that includes circuitry operative to shape an input signal provided by a local oscillator.

Abstract: An apparatus for demodulating a modulated signal comprises an analog to digital converter (2, 12) for converting an analog modulated input signal to a digital signal. The analog to digital converter is arranged to sample the input signal at a predetermined sampling rate. A digital down converter (4, 14) then receives the digital signal at the sampling rate. The digital down converter has an associated digital intermediate frequency and reduces the frequency of the digital signal to one quarter of the sampling rate. A low pass filter (6, 16) filters selected frequencies from the digital signal. A frequency offset stage (8, 18) applies a modification to the frequency of the filtered signal to reduce frequency offset therein, and a differential demodulator (10, 20) demodulates the signal after modifying the frequency to reduce the frequency offset. There is also disclosed a method for demodulating a signal.

Abstract: Circuits and methods for a mixer circuit involve having a first transistor with first and second terminals, where the first terminal is configured to handle an input RF signal. The mixer has a second transistor including a first terminal coupled to the second terminal of the first transistor, a second terminal configured to handle an input oscillator signal, and a third terminal configured to output an intermediate frequency (IF) signal. The IF signal includes a mixed product of the input RF signal and the input oscillator signal. A gate oxide thickness of the first transistor is less than a gate oxide thickness of the second transistor to provide enhanced linearity and a low noise figure. One or more of the mixers can be implemented in a receiver design.

Abstract: A local oscillator (LO) buffer circuit comprises first and second LO buffers arranged in a cross coupled configuration. The first LO buffer generates in-phase output signals in response to in-phase input signals, and quadrature output signals from the second LO buffer. The second LO buffer generates the quadrature output signals in response to quadrature input signals and the in-phase output signals. The LO buffers may include inductive loads. The LO buffers may include MOS transistors or bipolar junction transistors.

Abstract: An IC includes an RF front end, a down conversion module, an up conversion module, and a local oscillation generating module. The RF front end includes a receive section, a transmit section, and an interference reduction module. The receive section receives an inbound RF signal within a receive frequency band and the transmit section transmits an outbound RF signal within a transmit frequency band. The interference reduction module is coupled to at least one of the receive section and the transmit section and facilitates at least one of: attenuating energy of the outbound RF signal within the receive frequency band based on a transmit local oscillation or a receive local oscillation; and attenuating energy of the inbound RF signal within the transmit frequency band based on the transmit local oscillation or the receive local oscillation.

Abstract: According to one exemplary embodiment, a mixer circuit comprises first and second switching branches driven by a local oscillator and an input radio frequency (RF) signal. The mixer circuit further comprises at least one capacitor coupled between the first and second switching branches for high-pass filtering of a down-converted output signal of the mixer circuit. In one embodiment, each switching branch comprises a respective mixer transistor, for example, a field effect transistor (FET). In one embodiment, the mixer circuit includes an inductor to reduce or eliminate the effects of parasitic capacitors at a resonance frequency selected to approximately match a desired RF signal frequency. In one embodiment, an inductor at resonance with parasitic capacitors produces a band pass filter for an input RF signal.

Abstract: A dual-band input transceiver block is formed to operably receive one of a 2.4 GHz radio frequency signal or a 5.0 GHz radio frequency transceiver signal in a manner that minimizes duplication of circuitry and creates a combined circuit path for RF front end input stages for much of the input stage. More specifically, the embodiments of the present invention include separate amplification and mixing stages whose outputs are combined by a stabilized load with circuitry for removing a common mode feedback signal. As such, downstream components, such as amplifiers, filters, analog-to-digital converters, and other input path circuit elements, are not duplicated and may be used regardless of whether the dual-band transceiver is operating in a first or second frequency band. Operation is, in the described embodiment, only one frequency input at a time though the invention is not limited to such operation.

Abstract: Methods, systems, and apparatuses for down-converting an electromagnetic (EM) signal by aliasing the EM signal are described herein. Briefly stated, such methods, systems, and apparatuses operate by receiving an EM signal and an aliasing signal having an aliasing rate. The EM signal is aliased according to the aliasing signal to down-convert the EM signal. The term aliasing, as used herein, refers to both down-converting an EM signal by under-sampling the EM signal at an aliasing rate, and down-converting an EM signal by transferring energy from the EM signal at the aliasing rate. In an embodiment, the EM signal is down-converted to an intermediate frequency (IF) signal. In another embodiment, the EM signal is down-converted to a demodulated baseband information signal. In another embodiment, the EM signal is a frequency modulated (FM) signal, which is down-converted to a non-FM signal, such as a phase modulated (PM) signal or an amplitude modulated (AM) signal.

Abstract: A division ratio of a first frequency divider that generates a local signal and a division ratio of a second frequency divider that generates a RF interfering signal are different, and a first frequency synthesizer that generates the local signal and a second frequency synthesizer that generates the RF interfering signal employ an identical reference signal. The second frequency synthesizer that generates the RF interfering signal is not provided with a frequency switching function.

Abstract: Methods, systems, and apparatuses for down-converting an electromagnetic (EM) signal by aliasing the EM signal are described herein. Briefly stated, such methods, systems, and apparatuses operate by receiving an EM signal and an aliasing signal having an aliasing rate. The EM signal is aliased according to the aliasing signal to down-convert the EM signal. The term aliasing, as used herein, refers to both down-converting an EM signal by under-sampling the EM signal at an aliasing rate, and down-converting an EM signal by transferring energy from the EM signal at the aliasing rate. In an embodiment, the EM signal is down-converted to an intermediate frequency (IF) signal. In another embodiment, the EM signal is down-converted to a demodulated baseband information signal. In another embodiment, the EM signal is a frequency modulated (FM) signal, which is down-converted to a non-FM signal, such as a phase modulated (PM) signal or an amplitude modulated (AM) signal.

Abstract: A quadrature subharmonic mixer comprises a polyphase filter configured to generate quadrature components of a local oscillator (LO) reference signal, a summing and scaling element configured to create additional components of the LO reference signal, and a plurality of mixer elements configured to multiply the quadrature components of the LO reference signal and the additional components of the LO reference signal with a radio frequency (RF) signal to obtain a downconverted version of the RF signal.