Abstract: A printer may accept a print instruction; start printing of a code image on a print medium; control an operation state of the printer, wherein in a case where the printing of the code image is completed after the printing of the code image has been started, the operation state of the printer is controlled to be a respondent state, and in a case where the printing of the code image is not completed due to an error occurring after the printing of the code image has been started, the operation state of the printer is controlled to be a non-respondent state; receive an authentication request from a first external device; send the authentication response to the first external device; receive connection information from the first external device; and establish, by using the connection information, a wireless connection between the printer and a second external device.

Abstract: Provided are a method and system for controlling a voltage. The method includes: acquiring a current output voltage of an inverter; calculating a current voltage error of the current output voltage relative to a given output voltage; inputting the current voltage error into a fuzzy controller to determine a target output voltage of the inverter; determining an amplitude adjustment command based on a difference between an amplitude of the target output voltage and an amplitude of the current output voltage; determining a phase adjustment command based on a difference between a phase of the target output voltage and a phase of the current output voltage; and adjusting an amplitude and a phase of an output voltage of the inverter according to the amplitude adjustment command and the phase adjustment command respectively, to maintain the output voltage of the inverter within a preset range.

Abstract: A temporal jitter analyzer analyzes temporal jitter and includes: a time delay controller; a time delay member; a delay measurement circuit; an edge generator in communication with the time delay member and that receives the delayed primary signal from the time delay member and produces a reference signal from the delayed primary signal; a decision circuit in communication with the edge generator and that: receives the reference signal from the edge generator; receives a detector signal; and produces a raw decision signal from the detector signal such that a value of the raw decision signal depends on the reference signal; and a decision circuit readout in communication with the edge generator and the decision circuit and that: receives the reference signal from the edge generator; receives the raw decision signal from the decision circuit; and produces a decision signal from the raw decision signal based on the reference signal.

Abstract: A motor driving method includes steps of: at an open loop phase and in response to a motor being operated under a steady-state, calculating an angle difference between an estimation coordinate axis of the motor and an actual coordinate axis by a controller, according to an estimation voltage value, an estimation current value and at least one electrical parameter feedback from the motor and in reference with the estimation coordinate axis of the motor; calculating an actual current value in reference with the actual coordinate axis according to the angle difference by the controller; calculating a load torque estimation value associated with the motor according to the actual current value by the controller; and, in response to the open loop phase being switched to a close loop phase, compensating an output torque of the motor according to the load torque estimation value by the controller.

Abstract: A printer may accept a print instruction; start printing of a code image on a print medium; control an operation state of the printer, wherein in a case where the printing of the code image is completed after the printing of the code image has been started, the operation state of the printer is controlled to be a respondent state, and in a case where the printing of the code image is not completed due to an error occurring after the printing of the code image has been started, the operation state of the printer is controlled to be a non-respondent state; receive an authentication request from a first external device; send the authentication response to the first external device; receive connection information from the first external device; and establish, by using the connection information, a wireless connection between the printer and a second external device.

Abstract: A controller for data strobe signal (DQS) position adjustment includes, when the controller obtains margin effective widths of all data signals in a transmission bus, it determines a left boundary and a right boundary based on the margin effective widths, where the left boundary is a largest value in minimum values of the margin effective widths of all the DQs, and the right boundary is a smallest value in maximum values of the corresponding margin effective widths when all the DQs are aligned with the left boundary. The controller calculates a first central position based on the left boundary and the right boundary, where the first central position is a center of a smallest margin effective width obtained after all the DQs are aligned during read data training, and adjusts a delay line (DL) of the DQS to the first central position.

Abstract: Apparatuses, methods, and systems for calibrating of an antenna array that uses low-resolution phase shifters, are disclosed. On method includes generating a codebook of phase-shifter setting selections for each of a plurality of antenna elements of an antenna array including communicating a wireless signal between an external calibration antenna and the antenna array through a beam formed by a reference antenna element of the antenna array and an antenna element of the antenna array being calibrated, measuring a signal power of the communicated wireless signal for each of N settings of a digitally selected phase shifter associated with the antenna element of the antenna array being calibrated, and estimating a virtual signal power of each of M settings of the digitally selected phase shifter based on the signal power measurements of the N settings of the digitally selected phase shifter, wherein M is greater than N.

Abstract: The present application discloses a phase adjustment method and apparatus for an antenna array. The method includes: dividing the antenna array into a first antenna subarray and a second antenna subarray according to a first division rule in a preset division rule set; obtaining a phase difference between a first aggregated signal corresponding to the first antenna subarray and a second aggregated signal corresponding to the second antenna subarray; determining a to-be-adjusted phase value of each antenna array element in the antenna array according to the phase difference and a first weighting rule; and sending, to a phase shifter corresponding to each antenna array element, the to-be-adjusted phase value corresponding to the antenna array element.

Abstract: A storage device includes a nonvolatile memory device, and a controller that exchanges a data signal with the nonvolatile memory device through a data input and output line and exchanges a data strobe signal with the nonvolatile memory device through a data strobe line. In a training operation, at least one of the nonvolatile memory device and the controller performs a coarse training of adjusting a delay of the data signal with a first stride and a fine training of adjusting the delay of the data signal with a second stride smaller than the first stride.

Abstract: A laser marker device (11) includes: a free running counter (16) configured to output a free count value (Cf) obtained by counting the number of pulses of a pulse signal; a FIFO memory (15) configured to sequentially store the free count value as a trigger timing count value every time a trigger signal (tr) is output from a trigger sensor (13); a printing control unit (17, 18) configured to sequentially read out the trigger timing count value from the memory in order of storage, recognize a position of a workpiece to be printed next, and perform printing processing with respect to the workpiece if the workpiece is conveyed to the printing position.

Abstract: A system that incorporates aspects of the subject disclosure may perform operations including, for example, receiving, via an antenna, a signal generated by a communication device, detecting passive intermodulation interference in the signal, the interference generated by one or more transmitters unassociated with the communication device, and the interference determined from signal characteristics associated with a signaling protocol used by the one or more transmitters. Other embodiments are disclosed.

Abstract: Methods and apparatus for an absorptive, phase invariant signal attenuator. In embodiments, PIN diodes can be coupled to a hybrid coupler. Incident power can be split by the coupler to a terminating resistor, a terminating diode, and a series diode. The terminating diode becomes increasingly well matched and absorptive over the attenuation range. The series diode becomes increasingly mismatched and reflective over the attenuation range. The terminating resistor increasingly absorbs incident power as the coupling value decreases due to increasing diode impedance over the attenuation range.

Abstract: A system is configured to perform operations that include determining a first set of modular features corresponding to a first version of a service provider application and a second set of modular features corresponding to a second version of the service provider application. An original version of the service provider application may have been downloaded from an application store. The operations further include identifying, based on a comparison between the first set of modular features and the second set of modular features, a new set of modular features. The operations also include applying the new set of modular features to the first version of the service provider application. The applying may be based on determining that the new set of modular features supports predefined interface templates and corresponding interpreters. As such, the operations may be performed without communicating with the application store.

Abstract: Provided is an airflow meter with good precision. In the airflow meter, which is provided with an arithmetic circuit that incorporates air temperature and a sensor module temperature as adjustment elements for the output characteristics of the airflow meter, corrects the output characteristics in accordance with the temperature difference between the air temperature and the sensor module temperature and reduces the correction amount when the absolute value of the difference between the air temperature and the sensor module temperature is small.

Abstract: An electronic circuit including: a first delay line circuit to generate a first data strobe by delaying a second data strobe, such that an edge of the first data strobe is aligned within a first time interval; and a sampling circuit to sample the first data signal at the edge of the first data strobe, wherein plural data signals include the first data signal and a second data signal, wherein timings of the plural data signals deviate from a reference timing of a reference data strobe by plural time lengths, wherein the first data signal deviates from the reference timing by a first time length of the plural time lengths, and wherein an edge of the second data strobe is aligned within a second time interval, wherein a timing of the second data signal deviates from the reference timing by a shortest time length of the plural time lengths.

Abstract: A transmitter is provided to address transmitter non-idealities. The transmitter uses a series of envelope detectors to detect imbalances between an I branch and a Q branch of an I/Q modulator that is implemented as part of the transmitter's front end, and these detected imbalances may be compensated by pre-distorting digital baseband signals fed to the I branch and the Q branch. The transmitter may also use a series of envelope detectors to detect nonlinearities in one or more of the transmitter's amplification stages, and these detected nonlinearities may be compensated by modifying the baseband signals via a digital linearization pre-compensator. The transmitter may also support both implementations in either a time-switched or simultaneous manner, allowing for I/Q imbalances and nonlinearities to be addressed using a single transmitter design.

Abstract: A clock signal is transmitted to first and second integrated circuit (IC) components via a clock signal line, the clock signal having a first arrival time at the first IC component and a second, later arrival time at the second IC component. A write command is transmitted to the first and second IC components to be sampled by those components at respective times corresponding to transitions of the clock signal, and write data is transmitted to the first and second IC components in association with the write command. First and second strobe signals are transmitted to the first and second IC components, respectively, to time reception of the first and second write data in those components. The first and second strobe signals are selected from a plurality of phase-offset timing signals to compensate for respective timing skews between the clock signal and the first and second strobe signals.

Abstract: The present invention relates to resolver calibration for permanent magnet synchronous motor. According to embodiments of the present invention, the high frequency rotating voltage vector is generated and injected into a resolver associated with a permanent magnet synchronous motor (PMSM). Due to the saliency effect, when a reference point is detected in a phase current, the rotor position of the PMSM is known. At this point, by acquiring the resolver position, the resolver offset may be accurately determined for calibration. According to embodiments of the present invention, the resolver offset may be accurately determined and calibrated without increasing device dimension and cost. Respective methods, apparatuses, systems, and computer products are disclosed.

Abstract: A frequency synthesizer includes: an oscillating section that generates a first signal; a frequency ratio measuring section that measures a frequency ratio of the first signal and a second signal by using the first signal and the second signal; a comparing section that compares the frequency ratio, which is measured by the frequency measuring section, with a target value of a frequency ratio; and a filter that is disposed on a preceding stage of the comparing section. A frequency of the first signal of the oscillating section is adjusted on the basis of a comparison result of the comparing section.

Abstract: A memory test method is provided that includes the steps outlined below. The memory controller performs data-writing and data-reading on a memory module. When a quantity of read data is incorrect, a data-strobe enable signal is calibrated to perform data reading. When there is one of less than one piece of negative edge data reading content, a sampling unit is triggered. When the quantity of read data increases, the condition that the data-strobe signal is not received is determined. When the quantity does not increase, the memory controller is inspected. When there is more than one piece of read data, the burst mode setting of the memory module is inspected. When the quantity is correct and the content is not correct, a transmission circuit setting and the sampling unit are inspected. When the quantity and the content are correct, the test flow is terminated.

Abstract: A frequency synthesizer 11a outputs a periodic signal r(t) at a frequency detuned by a predetermined frequency ?f [Hz] from a frequency of 1/integer of a frequency of a reference clock signal f0 synchronized with a signal to be measured ws. A first sampler unit 12 samples the signal to be measured ws at a timing of the trigger signal CLK. A second sampler unit 13a samples an I signal I(t) at the timing of the trigger signal CLK. A phase shifter 13b outputs a Q signal Q(t) obtained by shifting a phase of the reference clock signal f0 by 90°. A third sampler unit 13c samples the Q signal at the timing of the trigger signal CLK. A correction value calculation unit 13d calculates a correction value ?t(n) based on sampling data I(n) and Q(n) and a set value t(n) of a sampling time.

Abstract: A method for adapting activation parameters used to generate a pulse sequence when activating a magnetic resonance system is provided. The method includes determining stimulation values for the pulse sequence based on predefined activation parameters. The stimulation values represent a stimulation exposure of a patient. Test regions that exhibit stimulation maxima are identified in the pulse sequence, and the identified test regions are tested with respect to compliance with a predefined stimulation limit value.

Abstract: A method of calibrating analog transceiver delay includes generating a signal in a portion of a first device to arrive at a first known time at analog transmit circuitry of the first device, transmitting the signal from the analog transmit circuitry of the first device, receiving the transmitted signal, and deriving transceiver delay from the received signal. The transmitting may be performed via a closed loop to analog receiver circuitry of the first device, detecting the signal at a second known time at an output of the analog receiver circuitry of the first device. The transmitting also may be performed wirelessly to receiver circuitry of a second device placed at a predetermined distance from the first device, detecting the received signal at a second known time at the receiver circuitry of the second device. Transceiver delay can be determined from transit time and apportioned between transmit delay and receive delay.

Abstract: A battery system monitoring device that monitors a battery system provided with a cell group having a plurality of battery cells connected in series with each other, including: a first control device that monitors and controls states of the plurality of battery cells of the cell group; a second control device that controls the first control device; a temperature detection unit that measures a temperature in the vicinity of the first control device; and a plurality of voltage detection lines, for measuring an inter-terminal voltage of the battery cell, which connect each of a positive electrode and a negative electrode of the battery cell and the first control device. The first control device includes a balancing switch, which performs balancing discharge of the battery cell for each of the battery cells.

Abstract: A patient monitoring device and method that determines and monitors at least one patient parameter is provided. A configuration processor generates configuration information in response to a first input signal and an adaptive notch filter receives a second input signal. The second input signal includes a signal of interest and an interference signal in a predetermined frequency range. The adaptive notch filter automatically estimates the interference signal within the second input signal based on a filter parameter and removes the estimated interference signal from the second input signal to generate a target signal. A step processor is electrically coupled between the configuration processor and the adaptive notch filter and sets a value of the filter parameter based on the configuration information, wherein the adaptive notch filter uses the filter parameter to reduce a ringing artifact on the target signal below a threshold level.

Abstract: An atomic force microscope (AFM) comprises a physical system and a controller comprising a plurality of digital filters and configured to control the physical system. The AFM is tuned by performing automatic loop shaping on a loop response defined by a frequency response of the physical system and a frequency response of the controller, and adjusting a gain of the controller according to a peak in a magnitude of the loop response.

Abstract: Various embodiments are described of devices and associated methods for processing a signal using a plurality of vector signal analyzers (VSAs). An input signal may be split and provided to a plurality of VSAs, each of which may process a respective frequency band of the signal, where the respective frequency bands have regions of overlap. Each VSA may adjust the gain and phase of its respective signal such that continuity of phase and magnitude is preserved through the regions of overlap. The correction of gain and phase may be accomplished by a complex multiply with a complex calibration constant. A complex calibration constant may be determined for each VSA by comparing the gain and phase of one or more calibration tones generated with each region of overlap, as measured by each of the VSAs.

Abstract: The present invention provides a phase-locked loop frequency calibration method and system, where the method includes: performing, within a counting time TCNT[k], frequency counting on a frequency signal that is output in a current working subband by a voltage-controlled oscillator, to obtain a frequency count value FCNT[k], where the current working subband corresponds to a binary value of a current node in a binary search tree; and calculating an error between FCNT[k] and a target frequency count value FCNTTARGET[k], comparing an absolute value of the error with a predetermined value, dynamically adjusting TCNT[k] in a value range of TCNT[k] according to a comparison result, and determining, in combination with a binary search algorithm, a target subband in which the voltage-controlled oscillator works. Such a dynamic calibration method can effectively shorten the calibration time on the whole.

Abstract: Methods and systems for tracking heavy machine teeth. One system includes a heavy machine tooth configured to be mounted on a bucket of a heavy machine, an active RFID tag coupled to the heavy machine tooth to move with the tooth, and an RFID reader configured to read data from the RFID tag, The RFID reader is further configured to provide an indication regarding the location of the tooth when the tooth separates from the bucket based on the data read from the RFID tag and provide diagnostic information regarding the heavy machine tooth based on the data read from the RFID tag.

Abstract: Apparatus and method for quadrature error correction for narrowband or tone signal are disclosed. An analog circuit receives a modulated signal and processes in-phase signal and quadrature-phase signal in in-phase and quadrature-phase signal paths respectively. A digital signal processor performs discrete Fourier transform on each of the in-phase and quadrature-phase signals and determines statistical parameters responsive to mismatch characteristics to estimate quadrature error correction.

Abstract: A method and a control sequence determination device for determining a magnetic resonance system control sequence is disclosed. The magnetic resonance system control sequence includes a multi-channel pulse with a plurality of individual high-frequency (HF) pulses to be transmitted in parallel by the magnetic resonance system via different independent high-frequency transmission channels. In one embodiment, the method includes calculating a multi-channel pulse based on an MR excitation quality parameter in an HF pulse optimization method. An HF pulse includes a plurality of successive HF partial pulses in discrete time steps. The method further includes considering, in the course of the HF pulse optimization method, a transmission bandwidth of an HF partial pulse to be transmitted during a discrete time step. A method for operating a magnetic resonance system and a magnetic resonance system that includes the control sequence determination device are disclosed.

Abstract: A method for self-calibrating a phase locked loop (PLL) includes setting a frequency range setting of a voltage controlled oscillator (VCO) to a first digital value for a first output frequency. A first difference is measured between a reference frequency and a feedback frequency resulting from the first output frequency. The frequency range setting is set to an inverted digital value of the first digital value for a second output frequency. A second difference is measured between the reference frequency and the feedback frequency resulting from the second output frequency. A value of the frequency range setting is selected based on the first difference and the second difference.

Abstract: A magnetic resonance system includes a magnetic resonance scanner having a multi-channel transmit coil or coil system and a magnetic resonance receive element; and a digital processor configured to perform an imaging process. The image process includes shimming the multi-channel transmit coil or coil system, acquiring a coil sensitivity map for the magnetic resonance receive element using the multi-channel transmit coil or coil system, acquiring a magnetic resonance image using the magnetic resonance receive element and the shimmed multi-channel transmit coil or coil system, and performing an intensity level correction on the acquired magnetic resonance image using the coil sensitivity map to generate a corrected magnetic resonance image.

Abstract: A method for quickly calibrating a memory interface circuit from time to time in conjunction with operation of a functional circuit is described. The method uses controlling the memory interface circuit with respect to read data capture for byte lanes, including controlling CAS latency compensation for the byte lanes. In the method control settings for controlling CAS latency compensation are determined and set according to a dynamic calibration procedure performed from time to time in conjunction with functional operation of a circuit system containing one or more memory devices connected to the memory interface circuit. In the method, determining and setting the control settings for controlling CAS latency compensation is performed independently and parallely in each of the byte lanes.

Abstract: An optical coherence tomography device includes an SS-OCT optical system which includes a wavelength swept optical source which sweeps an emission wavelength, an optical splitter which splits an interference signal light caused by interference between a measurement light and a reference light into a first interference signal light and a second interference signal light having a phase difference from the first interference signal light, a balance detector which includes a first detector configured to detect the first interference signal light and a second detector configured to detect the second interference signal light, and which processes detection signals from the first and second detectors to perform balance detection, and an optical member which is disposed between the optical splitter and one of the first detector and the second detector to generate a fixed pattern noise by one of the first interference signal light and the second interference signal light.

Abstract: A method to estimate parameters of a system to spread a spectrum of a first periodic signal according to a modulation period. An embodiment comprises sampling the first signal using a second periodic signal, determining based on the sampling result each occurrence where the first and second signals are synchronous, incrementing a first counter at each sampling, the first counter being reset at each said occurrence, storing at each said occurrence the last value of the first counter before the resetting, providing a third periodic signal at a first level when said last value is greater than a threshold and at a second level when said last value is smaller than the threshold, and determining the modulation period based on the period of the third signal.

Abstract: A memory interface circuit for read operations is described. The circuit includes one or more controller circuits, one or more read data delay circuits for providing CAS latency compensation for byte lanes. In the system, control settings for the read data delay circuits for providing CAS latency compensation are determined and set using controller circuits according to a dynamic calibration procedure performed from time to time. In the system, determining and setting the control settings for the read data delay circuits for providing CAS latency compensation is performed independently and parallely in each of a plurality of byte lanes.

Abstract: Methods and apparatus for a power regulator according to various aspects of the present invention may comprise a sensor adapted to generate a measurement of a voltage or a current. A memory may store a correction parameter that corresponds to the measurement, and a correction system may be adapted to adjust the measurement according to the correction parameter.

Abstract: A computer is programmed to acquire calibration data from a calibration scan, the calibration data configured to characterize high order eddy current (HOEC) generated magnetic field error of an imaging system. The computer is also programmed to process the calibration data to generate a plurality of basis coefficients and a plurality of time constants and to calculate a plurality of basis correction coefficients based on the plurality of basis coefficients, the plurality of time constants, and gradient waveforms in a given pulse sequence. The computer is further programmed to execute a diffusion-weighted imaging scan that comprises application of a DW-EPI pulse sequence to acquire MR data from an imaging subject and reconstruction of an image based on the acquired MR data. The computer is also programmed to apply HOEC-generated magnetic field error correction during application of the DW-EPI pulse sequence configured to reduce HOEC-induced distortion in the reconstructed image.

Abstract: A method and apparatus for generating an accurate clock generator timing source, comprising minimal jitter, excellent resolution, and an extended calibration range, for use, for example, in a system requiring accurate low power operation. In particular, a clock generation system is adapted to receive a generated clock input, a reference clock input, and an adjustment parameter comprising a sign bit and p data bits. The calibration logic system is further adapted to output and modify a calibrated clock, using distributed pulse modification. The adjustment parameter may be automatically generated.

Abstract: Calibration equipment for calibrating multiple test stations in a test system is provided. Each test station may include a test unit, a test fixture, and a radio-frequency (RF) cable that connects the test unit to the test fixture. A control test setup may be used to calibrate uplink and downlink characteristics associated with each test station (e.g., to determine path loss associated with the RF cable and test fixture and variations associated with the test unit). The control test setup may calibrate each test station at desired frequencies to generate a test station error (offset) table. The test unit of each test station may be individually configured based on the test station error table so that offset is minimized among the different stations and so that the test stations may reliably measure hundreds or thousands of wireless electronic devices during product testing.

Abstract: An on-chip timing slack monitor that measures timing slack at the end of a critical path includes a master-slave flip-flop having a tap on the Q output of the master and a logic module coupled to the flip-flop for producing a pulse whose width is a function of the slack. A pulse width shrinking delay line removes glitches on the flip-flop output and, in combination with a digital integrator and counter, also performs a time to digital conversion operation for determining a value for timing path slack. The determined value is used by a decision module for yield analysis. The monitor can discriminate a glitch from a slack pulse at the flip-flop output for any width of glitch up to one-half of a clock cycle.

Abstract: A user obtains a set of modules, inserts them into slots of a chassis, and interconnects the modules to form a modular instrument. A signal path extends through the modules. To support calibration of the signal path, a first of the modules (or the chassis or a calibration module) includes a calibration signal generator. A computer directs the first module to apply the calibration signal from the generator to the signal path, and measures the power (or amplitude) of the output of the signal path. The computer reads a factory-measured value A of the calibration signal amplitude from a memory of the first module (or the chassis or the calibration module). The value A and the measured output power of the signal path are used to determine a gain of the signal path. The system compensates for that gain when the signal path is used to measure live operational signals.

Abstract: A method of calibrating a reconstructed signal from a plurality of sub-signals is provided. The method includes injecting a calibration signal having multiple tones into a received input signal; dividing the input signal into a first and second sub-signal, including an overlapping frequency band; performing a first frequency translation by converting frequency components of the second sub-signal; digitizing the first sub-signal and the frequency converted second sub-signal; performing a second frequency translation to reverse the first frequency translation to obtain a reconstructed second sub-signal; and quantifying impairments to the digital first sub-signal and reconstructed second sub-signal caused by differences in magnitude and phase of frequency components within the overlapping frequency band.

Abstract: A method for calibrating a DDR memory controller is described. The method provides an optimum delay for a core clock delay element to produce an optimum capture clock signal. The method issues a sequence of read commands so that a delayed version of a dqs signal toggles continuously. The method delays a core clock signal to sample the delayed dqs signal at different delay increments until a 1 to 0 transition is detected on the delayed dqs signal. This core clock delay is recorded as “A.” The method delays the core clock signal to sample the core clock signal at different delay increments until a 0 to 1 transition is detected on the core clock signal. This core clock delay is recorded as “B.” The optimum delay value is computed from the A and B delay values.

Abstract: A fluorescence intensity calculating apparatus, includes: a measuring section configured to receive fluorescences generated from plural fluorescent dyes excited by radiating a light to a microparticle multiply-labeled with the plural fluorescent dyes having fluorescence wavelength bands overlapping one another by photodetectors which correspond to different received light wavelength bands, respectively, and whose number is larger than the number of fluorescent dyes, and obtain measured spectra by collecting detected values from the photodetectors; and a calculating section configured to approximate the measured spectra based on a linear sum of single-dyeing spectra obtained from the microparticle individually labeled with the fluorescent dyes, thereby calculating intensities of the fluorescences generated from the fluorescent dyes, respectively.

Abstract: A method of optimizing a gain adjustment value Kadj for a digital controller in an isolated switched mode power supply. The power supply includes an opto-coupler having a current transfer ratio (CTRX) within a range defined by a minimum current transfer ratio (CTRMIN) and a maximum current transfer ratio (CTRMAX). The method includes determining the CTRX of the opto-coupler, determining an optimal gain adjustment value KadjX based on the determined CTRX of the opto-coupler, and storing the optimal gain adjustment value KadjX in the digital controller. The method can be performed by the digital controller or by a programming device external to the power supply.

Abstract: A calibration method for radio frequency scattering parameter measurement applying three calibrators and measurement structure thereof, comprising a transmission line segment calibrator, an offset series device calibrator, an offset shunt device calibrator and a tested object measuring instrument, wherein the length of the transmission lines for the offset series device calibrator and the offset shunt device calibrator is equal to the one of the transmission line for the tested object measuring instrument such that the offset series device calibrator, the offset shunt device calibrator and the tested object measuring instrument have the identical error boxes, and after having acquired the scattering parameter matrix of the error box by means of the calibration method, it is possible to connect the tested electronic device onto the tested object measuring instrument and perform operations on uncorrected measurement data thereof thereby obtaining the radio frequency scattering parameter of the tested object.

Abstract: In a multi-channel oscilloscope a method of calibrating interleaved digitizer channels initially calibrates each digitizer channel to produce a bandwidth enhanced filter for each digitizer channel to match the respective channel frequency and phase characteristics. The oscilloscope is then configured for interleaved operation whereby an input signal is applied to at least two digitizers via a switch through a common preamplifier to produce a reference digitizer channel and an interleaved digitizer channel where the bandwidth enhanced filter for the interleaved digitizer channel is now not correct. Fast Fourier transforms are performed on the data from the reference digitizer channel and the interleaved digitizer channel, from which are derived a match filter for the interleaved digitizer channel so the interleaved digitizer channel and reference digitizer channel are matched in phase and magnitude at all frequencies.

Abstract: Meter electronics (20) for processing sensor signals for a multi-phase flow material in a flowmeter (5) is provided according to an embodiment of the invention. The meter electronics (20) includes an interface (201) for receiving first and second sensor signals (210 and 211) for the multi-phase flow material and a processing system (203).