Abstract: A device may receive, at an operating system, a request for a random number from an application. The device may provide a command to generate an entropy input, based on the request for the random number and through a driver that is isolated from the operating system, to a quantum random number generator that is isolated from one or more processors hosting the operating system. Accordingly, the device may receive the entropy input, from the quantum random number generator, using the driver, and may generate the random number based at least in part on the entropy input. The device may provide the random number to the application.

Abstract: A true random number generator circuit includes a ring oscillator and a plurality of sampling circuits. The ring oscillator includes a plurality of series-connected stages coupled together in a ring. An output of a last stage of the ring oscillator is coupled to an input of a first stage of the ring oscillator. A sampling circuit of the plurality of sampling circuits has an input coupled to a node located between two adjacent stages of the plurality of series-connected stages. Every node of the ring oscillator is coupled to a corresponding sampling circuit of the plurality of sampling circuits. In another embodiment, a method for generating a random number is provided.

Abstract: A radio transmitting device configured to transmit a spread-spectrum radio signal wherein a carrier frequency changes in a predetermined set of radio channels according to a hopping sequence, the radio signal being organized in packets having each a header transmitted at a first channel in the hopping sequence comprising a detection sequence, and payload data encoding a message transmitted at following channels in the hopping sequence.

Abstract: A method and a device for remote acquisition of correlated pseudo-random numbers based on semi-trusted hardware. When applied to semi-trusted hardware, the method comprises: acquiring a random seed of a sender and a selected number of a receiver; generating a plurality of first correlated pseudo-random numbers and first commitment seeds according to the random seed and a predetermined category of the correlated pseudo-random number; generating a first commitment value and a first open value by a commitment mechanism according to the first correlated pseudo-random numbers and the first commitment seeds; generating a Merkle proof according to the first commitment value and the selected number; sending the first correlated pseudo-random numbers, the first commitment value, the first open value and the Merkle proof corresponding to the selected number to the receiver.

Abstract: A device for detecting perturbation attacks performed on a digital circuit is provided.

Abstract: Embodiments provide a device for testing a bit sequence generated by a Random Number Generator, wherein the device is configured to apply one or more statistical tests to the bit sequence, in response the detection of N bits generated by the Random number generator, each statistical test providing at least one sum value derived from the bits of the sequence, the testing device comprising: a comparator for comparing at least one test parameter related to each statistical test to one or more thresholds; a validation unit configured to determine if the bit sequence is valid depending on the comparison made by the comparator for each statistical test; wherein at least one of the test parameter and the at least one threshold is determined from N and from a target error probability.

Abstract: Provided is a streaming-based artificial intelligence convolution processing method, applied to a processing module. The method includes: adding invalid data to a starting point of a first to-be-processed data matrix stored in a first streaming lake to form a second to-be-processed data matrix, where a number of columns of the second to-be-processed data matrix is an integral multiple of a degree of parallelism of data transmission; using a data transmission module to take out the second to-be-processed data matrix from the first streaming lake in a preset manner for a convolution operation. Also provided are a streaming-based artificial intelligence convolution processing apparatus, a readable storage medium and a terminal.

Abstract: A random number generator includes a static random number generator, a dynamic entropy source, a counter and a combining circuit. The static random number generator includes an initial random number pool and a static random number pool to output a static random number sequence from one thereof the initial random number pool and the static random number pool. The dynamic entropy source is used to generate a dynamic entropy bit. The counter is used to generate a dynamic random number sequence according to the dynamic entropy bit. The combining circuit is used to output a true random number sequence to a lively random number pool according to the static random number sequence and the dynamic random number sequence. The static random number pool is updated when the lively random number pool is fully updated.

Abstract: A system and method for decision making for autonomous vehicles. The method includes determining if a decision scenario is present; generating a first random number; communicating the first random number to a receiver via visible light communication; receiving a second random number and determining a priority order based on the generated random numbers. The priority is communicated to all relevant units to determine the order in which the vehicles should proceed. An optical random generator may be used to generate the random number associated with each vehicle.

Abstract: Methods, systems, and devices for address obfuscation for memory are described. A mapping function may map a logical address of data to a physical address of a memory cell. The mapping function may be implemented with a mapping component that includes mapping subcomponents. Each mapping subcomponent may be independently configurable to implement a logic function for determining a bit of the physical address. The mapping function may vary across memory devices or aspects of memory device, and in some cases may vary over time.

Abstract: A system described herein may provide for the tracking and/or calculating of performance metrics associated with a network by marking traffic and determining performance characteristics of the marked traffic. Such performance characteristics or metrics may include throughput, latency, jitter, and/or other metrics. The marking may be performed on “user” traffic, which may be traffic that is generated or sent via the network by an application or service (e.g., a voice call service, a content streaming service, etc.), as opposed to “synthetic” or “test” traffic, which is traffic that is generated or sent for the purposes of testing performance of the network (e.g., traffic related to a “speed test” or the like).

Abstract: Systems, computer-implemented methods, and computer program products to facilitate updating, such as averaging and/or training, of one or more statistical sets are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can include a computing component that averages a statistical set, provided by the system, with an additional statistical set, that is compatible with the statistical set, to compute an averaged statistical set, where the additional statistical set is obtained from a selected additional system of a plurality of additional systems. The computer executable components also can include a selecting component that selects the selected additional system according to a randomization pattern.

Abstract: Described are a system, method, and computer program product for generating a data storage server distribution pattern. The method includes determining a set of servers and raw data to be stored. The method also includes transforming the raw data according to an error-correcting code scheme to produce distributable data. The method further includes determining a server reliability of each server in the set of servers. The method further includes generating the data storage server distribution pattern based on maximizing a system reliability relative to maximizing a system entropy. System reliability may be based on a minimum reliability of the set of servers, and system entropy may be based on a cumulated information entropy of each server of the set of servers. The method further includes distributing the distributable data to be stored across at least two servers of the set of servers according to the data storage server distribution pattern.

Abstract: Provided are techniques for providing a global unique identifier for a storage volume. Under control of a storage initiator, a Global Universally Unique Identifier (GUUID) is identified for a storage volume of a storage device in a cloud system storing a plurality of storage devices, wherein the GUUID is generated for use with an ATA over Ethernet (AoE) protocol. The GUUID is stored in bytes of a packet header structure. Metadata is stored in remaining portions of the packet header structure. A request with the packet header structure is sent to a storage target.

Abstract: Methods, systems, and devices for wireless communications are described for a two-step random access channel (RACH) procedure in which uplink random access preamble and message transmission occasions may span multiple transmission slots. Reference signal resources for transmitting a reference signal with a first random access message of the two-step RACH procedure may include at least one symbol in each of the multiple transmission slots. The reference signal resources, reference signal sequence, or both, may be identified based on a particular uplink random access message transmission occasion, random access preamble transmission occasion, random access preamble sequence configuration, or any combinations thereof.

Abstract: An electronic control unit comprises circuitry to receive a combined signal via a vehicle bus of a vehicle, wherein the combined signal contains a combination of a data signal and a watermark signal, which can be a radio frequency (RF) signal or an analog baseband signal, wherein the data signal includes a message, circuitry to extract a watermark from the watermark signal, circuitry to verify the watermark based on a comparison of the watermark with a pre-defined watermark, circuitry to extract the data signal from the combined signal and obtain the message from the data signal, and circuitry to authenticate the message based on the verification of the watermark.

Abstract: A request to generate one or more random values can be received. In response to receiving the request to generate the one or more random values, a first read operation can be performed on a memory cell of the memory component to retrieve first data and a second read operation can be performed on the same memory cell of the memory component to retrieve second data. The first data can be compared with the second data to identify a difference between the first data and the second data. The difference can be associated with a noise characteristic of the memory cell. The one or more random values can be generated based on the difference between the first data and the second data that is associated with the noise characteristic of the memory cell.

Abstract: A test stimulus generator generates error irritations, or error sequences, within a processor system. The test stimulus generator includes an initialization register, a pseudo-random number generator (PRNG), a clock subsystem, and an output register. The PRNG calculates an output value from an initialization value stored in the initialization register. The PRNG output value represents a unique error irritation and identifies one or more components within the processor system to handle the error irritation. The clock subsystem generates either a continuous or pulsed clock signal that transfers the initialization value into the PRNG. The output register stores the PRNG output value and transmits the corresponding error irritation to the processor components identified to handle the error irritation. The test stimulus generator generates error irritations in a predetermined or random order based on the initialization value. A corresponding method and computer program product are also disclosed.

Abstract: In some embodiments, a method for generating a random bit is provided. The method includes generating a first random bit by providing a random number generator (RNG) signal to a magnetoresistive random-access memory (MRAM) cell. The RNG signal has a probability of about 0.5 to switch the resistive state of the MRAM cell from a first resistive state corresponding to a first data state to a second resistive state corresponding to a second data sate. The first random bit is then read from the MRAM cell.

Abstract: A random bit circuit includes four storage cells controlled by four different word lines. The first storage cell and the second storage cell are disposed along a first direction sequentially, and the first storage cell and the third storage cell are disposed along a second direction sequentially. The third storage cell and the fourth storage cell are disposed along the first direction sequentially. The first storage cell and the fourth storage cell are coupled in series, and the second storage cell and the third storage cell are coupled in series.

Abstract: A method for screening a semiconductor device for production of excessive random telegraph sequence (RTS) noise includes measuring noise of the semiconductor device at a first temperature, changing the temperature of the semiconductor device to a second temperature different from the first temperature, measuring noise of the semiconductor device at the second temperature, extracting a characteristic of the measured noise at the first and second temperatures (e.g., standard deviation, HMM output, frequency domain spectrum of time domain noise measurement), making a comparison of the extracted first and second noise characteristics, and making a determination whether the semiconductor device produces excessive RTS noise based on whether the comparison is above a predetermined threshold. Two different bias conditions of the device may be employed rather than, or in addition to, the two different temperatures.

Abstract: An embodiment of a data pattern analysis optimizer includes a time sequence data memory, an estimator, a grouping unit, and a time sequence pattern extractor. The time sequence data memory stores a plurality of time sequence data made from items in time order. The estimator estimates the upper limit of the total number of types of time sequence patterns present in the time sequence data at a rate higher than a minimum support level, based on a respective rate of presence of each item, wherein each of the time sequence patterns present in the time sequence data is a predefined number of items. In case that the estimated upper limit exceeds an upper limit of the number of types of time sequence patterns as a maximum processing load to a computer, the grouping unit groups a plurality of time sequence data into sub-groups, based on a group of items having the increased number of items and gives the estimator instructions to perform estimation.

Abstract: A multi-level memory cell NAND structure of a memory device is utilized to extract uniqueness from the memory device. Certain unreliable characteristics of a NAND-based storage are used to generate a true random number sequence. A method for generating such sequence is based on a physically unclonable function (PUF) which is implemented by extracting unique characteristics of a NAND-based memory device using existing firmware procedures.

Abstract: Embodiments of systems and methods for a multi-source true random number generator (TRNG) are disclosed. A set of values is generated from each of the sources of randomness and an extractor is applied each of the set of values to produce a set of random values from each source. At least one extractor for at least one of the sources is a multi-radix extractor. The sets of values generated from each source of randomness can be composited to generate a random bitstring as the output of the TRNG.

Abstract: Systems and methods for increasing security in a computer system are provided. The system includes one or more logic circuits. The one or more logic circuits receive a plurality of independent first entropy values from a hardware source, apply at least some of the plurality of independent first entropy values to a function to generate a second entropy value, and seed a pseudorandom number generator with the second entropy value. The one or more logic circuits also generate a random number using the pseudorandom number generator seeded with the second entropy value and may produce a block of ciphertext or message authentication code using the random number, or otherwise use the generated numbers as secure random numbers in applications such as cryptographic protocols.

Abstract: A method, apparatus, and computer program product for improved pseudo-random number generation are provided. An example method includes receiving, by a computing device, a request for a pseudo-random number, selecting, by extraction circuitry of the computing device, a first parameter from a server parameter dataset, and obtaining a first value for the first parameter. The method further includes selecting, by the extraction circuitry, a second parameter, and obtaining a second value for the second parameter. The method includes generating, by transformation circuitry, the pseudo-random number based on the first value and the second value.

Abstract: Methods for modifying power use of a semiconductor device include receiving, at one or more processors, an activity stream of a simulation of a semiconductor device, the activity stream comprising a stream of signals. Using the one or more processors, integrated circuit actions are recognized from the activity stream, each integrated circuit action representing an abstraction of work done by the semiconductor device. The processor(s) determine one or more values associated with the integrated circuit actions. A model of power use is generated for the semiconductor device, the model based at least in part on the recognized integrated circuit actions and the associated values. Based on an output of the model, power use of the semiconductor device is modified. Other methods and systems related to determining, modeling, and predicting power/energy use of semiconductor devices are also disclosed.

Abstract: Systems, computer-implemented methods, and computer program products to facilitate updating, such as averaging and/or training, of one or more statistical sets are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can include a computing component that averages a statistical set, provided by the system, with an additional statistical set, that is compatible with the statistical set, to compute an averaged statistical set, where the additional statistical set is obtained from a selected additional system of a plurality of additional systems. The computer executable components also can include a selecting component that selects the selected additional system according to a randomization pattern.

Abstract: A random number generator, a random number generating circuit, and a random number generating method are provided. The random number generating circuit includes the random number generator and executes the random number generating method. The random number generator includes a shift register having N storage elements and a combinational logic circuit. The N storage elements receive a random seed in a static state and repetitively perform a bit shift operation in a plurality of clock cycles. The combinational logic circuit generates an output sequence based on the random seed and a random bitstream received from an external source.

Abstract: Provided are a random number generation device and the like capable of calculating a high precision random number using a memory capacity selected irrespective of the precision of the random number. A random number calculation device is configured to generate first random numbers based on given number and specify, for the given number of second random numbers in a target numeric extent, bin range depending on the first random numbers based on frequency information representing cumulative frequency regarding a frequency of numeric extent including respective second random numbers among given numeric extents, the numeric extent being determined in accordance with a desirable precision.

Abstract: A memory device that includes a memory array and a memory controller is introduced. The memory controller is configured to adjust a program strength of the program pulse according to the configurable ratio of the first bit value and the second bit value to generate an adjusted program pulse or to adjust a bias voltage pair according to the configurable ratio of the first bit value and the second bit value to generate an adjusted bias voltage pair. The memory controller is further configured to generate the random bit stream with the configurable ratio of the first bit value and the second bit value according to the data stored in the plurality of memory cells included in the memory array after applying the adjusted program pulse or according to the data stored in the plurality of memory cells after being biased by the adjusted bias voltage pair.

Abstract: A method for correcting spatially variable electron flux in a true random number generator (TRNG) is presented. The TRNG comprises a radioactive source and an array of detectors, and the method comprises: (a) segmenting the array of detectors into a plurality of groups; (b) for each group: (1) detecting via multiple detectors an electron signal from the decay of the radioactive source; (2) determining a number of detections based on the detection of step (b)(1); (3) determining a group median count based on the number of detections; (4) comparing the group median count to either (A) a detection count from a single detector within the group, or (B) a detection count from multiple detectors within the group; (5) based on the comparison, assigning a value to a string of values; and (c) determining a true random number based on the string of values. A TRNG implementing the method is also disclosed.

Abstract: A random number generator including: a first ring oscillator including a first inverter chain, the first inverter chain including a plurality of serially connected first inverters, the first ring oscillator configured to output a first random signal generated at a first sub-node between two neighboring first inverters among the plurality of first inverters; a second ring oscillator including a second inverter chain, the second inverter chain including a plurality of serially connected second inverters, the second ring oscillator configured to output a second random signal generated at a second sub-node between two neighboring second inverters among the plurality of second inverters; and a signal processing circuit for generating a random number by combining the first random signal with the second random signal.

Abstract: An integrated circuit chip includes a plurality of function blocks; a mode controller configured to convert an input signal, received from an external device through an input/output pin, into an input pattern and test mode setting data which include a plurality of bits, and to output the test mode setting data and a mode switching enable signal when a secure pattern generated therein is the same as the input pattern; and a mode setting module configured to control the plurality of function blocks to operate in a test mode according to the mode setting data, in response to the test mode switching enable signal.

Abstract: A random noise generator for generating a plurality of random noise samples per clock cycle, the noise samples having a distribution. The random noise generator comprises at least a first comparator unit and a second comparator unit, the first comparator unit configured to generate a first plurality of samples representing a high-probability part of the distribution and the second comparator unit configured to generate a second plurality of samples representing a low-probability part of the distribution; and a random selection unit connected to at least the first comparator unit and the second comparator unit. The random selection unit is configured to receive the first plurality of samples generated by the first comparator unit and the second plurality of samples generated by the second comparator unit, to output a random selection of samples from the first plurality of samples and the second plurality of samples.

Abstract: An apparatus includes a ring oscillator, a carry chain circuit, and a detector circuit. The ring oscillator produces a clock signal. The carry chain circuit includes a plurality of stages. Each stage of the plurality of stages includes a plurality of lookup table elements coupled in sequence. The carry chain circuit propagates the clock signal through the plurality of lookup table elements of the plurality of stages. The detector circuit determines, based on a value of the clock signal stored by a final lookup table element of each stage of the plurality of stages, which stage of the plurality stages contains an edge of the clock signal. The detector circuit then outputs a zero if the determined stage is assigned to a first group of the plurality of stages and a one if the determined stage is assigned to a second group of the plurality of stages.

Abstract: A semiconductor device of an embodiment includes a seed generator circuit configured to generate a seed from inputted data by using first random number sequence data generated by an XorShift circuit; and a random number generator circuit configured to receive the seed as input to generate second random number sequence data by a second XorShift circuit.

Abstract: A method is provided for preparing a plurality of distributed nodes to perform a protocol to establish a consensus on an order of received requests. The plurality of distributed nodes includes a plurality of active nodes, the plurality of active nodes including a primary node, each of the plurality of distributed nodes including a processor and computer readable media. The method includes preparing a set of random numbers, each being a share of an initial secret. Each share of the initial secret corresponds to one of the plurality of active nodes. The method further includes encrypting each respective share of the initial secret, binding the initial secret to a last counter value to provide a commitment and a signature for the last counter value, and generating shares of a second and of a plurality of subsequent additional secrets by iteratively applying a hash function to shares of each preceding secret.

Abstract: Disclosed herein is an apparatus for estimating randomness of a random number generator. The apparatus is configured to divide output data (302), generated by the random number generator (704), into blocks (310) of a length (L), estimate a Shannon entropy of a second sub-set (404) of the blocks (310), using a first sub-set (402) of the blocks (310) to initialize the estimating, solve an estimate function, that relates an argument parameter (?) to the Shannon entropy estimate, to determine a value for the argument parameter (?) that is indicative of a probability of a most probable block being generated by the random number generator (704) as a new block, and use the length (L) to tune an estimate of randomness of the random number generator (704) calculated based on the value for the argument parameter (?).

Abstract: A system and method of generating a one-way function and thereby producing a random-value stream. Steps include: providing a plurality of memory cells addressed according to a domain value wherein any given domain value maps to all possible range values; generating a random domain value associated with one of the memory cells; reading a data value associated with the generated random domain value; generating dynamically enhanced data by providing an additional quantity of data; removing suspected non-random portions thereby creating source data; validating the source data according to a minimum randomness requirement, thereby creating a validated source data; and integrating the validated source data with the memory cell locations using a random edit process that is a masking, a displacement-in-time, a chaos engine, an XOR, an overwrite, an expand, a remove, a control plane, or an address plane module. The expand module inserts a noise chunk.

Abstract: In some embodiments, a method for generating a random bit is provided. The method includes generating a first random bit by providing a random number generator (RNG) signal to a magnetoresistive random-access memory (MRAM) cell. The RNG signal has a probability of about 0.5 to switch the resistive state of the MRAM cell from a first resistive state corresponding to a first data state to a second resistive state corresponding to a second data state. The first random bit is then read from the MRAM cell.

Abstract: An apparatus is provided, connectable to a memory and one or more peripherals. The apparatus includes translation request circuitry to receive a translation request from one of the peripherals to translate an input address within an input domain to an output address within an output domain. Signing circuitry generates a signature of at least part of the output address using a private key. Translation response circuitry responds to the translation request by transmitting to the one of the peripherals a translation response, including the output address and the signature. Gateway circuitry receives access requests to the memory. Each of the access requests comprises a desired memory address in the output domain and a signature of the desired memory address. The gateway performs validation of the signature of the desired memory address using the private key and in response to the validation of a given access request failing, performs an error action.

Abstract: There may be provided a computer-implemented method. It may be implemented using a blockchain network such as, for example, the Bitcoin network.

Abstract: An apparatus comprises a noisy bias voltage generator circuit, a random seed generator circuit, and a random series generator circuit. The noisy bias voltage generator circuit may be configured to generate a plurality of noisy bias voltages in response to a plurality of input voltage signals and a first bias current signal. The random seed generator circuit may be configured to generate a random seed in response to the plurality of noisy bias voltages and a second bias current signal. The random series generator circuit may be configured to generate a series of true random bits in response to the random seed and a clock signal.

Abstract: Various embodiments relate to a method and system for securely comparing a first and second polynomial, including: selecting a first subset of coefficients of the first polynomial and a second subset of corresponding coefficients of the second polynomial, wherein the coefficients of the first polynomial are split into shares and the first and second polynomials have coefficients; subtracting the second subset of coefficients from one of the shares of the first subset of coefficients; reducing the number of elements in the first subset of coefficients to elements by combining groups of / elements together; generating a random number for each of the elements of the reduced subset of coefficients; summing the product of each of the elements of the reduced subset of coefficients with their respective random numbers; summing the shares of the sum of the products; and generating an output indicating that the first polynomial does not equal the second polynomial when the sum does not equal zero.

Abstract: Systems and methods for integrated communication security are described. One aspect includes a clock generator configured to generate a clock signal at a first frequency, and a circuit utilizing the clock signal. The circuit may include a port configured to receive an encryption sequence at the first frequency, and a first unidirectional data path between the port and a memory configured to permit data transfer from the port to the memory. The memory may be configured to access the encryption sequence from the port via the first unidirectional data path and store the data. The circuit may further include a clock divider configured to divide the first frequency by a divisor deriving another clock signal at a second frequency, and an encryption/decryption module configured to read a portion of the encryption sequence from the memory, process input using the portion of the encryption sequence, and generate output responsive to the processing.

Abstract: A Physical Unclonable Function (PUF) based true random number generator (TRNG), a method for generating true random numbers, and an associated electronic device are provided. The PUF based TRNG may include a first obfuscation circuit, a cryptography circuit coupled to the first obfuscation circuit, and a second obfuscation circuit coupled to the cryptography circuit. The first obfuscation circuit obtains a first PUF value from a PUF pool of the electronic device, and performs a first obfuscation function on a preliminary seed based on the first PUF value to generate a final seed. The cryptography circuit utilizes the final seed as a key of a cryptography function to generate preliminary random numbers. The second obfuscation circuit obtains a second PUF value from the PUF pool, and performs a second obfuscation function on the preliminary random numbers based on the second PUF value to generate final random numbers.

Abstract: The disclosure provides a key generation method and apparatus. The key generation method comprises: encrypting a first key factor generated by a first device with an initial key, and sending the encrypted first key factor to a second device through a first secure channel, wherein the initial key is a key preset for the first device and the second device; receiving, through the first secure channel, a second key factor encrypted with the initial key, wherein the second key factor is generated by the second device; decrypting the second key factor encrypted with the initial key and received through the first secure channel, so as to obtain the second key factor; and generating a shared key between the first device and the second device according to the first key factor and the second key factor.

Abstract: An operation-side communication device that is operated by an operator and a machine-side communication device that is connected to an industrial machine mutually register each other as partners permitted to communicate with each other. A communication device receives a partner ID of a partner communication device intended to be registered as a partner. The communication device wirelessly transmits a signal including the partner ID to the partner communication device. The partner communication device determines whether the partner ID included in the received signal corresponds to the ID of the partner communication device itself, and if so, the communication device registers the partner ID as the ID of a permitted communication partner. The above operations are repeated with the communication device and the partner communication device interchanged.

Abstract: Embodiments of the disclosure provide a system for providing a true random number (TRN) or physically unclonable function (PUF), including: an array of voltage controlled magnetic anisotropy (VCMA) cells; a voltage pulse tuning circuit for generating and applying a stochastically tuned voltage pulse to the VCMA cells in the array of VCMA cells, wherein the stochastically tuned voltage pulse has a magnitude and duration that provides a 50%-50% switching distribution of the VCMA cells in the array of VCMA cells; and a bit output system for reading a state of each of the VCMA cells in the array of VCMA cells to provide a TRN or PUF.