Interpolation/extrapolation Patents (Class 708/290)
  • Patent number: 11843408
    Abstract: Using information contained in clipped samples from analog-to-digital (ADC) conversion to improve receiver performance, by, for example, reducing the clipping distortion caused by ADCs due to its data resolution constraints. This provides an advantage over existing solutions, which perform suboptimally because the existing solution discard information in tire clipped samples.
    Type: Grant
    Filed: April 23, 2019
    Date of Patent: December 12, 2023
    Assignee: TELEFONAKTIEBOLAGET LM ERICSSON (PUBL)
    Inventors: Nikolaos Kolomvakis, Thomas Eriksson, Mikael Coldrey, Mats Viberg
  • Patent number: 11714007
    Abstract: A temperature interpolation device includes: a temperature data reading/writing unit which continues to record both time information and temperature data in a nonvolatile storage medium in the operation of a target device whose temperature data is read, and which checks the time information recorded in the nonvolatile storage medium at predetermined time intervals so as to determine whether or not data is lost in a predetermined time section; and a past temperature estimation unit which uses, when the temperature data reading/writing unit determines that the data is lost, the data recorded in the nonvolatile storage medium and a calculation parameter recorded in a calculation parameter setting unit so as to estimate and interpolate the lost data with a temperature interpolation formula.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: August 1, 2023
    Assignee: FANUC CORPORATION
    Inventor: Shunsuke Karaki
  • Patent number: 11604854
    Abstract: A multiplier array for implementing a multiply-accumulate operation has a plurality of rows, where each row comprises multiplexer circuitry and adder circuitry, the multiplexer circuitry selecting, in dependence on a control input, one of a first multiplexer input value and a second multiplexer input value to provide as a first adder input value to the adder circuitry. In each row other than an initial row, the adder circuitry also receives as a second adder input value at least a portion of a result value produced in a preceding row. In a multiplication mode, the multiplier array implements the multiply-accumulate operation, and in a linear interpolation mode, the multiplier array implements a linear interpolation operation between a lower limit value and an upper limit value based on a weighting value.
    Type: Grant
    Filed: July 16, 2020
    Date of Patent: March 14, 2023
    Assignee: Arm Limited
    Inventor: Simon John Craske
  • Patent number: 11525715
    Abstract: An apparatus for linearizing an input signal includes a memory, in which an output value is stored for each of a plurality of linearization points. The linearization points divide a value range into a plurality of intervals. Each interval is delimited by a first linearization point with an assigned first output value and a second linearization point with an assigned second output value. The apparatus includes a computer device configured to determine the interval in which an input signal value of the input signal is located and to calculate a linearized output signal value for the input signal value by way of a linear interpolation using the input signal value, the first output value of this interval, and the second output value of this interval. At least two of the intervals have different interval lengths, which are formed by multiplication of an output interval length by an integer factor.
    Type: Grant
    Filed: April 17, 2020
    Date of Patent: December 13, 2022
    Assignee: Infineon Technologies AG
    Inventors: Christoph Krall, Stefan Lanschuetzer, Sebastian Uitz
  • Patent number: 11327713
    Abstract: A computation unit comprises a floating point input having X bits including a sign bit, an E bit exponent and an M bit mantissa. A first circuit is operatively coupled to receive X-N bits of the input, including e1 bits of the exponent and ml bits of the mantissa, where e1?E, and m1?M, to output values over a first domain of the input. A second circuit is operatively coupled to receive X-K bits of the input, including e2 bits of the exponent, e2<e1, and m2 bits of the mantissa, m2>m1, to output values, over a second domain of the input. A range detector is operatively coupled to the input, to indicate a range in response to a value of the input. A selector can select the output of the first circuit or of the second circuit in response to the range detector.
    Type: Grant
    Filed: October 1, 2019
    Date of Patent: May 10, 2022
    Assignee: SambaNova Systems, Inc.
    Inventors: Mingran Wang, Xiaoyan Li, Yongning Sheng
  • Patent number: 11263288
    Abstract: An aspect includes an apparatus for evaluating a mathematical function at an input value. The apparatus includes a selector for selecting a mathematical function, an input for a value at which to evaluate the function, an identifier for identifying an interval containing the input value. The interval is described by at least one polynomial function. At least one control point representing the polynomial function is retrieved from at least one look up table, and the polynomial function can be derived from the control points. The function is evaluated at the input value and an output of the evaluation is used as a value of the function at that input value.
    Type: Grant
    Filed: November 9, 2012
    Date of Patent: March 1, 2022
    Assignee: Imagination Technologies Limited
    Inventor: Simon Fenney
  • Patent number: 11183146
    Abstract: An electronic device includes an electronic display configured to present an image based on image data and a display pipeline having image processing circuitry to process the image data for display on the electronic display by receiving the image data, referencing a lookup table (LUT) to determine output values based on a plurality of input value sets associated with the image data, the LUT including entries respectively mapping an output value to a defined input value set, determining whether an input value set of the plurality of input value sets is represented by the entries of the LUT, performing curvature interpolation to determine an interpolated output value associated with the input value set in response to determining the input value set of the image data is not represented by the entries of the LUT, and applying the interpolated output value to the input value set to generate updated image data.
    Type: Grant
    Filed: August 26, 2020
    Date of Patent: November 23, 2021
    Assignee: Apple Inc.
    Inventor: Jian Zhou
  • Patent number: 11029919
    Abstract: A multiplier circuit includes a partial product generation circuit, a truncation circuit, and a summation circuit. The partial product generation circuit is configured to generate a plurality of partial products for multiplying two values. The truncation circuit is coupled to the partial product generation circuit. The truncation circuit is configured to shorten at least some of the partial products by removing a least significant bit from the at least some of the partial products. The summation circuit coupled to the truncation circuit. The summation circuit is configured to sum the truncated partial products produced by the truncation circuit.
    Type: Grant
    Filed: April 20, 2020
    Date of Patent: June 8, 2021
    Assignee: Texas Instruments Incorporated
    Inventors: Jawaharlal Tangudu, Suvam Nandi, Pooja Sundar, Jaiganesh Balakrishnan
  • Patent number: 10719576
    Abstract: Interpolation logic described herein provides a good approximation to a bicubic interpolation, which is generally smoother than bilinear interpolation, without performing all the calculations normally needed for a bicubic interpolation. This allows an approximation of smooth bicubic interpolation to be performed on devices (e.g. mobile devices) which have limited processing resources. At each of a set of predetermined interpolation positions within an array of data points, a set of predetermined weights represent a bicubic interpolation which can be applied to the data points. For a plurality of the predetermined interpolation positions which surround the sampling position, the corresponding sets of predetermined weights and the data points are used to determine a plurality of surrounding interpolated values which represent results of performing the bicubic interpolation at the surrounding predetermined interpolation positions.
    Type: Grant
    Filed: December 10, 2018
    Date of Patent: July 21, 2020
    Assignee: Imagination Technologies Limited
    Inventor: Simon Fenney
  • Patent number: 10581408
    Abstract: A method of increasing the sample rate of a digital signal by creating intermediate sample points between adjacent neighbouring sample points comprising the step of populating each of the intermediate sample points depending on a weighted influence of a predetermined number of the neighbouring sample points, the weighted influence being calculated by representing the digital signal or filter at the predetermined number of sample points at least in part by its cosine components, which are each represented by absolute values of a cosine function in the time domain substantially limited to half a waveform cycle at its mid-point; combining the aforementioned cosine components at each of the neighbouring sample points to obtain waveforms at each of the neighboring sample points; determining values for each of the waveforms at the intermediate sample points and combining the determined values at the intermediate sample point to derive the weighted influence.
    Type: Grant
    Filed: September 26, 2015
    Date of Patent: March 3, 2020
    Inventor: Lachlan Barratt
  • Patent number: 10565786
    Abstract: An example method includes determining a point cloud representation of surfaces within an environment. The method further includes providing for display of a graphical interface that shows a model of the surfaces within the environment based on the point cloud representation. The method additionally includes receiving input data indicating one or more positions for one or more virtual sensors on the graphical interface corresponding to one or more physical positions within the environment. The method also includes determining one or more occluded regions within the environment, where the one or more occluded regions are predicted to be occluded from view by one or more sensors positioned at the one or more physical positions within the environment. The method also includes providing for display in the graphical interface of a graphical representation of the one or more occluded regions within the model of the surfaces within the environment.
    Type: Grant
    Filed: June 30, 2016
    Date of Patent: February 18, 2020
    Assignee: Google LLC
    Inventors: Greg Klein, James Bruce, Arshan Poursohi
  • Patent number: 10491997
    Abstract: An apparatus for generating an output signal, may comprise a signal path having an analog signal path portion having an analog magnitude droop, a digital signal path portion having a digital magnitude droop, a digital-to-analog converter for converting the digital input signal into the analog signal, a first digital compensation filter that compensates for the analog magnitude droop, and a second digital compensation filter that compensates for the digital magnitude droop, such that the first digital compensation filter and the second digital compensation filter together compensate for magnitude droop of the signal path to ensure a substantially flat passband response of the signal path.
    Type: Grant
    Filed: March 20, 2018
    Date of Patent: November 26, 2019
    Assignee: Cirrus Logic, Inc.
    Inventors: Pradeep Dhananjay, Bruce E. Duewer
  • Patent number: 10422849
    Abstract: In an embodiment of the present invention, a GraphSLAM-like algorithm for signal strength SLAM is presented. This algorithm as an embodiment of the present invention shares many of the benefits of Gaussian processes yet is viable for a broader range of environments since it makes no signature uniqueness assumptions. It is also more tractable to larger map sizes, requiring O(N2) operations per iteration. In the present disclosure, an algorithm according to an embodiment of the present invention is compared to a laser-SLAM ground truth, showing that is produces excellent results in practice.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: September 24, 2019
    Assignee: The Board of Trustees of the Leland Stanford Junior University
    Inventors: Joseph Huang, David Millman, David Stavens, Sebastian Thrun
  • Patent number: 10275689
    Abstract: Techniques for identifying and labeling distinct objects within 3-D images of environments in which vehicles operate, to thereby generate training data used to train models that autonomously control and/or operate vehicles, are disclosed. A 3-D image may be presented from various perspective views (in some cases, dynamically), and/or may be presented with a corresponding 2-D environment image in a side-by-side and/or a layered manner, thereby allowing a user to more accurately identify groups/clusters of data points within the 3-D image that represent distinct objects. Automatic identification/delineation of various types of objects depicted within 3-D images, automatic labeling of identified/delineated objects, and automatic tracking of objects across various frames of a 3-D video are disclosed. A user may modify and/or refine any automatically generated information. Further, at least some of the techniques described herein are equally applicable to 2-D images.
    Type: Grant
    Filed: February 27, 2018
    Date of Patent: April 30, 2019
    Assignee: LUMINAR TECHNOLOGIES, INC.
    Inventors: Prateek Sachdeva, Dmytro Trofymov
  • Patent number: 10176600
    Abstract: A texture processing unit includes a controller configured to determine a first calculator that performs a calculation on a first mipmap and a second calculator that performs a calculation on a second mipmap, based on a level of detail (LOD) weight indicating influences of the first mipmap and the second mipmap on texture filtering, the influences being based on an LOD value of graphics; and a texture filter configured to perform the texture filtering by using the first calculator and the second calculator, wherein a calculation precision of the first calculator is different from a calculation precision of the second calculator.
    Type: Grant
    Filed: May 31, 2017
    Date of Patent: January 8, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventor: Seong-hun Jeong
  • Patent number: 10108396
    Abstract: A digital processor, such as, e.g., a divider in a PID controller, performs a mathematical operation such as division (or multiplication) involving operands represented by strings of bit signals and an operator to produce an operation result. The processor is configured by identifying first and second power-of-two approximating values of the operator as the nearest lower and nearest higher power-of-two values to the operator. The operation is performed on the input operands by means of the first and second power-of-two approximating values of the operator by shifting the bit signals in the operands by using the first and second power-of-two approximating values in an alternated sequence to produce: first approximate results by using the first power-of-two approximating value, second approximate results by using the second power-of-two approximating value. The average of the first and second approximate results is representative of the accurate result of the operation.
    Type: Grant
    Filed: June 24, 2014
    Date of Patent: October 23, 2018
    Assignee: STMicroelectronics S.r.l.
    Inventor: Daniele Mangano
  • Patent number: 10037188
    Abstract: An arithmetic processing device includes: a first memory configured to store values of a first coefficient of a logarithmic function, where the logarithmic function is decomposed into a series operation term and the coefficient term, depending on respective values of a first bit group included in operand data of a first instruction to calculate the value of the first coefficient; a second memory configured to store values of a second coefficient included in the series operation term depending on the respective values of the first bit group included in operand data of a second instruction to calculate the value of the second coefficient; and a selector configured to select the value of the first coefficient read from the first memory based on the execution of the first instruction and select the value of the second coefficient read from the second memory based on the execution of the second instruction.
    Type: Grant
    Filed: July 7, 2016
    Date of Patent: July 31, 2018
    Assignee: FUJITSU LIMITED
    Inventor: Mikio Hondo
  • Patent number: 10007642
    Abstract: Provided is an information processing device configured to: acquire blocks, each of the blocks being a part of an array; generate a total sum block, a maximum block, a first maximum block, and a last maximum block for a plurality of sub; iteratively execute processing of calculating, for a new sub-block, a new total sum block, a new maximum block, a new first maximum block, and a new last maximum block; determine, after the processing is executed a predetermined number of times, a total sum of element values, a maximum value of subset sums, a maximum value of subset sums summed from a first element, and a maximum value of subset sums summed to a last element for each of the blocks; and calculate the maximum value of subset sums in the array based on the determined values.
    Type: Grant
    Filed: May 15, 2015
    Date of Patent: June 26, 2018
    Assignee: RAKUTEN, INC.
    Inventor: Yusaku Kaneta
  • Patent number: 9990173
    Abstract: An audio processor may process dissimilarly formatted digital audio signals and produce an analog output for reproduction by a transducer, such as a speaker. The audio processor may be, for example, a digital-to-analog converter (DAC) with multiple digital inputs and a single analog output. The audio processor may also include other components, such as processing components, filters, equalizers, amplifiers, and the like. The audio processor may process audio, such as high fidelity DSD audio and lower fidelity PCM audio, and combine the differently formatted data into a single output. During processing, the audio processor may manipulate the different audio signals, such as by ducking a music playback to allow a notification sound to be played.
    Type: Grant
    Filed: April 14, 2016
    Date of Patent: June 5, 2018
    Assignee: Cirrus Logic, Inc.
    Inventors: Dylan Alexander Hester, Bala Vishnu Shankar Rao, Tarun Soni, John L. Melanson
  • Patent number: 9904904
    Abstract: Embodiments of a computer system that determines a time history are described. During operation, the computer system receives a single command which accesses information associated with the time history, wherein the command is received from a user, and the information is to be used by financial software. Then, the computer system generates multiple queries corresponding to the time history, where the multiple queries access multiple data sources. Next, the computer system executes the multiple queries to obtain the time history.
    Type: Grant
    Filed: April 22, 2008
    Date of Patent: February 27, 2018
    Assignee: INTUIT INC.
    Inventors: Karl Lew, Ranjit R. Sawant, Michael W. Dehlwes, Rajasivasubramanian Ramanathan
  • Patent number: 9837988
    Abstract: Decimation filter circuitry may include polyphase filtering structures that perform decimation filtering using filter coefficients. Generic polyphase filtering structures do not take advantage of symmetries between the corresponding filter coefficients. If desired, the arrangement of the polyphase filtering structures in the decimation filter circuitry may be optimized relative to generic polyphase filtering structures to take advantage of corresponding filter coefficient symmetries, thereby allowing for implementation of dynamic decimation ratios and a dynamic number of channels while reducing the number of required multipliers by half with respect to generic polyphase filters. Decimation filters may include pre-adder circuitry that receives first and second portions of a data stream and adds corresponding samples from the first and second portions to generate pre-added values.
    Type: Grant
    Filed: March 26, 2015
    Date of Patent: December 5, 2017
    Assignee: Altera Corporation
    Inventor: Colman C. Cheung
  • Patent number: 9607128
    Abstract: Systems, methods, and apparatuses are provided for detecting and potentially invalidating or correcting jump errors in data from growth processes. A jump error can be identified by determining a second derivative of the data set, and identifying two consecutive cycles with opposite signs in the second derivative. Once a jump error has been detected, the data set can be invalidated or corrected based on various criteria. Whether to invalidate or correct can be based on an absolute jump height, a relative jump height (e.g., relative to the net growth or relative to the baseline), an absolute location (cycle number) of the jump, or a relative location. In one implementation, the jump can be corrected by subtracting a jump height from points subsequent to the jump or by adding the jump height to points prior to the jump.
    Type: Grant
    Filed: December 30, 2013
    Date of Patent: March 28, 2017
    Assignee: Roche Molecular Systems, Inc.
    Inventor: Ronald T. Kurnik
  • Patent number: 9488972
    Abstract: Disclosed are an apparatus and a method for controlling a PLC output signal. The method includes receiving the PLC digital output signal and interpolating a gradient of the PLC digital output signal by applying a nonlinear correction function to the received PLC digital output signal. The embodiment provides a stable output control apparatus and a stable output control method capable of allowing an external device controlled by a PLC to smoothly output a response and a PLC output is gradually changed to prevent the external device to be controlled from being malfunctioned or broken.
    Type: Grant
    Filed: April 23, 2013
    Date of Patent: November 8, 2016
    Assignee: LSIS CO., LTD.
    Inventor: Jae Il Kwon
  • Patent number: 9486295
    Abstract: A reference structure for use with a medical navigation system, includes an imaging structure, and a plurality of artificial markers arranged at predetermined locations on said imaging structure. The artificial markers are detectable by the medical navigation system, wherein the artificial markers have a known relationship to the imaging structure.
    Type: Grant
    Filed: February 21, 2007
    Date of Patent: November 8, 2016
    Assignee: Brainlab AG
    Inventors: Stefan Vilsmeier, Thomas Bauch, Uli Mezger
  • Patent number: 9477442
    Abstract: A processor includes: an exponent generating unit that generates an exponent part of a coefficient represented by a floating point number format based on a first part of received input data, the coefficient being obtained when an exponential function is decomposed into a series operation and the coefficient for the series operation; a storage unit that stores a mantissa part of the coefficient; a constant generating unit that reads constant data corresponding to a second part of the input data from the storage unit; and a selecting unit that selects and outputs the constant data from the constant generating unit when an instruction to be executed is a coefficient calculation instruction for calculation of the coefficient of the exponential function.
    Type: Grant
    Filed: September 8, 2014
    Date of Patent: October 25, 2016
    Assignee: FUJITSU LIMITED
    Inventor: Mikio Hondo
  • Patent number: 9430996
    Abstract: System and method for identifying tones present in a short segment of digitized music stream, and for reporting simultaneously and quantitatively their respective magnitude and phase in near real time. Also captured are pitch deviations from the nominal tones of a predetermined music scale. The resulting spectral data can be scrolled manually from frame to frame to facilitate detail music evaluation and editing. The apparatus can also operate at real time to display notes being played, or to tone-activate audio-visual music enhancement and display with automatic synchronization.
    Type: Grant
    Filed: June 13, 2013
    Date of Patent: August 30, 2016
    Inventor: David C. Chu
  • Patent number: 9396630
    Abstract: A system is provided that encodes one or more dynamic haptic effects. The system defines a dynamic haptic effect as including a plurality of key frames, where each key frame includes an interpolant value and a corresponding haptic effect. An interpolant value is a value that specifies where an interpolation occurs. The system generates a haptic effect file, and stores the dynamic haptic effect within the haptic effect file.
    Type: Grant
    Filed: December 18, 2014
    Date of Patent: July 19, 2016
    Assignee: Immersion Coporation
    Inventors: Henry Da Costa, Feng Tian An, Christopher J. Ullrich
  • Patent number: 9392143
    Abstract: An apparatus including a memory, a first circuit and a second circuit. The memory may be divided into eight banks. Each bank may store a portion of a three-dimensional (3D) color correction lookup table. The first circuit may be configured to address the memory in response to an index of an input point. The second circuit may be configured to arrange outputs of the eight banks for color interpolation.
    Type: Grant
    Filed: March 31, 2010
    Date of Patent: July 12, 2016
    Assignee: Ambarella, Inc.
    Inventors: Leslie D. Kohn, Manish Kumar Singh
  • Patent number: 9240771
    Abstract: A method of generating a signal having a converted sampling rate in a communication system is provided. The method includes selecting effective input samples among S number of input samples included in an input stream corresponding to an input sampling rate, generating a filter coefficient set including filter coefficients having a length of a second tap, the filter coefficients having the length of the second tap being generated by dividing a filter coefficient having a length of a first tap configuring a low-pass filter into the filter coefficients having the length of the second tap corresponding to a number of selected effective input samples, selecting filter coefficients corresponding to each of the effective input samples among the filter coefficients included in the filter coefficient set, and outputting output samples having an output sampling rate which is converted from the input sampling rate.
    Type: Grant
    Filed: February 8, 2012
    Date of Patent: January 19, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Joo-Hyun Lee, Sung-Kwon Jo, Ha-Young Yang
  • Patent number: 9061775
    Abstract: A method, apparatus and system is provided for reducing an amount of information transmitted to a vehicle in order to implement attitude control of the vehicle. In accordance with the present invention, data corresponding to at least one time-varying attitude command trajectory defining an attitude of the vehicle is reduced, for example, into a vector of polynomial coefficients. The vector of polynomial coefficients then are transmitted to the vehicle, where they are used to reconstruct the at least one time-varying attitude command trajectory via a polynomial interpolation operation.
    Type: Grant
    Filed: June 24, 2013
    Date of Patent: June 23, 2015
    Inventors: Isaac M. Ross, Mark Karpenko
  • Publication number: 20150113029
    Abstract: A device may determine historical state values to be used to calculate a current state value of a wrapped state associated with a model element. The wrapped state may be associated with a range of state values. The device may calculate the current state value of the wrapped state based on the historical state values, and may determine that the current state value is outside of the range of state values. The device may generate a modified current state value based on determining that the current state value is outside of the range of state values. The modified current state value may be within the range of state values. The device may modify a historical state value based on determining that the current state value is outside of the range of state values. The device may provide or store the modified current state value and the modified historical state value.
    Type: Application
    Filed: October 17, 2013
    Publication date: April 23, 2015
    Applicant: The MathWorks, Inc.
    Inventors: Robert O. ABERG, Aleksandar Bozin
  • Patent number: 8965949
    Abstract: A system and method are provided for acquiring and processing device usage data and applying a computational knowledge thereto for proactively determining customer state, including inferring device usage patterns, and accordingly proposing at least one action, if any, to be undertaken. In particular, computational knowledge represented by a set of rules is applied to the processed device data for analyzing the processed data and describing at least one feature or characteristic relating to the processed data using keywords. A rules database is accessed and at least one rule is selected from a set of rules. The at least one selected rule includes keywords which substantially match the keywords used to describe the feature or characteristic of the processed data. The at least one selected rule is then correlated to at least one proposed action using the rules database. The at least one determined rule and/or at least one proposed action are then outputted.
    Type: Grant
    Filed: April 29, 2005
    Date of Patent: February 24, 2015
    Assignee: Xerox Corporation
    Inventor: Tracy E. Thieret
  • Publication number: 20150019607
    Abstract: Disclosed is an interpolation filter based on time assignment algorithm. An interpolation filter comprises an enable signal generating part generating enable signals for operation of the interpolation filter, an input value generating part generating input values, a first calculating part generating a first output value based on a first enable signal and a first input value, a second calculating part generating a second output value based on a second enable signal and a second input value, and an output value selecting part selecting a final output value among the first output value and the second output value. Thus, continuity of output data can be guaranteed, and hardware can be shared by using time assignment algorithm so that a total size of the interpolation filter can be reduced.
    Type: Application
    Filed: May 14, 2014
    Publication date: January 15, 2015
    Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE
    Inventors: MI JEONG PARK, JANG HONG CHOI, IK SOO EO
  • Publication number: 20140323872
    Abstract: The present disclosure in one or more embodiments provides a scan converter, an ultrasound diagnostic apparatus, and a method capable of performing real-time interpolation without directional distortion. An embodiment of the present disclosure prevents directional distortion of velocity data by performing vector interpolation by using a weight according to distances of four adjacent complex signals in color flow-mode (C-mode) and achieves real-time scan conversion by constructing a lookup table for vector interpolation.
    Type: Application
    Filed: January 11, 2012
    Publication date: October 30, 2014
    Applicant: ALPINION MEDICAL SYSTEMS CO., LTD.
    Inventors: Minyoung Eom, Hyunsook Lee
  • Patent number: 8805908
    Abstract: An approximation processing method for approximating a point group using a curve or a surface defined by control points includes a step of forming an approximated curve (surface) using control points that retain features of a shape; a first calculation step of calculating a closest point closest to each of the data points on the approximated curve (surface); a second calculation step of calculating an error vector that joins the closest point, obtained in the first calculation step, to the data point; and a third calculation step of calculating a corrected control point by moving each of the control points based on the error vector obtained by the second calculation step. The step of forming an approximated curve (surface) and the first to third calculation steps are repeated to make the approximated curve (surface) respectively approximate the curve (surface) of an object configured by the data points.
    Type: Grant
    Filed: February 24, 2009
    Date of Patent: August 12, 2014
    Assignee: National University Corporation Yokohama National University
    Inventors: Takashi Maekawa, Yuu Nishiyama, Masayuki Morioka
  • Patent number: 8761261
    Abstract: Various embodiments provide techniques and/or systems for reducing instances of computational complexity involved in video encoding.
    Type: Grant
    Filed: July 28, 2009
    Date of Patent: June 24, 2014
    Assignee: Marvell International Ltd.
    Inventor: Yi Wang
  • Patent number: 8724923
    Abstract: An image processing apparatus may include a distortion correcting unit performing distortion correction processing on input image data to generate output image data. The distortion correcting unit may include a distortion correction coordinate transforming unit that obtains coordinates indicating a position of the input image data corresponding to a position of the output image data, a range calculating unit that calculates a range of the input image data to be used in the distortion correction processing based on the coordinates of the input image data obtained by the distortion correction coordinate transforming unit, a correction information storage unit, an input image data storage unit, and an interpolation calculating unit that checks an amount of the input image data stored in the input image data storage unit based on the information regarding the range of the input image data.
    Type: Grant
    Filed: July 26, 2011
    Date of Patent: May 13, 2014
    Assignee: Olympus Corporation
    Inventors: Keisuke Nakazono, Yoshinobu Tanaka, Akira Ueno
  • Patent number: 8705359
    Abstract: Method of predicting capacity demands on a desired device used to support services for a number of subscribers within a market area having a number of devices. The method includes predicting the capacity demands as a function of historical capacity demands for the desired device and average subscriber capacity demands on the number of devices in the market area.
    Type: Grant
    Filed: March 13, 2006
    Date of Patent: April 22, 2014
    Assignee: Comcast Cable Holdings, LLC
    Inventor: Claude H. Bou-Abboud
  • Publication number: 20140089364
    Abstract: A method for multidimensional scaling (MDS) of a data set comprising a plurality of data elements is provided, wherein each data element is identified by its coordinates, the method comprising the steps of: (i) applying an iterative optimization technique, such as SMACOF, a predetermined amount of times on a coordinates vector, said coordinates vector representing the coordinates of a plurality of said data elements, and obtaining a modified coordinates vector; (ii) applying a vector extrapolation technique, such as Minimal Polynomial Extrapolation (MPE) or reduced Rank Extrapolation (RRE) on said modified coordinates vector obtaining a further modified coordinates vector; and (iii) repeating steps (i) and (ii) until one or more predefined conditions are met.
    Type: Application
    Filed: December 2, 2013
    Publication date: March 27, 2014
    Inventors: Guy Rosman, Alexander Bronstein, Michael Bronstein, Ron Kimmel
  • Patent number: 8671126
    Abstract: Interpolation of signed values A and B is efficiently performed by simple circuitry. To calculate an interpolated value C based on a 4-bit values A (bits a3a2a1a0) and B (bits b3b2b1b0) expressing a negative number by twos complement notation and a 4-bit interpolation rate D (bits d3d2d1d0) consisting of only a decimal part, a basic expression of C=(1?D)*A+D*B is transformed into an expression composed of an unsigned part that includes a sum of products with a bit di or a logically inverted value ei of the bit di (i=0, 1, 2, and 3), and indicates an absolute value of the interpolated value C, and a signed part indicating a sign of the interpolated value C. Then, 7 bits of bits c6 through c0 are generated from an arithmetic operation of the unsigned part, and logic judgement of the signed part is performed by considering a carry from the digit of the bit c6 of the arithmetic operation of the unsigned part to generate a bit c7.
    Type: Grant
    Filed: November 2, 2010
    Date of Patent: March 11, 2014
    Assignee: DAI Nippon Printing Co., Ltd.
    Inventors: Motonobu Tonomura, Kyouji Yoshino
  • Publication number: 20140067889
    Abstract: A datapath circuit may include a digital multiply and accumulate circuit (MAC) and a digital hardware calculator for parallel computation. The digital hardware calculator and the MAC may be coupled to an input memory element for receipt of input operands. The MAC may include a digital multiplier structure with partial product generators coupled to an adder to multiply a first and second input operands and generate a multiplication result. The digital hardware calculator may include a first look-up table coupled between a calculator input and a calculator output register. The first look-up table may include table entry values mapped to corresponding math function results in accordance with a first predetermined mathematical function. The digital hardware calculator may be configured to calculate, based on the first look-up table, a computationally hard mathematical function such as a logarithm function, an exponential function, a division function and a square root function.
    Type: Application
    Filed: August 27, 2013
    Publication date: March 6, 2014
    Applicant: ANALOG DEVICES A/S
    Inventor: Mikael M. MORTENSEN
  • Patent number: 8649508
    Abstract: A system and method for implementing the Elliptic Curve scalar multiplication method in cryptography, where the Double Base Number System is expressed in decreasing order of exponents and further on using it to determine Elliptic curve scalar multiplication over a finite elliptic curve.
    Type: Grant
    Filed: September 29, 2008
    Date of Patent: February 11, 2014
    Assignee: Tata Consultancy Services Ltd.
    Inventor: Natarajan Vijayarangan
  • Publication number: 20140019503
    Abstract: An embodiment of an apparatus includes a component determiner configured to determine a component of a first signal, and an interpolator configured to interpolate a portion of a second signal in response to the component of the first signal. For example, such an apparatus may include periodic- and aperiodic-component determiners, and an interpolator. Where the first signal is a function of time and the portion of the second signal is empty, the periodic-component determiner is configured to convert the first signal into a transformed frequency-domain signal, and to convert the transformed signal into a time-domain periodic component of the first signal. The aperiodic-component determiner is configured to determine an aperiodic component of the first signal in response to the first signal and the periodic component thereof, and the interpolator is configured to interpolate the empty portion of the second signal in response to the aperiodic component of the first signal.
    Type: Application
    Filed: October 31, 2012
    Publication date: January 16, 2014
    Applicant: TOKITAE LLC
    Inventor: Guillaume CHABOT-COUTURE
  • Publication number: 20130339414
    Abstract: A computer executable method of processing a representation of a modal interval polynomial is provided. A representation of a modal interval polynomial is generally provided as input, more particularly, a representation comprising a modal interval function variable and an array of modal interval coefficients. Each modal interval linear interpolation of each of the modal interval coefficients of the array are recursively processed until a single modal interval coefficient remains in the array. For each iteration of the recursive processing, a modal interval linear interpolation operation is executed.
    Type: Application
    Filed: August 21, 2013
    Publication date: December 19, 2013
    Applicant: Sunfish Studio, LLC
    Inventor: Nathan T. Hayes
  • Patent number: 8612502
    Abstract: Systems and methodologies are described that facilitate equalization of received signals in a wireless communication environment. Multiple transmit and/or receive antennas and utilize MIMO technology to enhance performance. A single tile of transmitted data, including a set of modulation symbols, can be received at multiple receive antennas, resulting in multiple tiles of received modulation symbols. Corresponding modulation symbols from multiple received tiles can be processed as a function of channel and interference estimates to generate a single equalized modulation symbol. Typically, the equalization process is computationally expensive. However, the channels are highly correlated. This correlation is reflected in the channel estimates and can be utilized to reduce complex equalization operations. In particular, a subset of the equalizers can be generated based upon the equalizer function and the remainder can be generated using interpolation. In addition, the equalizer function itself can be simplified.
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: December 17, 2013
    Assignee: QUALCOMM Incorporated
    Inventors: Petru Cristian Budianu, Hermanth Sampath, Alexei Gorokhov, Dhananjay A. Gore
  • Patent number: 8606835
    Abstract: A method of determining interpolation coefficients (607, 609, 610, 611) of a symmetric interpolation kernel (608) is disclosed. The method comprises determining a first interpolation coefficient (611) from the symmetric interpolation kernel (608) and storing the first interpolation coefficient in a memory (506). The method then determines the value of an intermediate function (310) from symmetrically opposed segments (201, 204) of the kernel, and determines a subsequent interpolation coefficient dependent upon the first interpolation coefficient and the value of the intermediate function.
    Type: Grant
    Filed: December 20, 2007
    Date of Patent: December 10, 2013
    Assignee: Canon Kabushiki Kaisha
    Inventors: Nagita Mehrseresht, Alan Valev Tonisson
  • Patent number: RE47238
    Abstract: The present invention relates to an interpolation method for enlarging a digital image or predicting a moving vector of a compressed image system as a sub-pixel unit when the image digitized through a CCD (Charge Coupled Device) camera ect. has a low resolution in a video phone or video conference or general digital video system, particularly the present invention can be adapted to a post processor of a compressed digital image in order to improve the image quality, and can be used for finding a moving vector of a moving picture compressed type, accordingly the present invention is capable of improving the image quality.
    Type: Grant
    Filed: December 7, 2015
    Date of Patent: February 12, 2019
    Assignee: LG ELECTRONICS INC.
    Inventors: Min-Cheol Hong, Yoon-Seong Soh
  • Patent number: RE47274
    Abstract: The present invention relates to an interpolation method for enlarging a digital image or predicting a moving vector of a compressed image system as a sub-pixel unit when the image digitized through a CCD (Charge Coupled Device) camera ect. has a low resolution in a video phone or video conference or general digital video system, particularly the present invention can be adapted to a post processor of a compressed digital image in order to improve the image quality, and can be used for finding a moving vector of a moving picture compressed type, accordingly the present invention is capable of improving the image quality.
    Type: Grant
    Filed: December 8, 2015
    Date of Patent: March 5, 2019
    Assignee: LG ELECTRONICS INC.
    Inventors: Min-Cheol Hong, Yoon-Seong Soh
  • Patent number: RE47291
    Abstract: The present invention relates to an interpolation method for enlarging a digital image or predicting a moving vector of a compressed image system as a sub-pixel unit when the image digitized through a CCD (Charge Coupled Device) camera ect. has a low resolution in a video phone or video conference or general digital video system, particularly the present invention can be adapted to a post processor of a compressed digital image in order to improve the image quality, and can be used for finding a moving vector of a moving picture compressed type, accordingly the present invention is capable of improving the image quality.
    Type: Grant
    Filed: December 9, 2015
    Date of Patent: March 12, 2019
    Assignee: LG ELECTRONICS INC.
    Inventors: Min-Cheol Hong, Yoon-Seong Soh
  • Patent number: RE47341
    Abstract: The present invention relates to an interpolation method for enlarging a digital image or predicting a moving vector of a compressed image system as a sub-pixel unit when the image digitized through a CCD (Charge Coupled Device) camera ect. has a low resolution in a video phone or video conference or general digital video system, particularly the present invention can be adapted to a post processor of a compressed digital image in order to improve the image quality, and can be used for finding a moving vector of a moving picture compressed type, accordingly the present invention is capable of improving the image quality.
    Type: Grant
    Filed: December 4, 2015
    Date of Patent: April 9, 2019
    Assignee: LG ELECTRONICS INC.
    Inventors: Min-Cheol Hong, Yoon-Seong Soh